1 /*- 2 * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/module.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/ata.h> 35 #include <sys/bus.h> 36 #include <sys/endian.h> 37 #include <sys/malloc.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/sema.h> 41 #include <sys/taskqueue.h> 42 #include <vm/uma.h> 43 #include <machine/stdarg.h> 44 #include <machine/resource.h> 45 #include <machine/bus.h> 46 #include <sys/rman.h> 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/pcireg.h> 49 #include <dev/ata/ata-all.h> 50 #include <dev/ata/ata-pci.h> 51 #include <ata_if.h> 52 53 /* local prototypes */ 54 static int ata_amd_ch_attach(device_t dev); 55 static int ata_amd_chipinit(device_t dev); 56 static int ata_amd_setmode(device_t dev, int target, int mode); 57 58 /* misc defines */ 59 #define AMD_BUG 0x01 60 #define AMD_CABLE 0x02 61 62 /* 63 * Advanced Micro Devices (AMD) chipset support functions 64 */ 65 static int 66 ata_amd_probe(device_t dev) 67 { 68 struct ata_pci_controller *ctlr = device_get_softc(dev); 69 static const struct ata_chip_id ids[] = 70 {{ ATA_AMD756, 0x00, 0x00, 0, ATA_UDMA4, "756" }, 71 { ATA_AMD766, 0x00, AMD_CABLE|AMD_BUG, 0, ATA_UDMA5, "766" }, 72 { ATA_AMD768, 0x00, AMD_CABLE, 0, ATA_UDMA5, "768" }, 73 { ATA_AMD8111, 0x00, AMD_CABLE, 0, ATA_UDMA6, "8111" }, 74 { ATA_AMD5536, 0x00, 0x00, 0, ATA_UDMA5, "CS5536" }, 75 { 0, 0, 0, 0, 0, 0}}; 76 77 if (pci_get_vendor(dev) != ATA_AMD_ID) 78 return ENXIO; 79 80 if (!(ctlr->chip = ata_match_chip(dev, ids))) 81 return ENXIO; 82 83 ata_set_desc(dev); 84 ctlr->chipinit = ata_amd_chipinit; 85 return (BUS_PROBE_LOW_PRIORITY); 86 } 87 88 static int 89 ata_amd_chipinit(device_t dev) 90 { 91 struct ata_pci_controller *ctlr = device_get_softc(dev); 92 93 if (ata_setup_interrupt(dev, ata_generic_intr)) 94 return ENXIO; 95 96 /* disable/set prefetch, postwrite */ 97 if (ctlr->chip->cfg1 & AMD_BUG) 98 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) & 0x0f, 1); 99 else 100 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1); 101 102 ctlr->ch_attach = ata_amd_ch_attach; 103 ctlr->setmode = ata_amd_setmode; 104 return 0; 105 } 106 107 static int 108 ata_amd_setmode(device_t dev, int target, int mode) 109 { 110 device_t parent = device_get_parent(dev); 111 struct ata_pci_controller *ctlr = device_get_softc(parent); 112 struct ata_channel *ch = device_get_softc(dev); 113 int devno = (ch->unit << 1) + target; 114 int piomode; 115 static const uint8_t timings[] = 116 { 0xa8, 0x65, 0x42, 0x22, 0x20, 0xa8, 0x22, 0x20 }; 117 static const uint8_t modes[] = 118 { 0xc2, 0xc1, 0xc0, 0xc4, 0xc5, 0xc6, 0xc7 }; 119 int reg = 0x53 - devno; 120 121 mode = min(mode, ctlr->chip->max_dma); 122 if (ctlr->chip->cfg1 & AMD_CABLE) { 123 if (ata_dma_check_80pin && mode > ATA_UDMA2 && 124 !(pci_read_config(parent, 0x42, 1) & (1 << devno))) { 125 ata_print_cable(dev, "controller"); 126 mode = ATA_UDMA2; 127 } 128 } 129 /* Set UDMA timings. */ 130 if (mode >= ATA_UDMA0) { 131 pci_write_config(parent, reg, modes[mode & ATA_MODE_MASK], 1); 132 piomode = ATA_PIO4; 133 } else { 134 pci_write_config(parent, reg, 0x8b, 1); 135 piomode = mode; 136 } 137 /* Set WDMA/PIO timings. */ 138 pci_write_config(parent, reg - 0x08, timings[ata_mode2idx(piomode)], 1); 139 return (mode); 140 } 141 142 static int 143 ata_amd_ch_attach(device_t dev) 144 { 145 struct ata_pci_controller *ctlr; 146 struct ata_channel *ch; 147 int error; 148 149 ctlr = device_get_softc(device_get_parent(dev)); 150 ch = device_get_softc(dev); 151 error = ata_pci_ch_attach(dev); 152 if (ctlr->chip->cfg1 & AMD_CABLE) 153 ch->flags |= ATA_CHECKS_CABLE; 154 return (error); 155 } 156 157 ATA_DECLARE_DRIVER(ata_amd); 158