1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/module.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/ata.h> 37 #include <sys/bus.h> 38 #include <sys/endian.h> 39 #include <sys/malloc.h> 40 #include <sys/lock.h> 41 #include <sys/mutex.h> 42 #include <sys/sema.h> 43 #include <sys/taskqueue.h> 44 #include <vm/uma.h> 45 #include <machine/stdarg.h> 46 #include <machine/resource.h> 47 #include <machine/bus.h> 48 #include <sys/rman.h> 49 #include <dev/pci/pcivar.h> 50 #include <dev/pci/pcireg.h> 51 #include <dev/ata/ata-all.h> 52 #include <dev/ata/ata-pci.h> 53 #include <ata_if.h> 54 55 /* local prototypes */ 56 static int ata_amd_ch_attach(device_t dev); 57 static int ata_amd_chipinit(device_t dev); 58 static int ata_amd_setmode(device_t dev, int target, int mode); 59 60 /* misc defines */ 61 #define AMD_BUG 0x01 62 #define AMD_CABLE 0x02 63 64 /* 65 * Advanced Micro Devices (AMD) chipset support functions 66 */ 67 static int 68 ata_amd_probe(device_t dev) 69 { 70 struct ata_pci_controller *ctlr = device_get_softc(dev); 71 static const struct ata_chip_id ids[] = 72 {{ ATA_AMD756, 0x00, 0x00, 0, ATA_UDMA4, "756" }, 73 { ATA_AMD766, 0x00, AMD_CABLE|AMD_BUG, 0, ATA_UDMA5, "766" }, 74 { ATA_AMD768, 0x00, AMD_CABLE, 0, ATA_UDMA5, "768" }, 75 { ATA_AMD8111, 0x00, AMD_CABLE, 0, ATA_UDMA6, "8111" }, 76 { ATA_AMD5536, 0x00, 0x00, 0, ATA_UDMA5, "CS5536" }, 77 { 0, 0, 0, 0, 0, 0}}; 78 79 if (pci_get_vendor(dev) != ATA_AMD_ID) 80 return ENXIO; 81 82 if (!(ctlr->chip = ata_match_chip(dev, ids))) 83 return ENXIO; 84 85 ata_set_desc(dev); 86 ctlr->chipinit = ata_amd_chipinit; 87 return (BUS_PROBE_LOW_PRIORITY); 88 } 89 90 static int 91 ata_amd_chipinit(device_t dev) 92 { 93 struct ata_pci_controller *ctlr = device_get_softc(dev); 94 95 if (ata_setup_interrupt(dev, ata_generic_intr)) 96 return ENXIO; 97 98 /* disable/set prefetch, postwrite */ 99 if (ctlr->chip->cfg1 & AMD_BUG) 100 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) & 0x0f, 1); 101 else 102 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1); 103 104 ctlr->ch_attach = ata_amd_ch_attach; 105 ctlr->setmode = ata_amd_setmode; 106 return 0; 107 } 108 109 static int 110 ata_amd_setmode(device_t dev, int target, int mode) 111 { 112 device_t parent = device_get_parent(dev); 113 struct ata_pci_controller *ctlr = device_get_softc(parent); 114 struct ata_channel *ch = device_get_softc(dev); 115 int devno = (ch->unit << 1) + target; 116 int piomode; 117 static const uint8_t timings[] = 118 { 0xa8, 0x65, 0x42, 0x22, 0x20, 0xa8, 0x22, 0x20 }; 119 static const uint8_t modes[] = 120 { 0xc2, 0xc1, 0xc0, 0xc4, 0xc5, 0xc6, 0xc7 }; 121 int reg = 0x53 - devno; 122 123 mode = min(mode, ctlr->chip->max_dma); 124 if (ctlr->chip->cfg1 & AMD_CABLE) { 125 if (ata_dma_check_80pin && mode > ATA_UDMA2 && 126 !(pci_read_config(parent, 0x42, 1) & (1 << devno))) { 127 ata_print_cable(dev, "controller"); 128 mode = ATA_UDMA2; 129 } 130 } 131 /* Set UDMA timings. */ 132 if (mode >= ATA_UDMA0) { 133 pci_write_config(parent, reg, modes[mode & ATA_MODE_MASK], 1); 134 piomode = ATA_PIO4; 135 } else { 136 pci_write_config(parent, reg, 0x8b, 1); 137 piomode = mode; 138 } 139 /* Set WDMA/PIO timings. */ 140 pci_write_config(parent, reg - 0x08, timings[ata_mode2idx(piomode)], 1); 141 return (mode); 142 } 143 144 static int 145 ata_amd_ch_attach(device_t dev) 146 { 147 struct ata_pci_controller *ctlr; 148 struct ata_channel *ch; 149 int error; 150 151 ctlr = device_get_softc(device_get_parent(dev)); 152 ch = device_get_softc(dev); 153 error = ata_pci_ch_attach(dev); 154 if (ctlr->chip->cfg1 & AMD_CABLE) 155 ch->flags |= ATA_CHECKS_CABLE; 156 return (error); 157 } 158 159 ATA_DECLARE_DRIVER(ata_amd); 160