1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/param.h> 30 #include <sys/module.h> 31 #include <sys/systm.h> 32 #include <sys/kernel.h> 33 #include <sys/ata.h> 34 #include <sys/bus.h> 35 #include <sys/endian.h> 36 #include <sys/malloc.h> 37 #include <sys/lock.h> 38 #include <sys/mutex.h> 39 #include <sys/sema.h> 40 #include <sys/taskqueue.h> 41 #include <vm/uma.h> 42 #include <machine/stdarg.h> 43 #include <machine/resource.h> 44 #include <machine/bus.h> 45 #include <sys/rman.h> 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/ata/ata-all.h> 49 #include <dev/ata/ata-pci.h> 50 #include <ata_if.h> 51 52 /* local prototypes */ 53 static int ata_amd_ch_attach(device_t dev); 54 static int ata_amd_chipinit(device_t dev); 55 static int ata_amd_setmode(device_t dev, int target, int mode); 56 57 /* misc defines */ 58 #define AMD_BUG 0x01 59 #define AMD_CABLE 0x02 60 61 /* 62 * Advanced Micro Devices (AMD) chipset support functions 63 */ 64 static int 65 ata_amd_probe(device_t dev) 66 { 67 struct ata_pci_controller *ctlr = device_get_softc(dev); 68 static const struct ata_chip_id ids[] = 69 {{ ATA_AMD756, 0x00, 0x00, 0, ATA_UDMA4, "756" }, 70 { ATA_AMD766, 0x00, AMD_CABLE|AMD_BUG, 0, ATA_UDMA5, "766" }, 71 { ATA_AMD768, 0x00, AMD_CABLE, 0, ATA_UDMA5, "768" }, 72 { ATA_AMD8111, 0x00, AMD_CABLE, 0, ATA_UDMA6, "8111" }, 73 { ATA_AMD5536, 0x00, 0x00, 0, ATA_UDMA5, "CS5536" }, 74 { 0, 0, 0, 0, 0, 0}}; 75 76 if (pci_get_vendor(dev) != ATA_AMD_ID) 77 return ENXIO; 78 79 if (!(ctlr->chip = ata_match_chip(dev, ids))) 80 return ENXIO; 81 82 ata_set_desc(dev); 83 ctlr->chipinit = ata_amd_chipinit; 84 return (BUS_PROBE_LOW_PRIORITY); 85 } 86 87 static int 88 ata_amd_chipinit(device_t dev) 89 { 90 struct ata_pci_controller *ctlr = device_get_softc(dev); 91 92 if (ata_setup_interrupt(dev, ata_generic_intr)) 93 return ENXIO; 94 95 /* disable/set prefetch, postwrite */ 96 if (ctlr->chip->cfg1 & AMD_BUG) 97 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) & 0x0f, 1); 98 else 99 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1); 100 101 ctlr->ch_attach = ata_amd_ch_attach; 102 ctlr->setmode = ata_amd_setmode; 103 return 0; 104 } 105 106 static int 107 ata_amd_setmode(device_t dev, int target, int mode) 108 { 109 device_t parent = device_get_parent(dev); 110 struct ata_pci_controller *ctlr = device_get_softc(parent); 111 struct ata_channel *ch = device_get_softc(dev); 112 int devno = (ch->unit << 1) + target; 113 int piomode; 114 static const uint8_t timings[] = 115 { 0xa8, 0x65, 0x42, 0x22, 0x20, 0xa8, 0x22, 0x20 }; 116 static const uint8_t modes[] = 117 { 0xc2, 0xc1, 0xc0, 0xc4, 0xc5, 0xc6, 0xc7 }; 118 int reg = 0x53 - devno; 119 120 mode = min(mode, ctlr->chip->max_dma); 121 if (ctlr->chip->cfg1 & AMD_CABLE) { 122 if (ata_dma_check_80pin && mode > ATA_UDMA2 && 123 !(pci_read_config(parent, 0x42, 1) & (1 << devno))) { 124 ata_print_cable(dev, "controller"); 125 mode = ATA_UDMA2; 126 } 127 } 128 /* Set UDMA timings. */ 129 if (mode >= ATA_UDMA0) { 130 pci_write_config(parent, reg, modes[mode & ATA_MODE_MASK], 1); 131 piomode = ATA_PIO4; 132 } else { 133 pci_write_config(parent, reg, 0x8b, 1); 134 piomode = mode; 135 } 136 /* Set WDMA/PIO timings. */ 137 pci_write_config(parent, reg - 0x08, timings[ata_mode2idx(piomode)], 1); 138 return (mode); 139 } 140 141 static int 142 ata_amd_ch_attach(device_t dev) 143 { 144 struct ata_pci_controller *ctlr; 145 struct ata_channel *ch; 146 int error; 147 148 ctlr = device_get_softc(device_get_parent(dev)); 149 ch = device_get_softc(dev); 150 error = ata_pci_ch_attach(dev); 151 if (ctlr->chip->cfg1 & AMD_CABLE) 152 ch->flags |= ATA_CHECKS_CABLE; 153 return (error); 154 } 155 156 ATA_DECLARE_DRIVER(ata_amd); 157