1 /*- 2 * Copyright (c) 1998 - 2008 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include "opt_ata.h" 31 #include <sys/param.h> 32 #include <sys/module.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/ata.h> 36 #include <sys/bus.h> 37 #include <sys/endian.h> 38 #include <sys/malloc.h> 39 #include <sys/lock.h> 40 #include <sys/mutex.h> 41 #include <sys/sema.h> 42 #include <sys/taskqueue.h> 43 #include <vm/uma.h> 44 #include <machine/stdarg.h> 45 #include <machine/resource.h> 46 #include <machine/bus.h> 47 #include <sys/rman.h> 48 #include <dev/pci/pcivar.h> 49 #include <dev/pci/pcireg.h> 50 #include <dev/ata/ata-all.h> 51 #include <dev/ata/ata-pci.h> 52 #include <ata_if.h> 53 54 /* local prototypes */ 55 static int ata_ali_chipinit(device_t dev); 56 static int ata_ali_ch_attach(device_t dev); 57 static int ata_ali_sata_ch_attach(device_t dev); 58 static void ata_ali_reset(device_t dev); 59 static void ata_ali_setmode(device_t dev, int mode); 60 61 /* misc defines */ 62 #define ALI_OLD 0x01 63 #define ALI_NEW 0x02 64 #define ALI_SATA 0x04 65 66 67 /* 68 * Acer Labs Inc (ALI) chipset support functions 69 */ 70 static int 71 ata_ali_probe(device_t dev) 72 { 73 struct ata_pci_controller *ctlr = device_get_softc(dev); 74 static struct ata_chip_id ids[] = 75 {{ ATA_ALI_5289, 0x00, 2, ALI_SATA, ATA_SA150, "M5289" }, 76 { ATA_ALI_5288, 0x00, 4, ALI_SATA, ATA_SA300, "M5288" }, 77 { ATA_ALI_5287, 0x00, 4, ALI_SATA, ATA_SA150, "M5287" }, 78 { ATA_ALI_5281, 0x00, 2, ALI_SATA, ATA_SA150, "M5281" }, 79 { ATA_ALI_5229, 0xc5, 0, ALI_NEW, ATA_UDMA6, "M5229" }, 80 { ATA_ALI_5229, 0xc4, 0, ALI_NEW, ATA_UDMA5, "M5229" }, 81 { ATA_ALI_5229, 0xc2, 0, ALI_NEW, ATA_UDMA4, "M5229" }, 82 { ATA_ALI_5229, 0x20, 0, ALI_OLD, ATA_UDMA2, "M5229" }, 83 { ATA_ALI_5229, 0x00, 0, ALI_OLD, ATA_WDMA2, "M5229" }, 84 { 0, 0, 0, 0, 0, 0}}; 85 86 if (pci_get_vendor(dev) != ATA_ACER_LABS_ID) 87 return ENXIO; 88 89 if (!(ctlr->chip = ata_match_chip(dev, ids))) 90 return ENXIO; 91 92 ata_set_desc(dev); 93 ctlr->chipinit = ata_ali_chipinit; 94 return 0; 95 } 96 97 static int 98 ata_ali_chipinit(device_t dev) 99 { 100 struct ata_pci_controller *ctlr = device_get_softc(dev); 101 102 if (ata_setup_interrupt(dev, ata_generic_intr)) 103 return ENXIO; 104 105 switch (ctlr->chip->cfg2) { 106 case ALI_SATA: 107 ctlr->channels = ctlr->chip->cfg1; 108 ctlr->ch_attach = ata_ali_sata_ch_attach; 109 ctlr->ch_detach = ata_pci_ch_detach; 110 ctlr->setmode = ata_sata_setmode; 111 112 /* AHCI mode is correctly supported only on the ALi 5288. */ 113 if ((ctlr->chip->chipid == ATA_ALI_5288) && 114 (ata_ahci_chipinit(dev) != ENXIO)) 115 return 0; 116 117 /* enable PCI interrupt */ 118 pci_write_config(dev, PCIR_COMMAND, 119 pci_read_config(dev, PCIR_COMMAND, 2) & ~0x0400, 2); 120 break; 121 122 case ALI_NEW: 123 /* use device interrupt as byte count end */ 124 pci_write_config(dev, 0x4a, pci_read_config(dev, 0x4a, 1) | 0x20, 1); 125 126 /* enable cable detection and UDMA support on newer chips */ 127 pci_write_config(dev, 0x4b, pci_read_config(dev, 0x4b, 1) | 0x09, 1); 128 129 /* enable ATAPI UDMA mode */ 130 pci_write_config(dev, 0x53, pci_read_config(dev, 0x53, 1) | 0x01, 1); 131 132 /* only chips with revision > 0xc4 can do 48bit DMA */ 133 if (ctlr->chip->chiprev <= 0xc4) 134 device_printf(dev, 135 "using PIO transfers above 137GB as workaround for " 136 "48bit DMA access bug, expect reduced performance\n"); 137 ctlr->ch_attach = ata_ali_ch_attach; 138 ctlr->ch_detach = ata_pci_ch_detach; 139 ctlr->reset = ata_ali_reset; 140 ctlr->setmode = ata_ali_setmode; 141 break; 142 143 case ALI_OLD: 144 /* deactivate the ATAPI FIFO and enable ATAPI UDMA */ 145 pci_write_config(dev, 0x53, pci_read_config(dev, 0x53, 1) | 0x03, 1); 146 ctlr->setmode = ata_ali_setmode; 147 break; 148 } 149 return 0; 150 } 151 152 static int 153 ata_ali_ch_attach(device_t dev) 154 { 155 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 156 struct ata_channel *ch = device_get_softc(dev); 157 158 /* setup the usual register normal pci style */ 159 if (ata_pci_ch_attach(dev)) 160 return ENXIO; 161 162 /* older chips can't do 48bit DMA transfers */ 163 if (ctlr->chip->chiprev <= 0xc4) 164 ch->flags |= ATA_NO_48BIT_DMA; 165 166 return 0; 167 } 168 169 static int 170 ata_ali_sata_ch_attach(device_t dev) 171 { 172 device_t parent = device_get_parent(dev); 173 struct ata_pci_controller *ctlr = device_get_softc(parent); 174 struct ata_channel *ch = device_get_softc(dev); 175 struct resource *io = NULL, *ctlio = NULL; 176 int unit01 = (ch->unit & 1), unit10 = (ch->unit & 2); 177 int i, rid; 178 179 rid = PCIR_BAR(0) + (unit01 ? 8 : 0); 180 io = bus_alloc_resource_any(parent, SYS_RES_IOPORT, &rid, RF_ACTIVE); 181 if (!io) 182 return ENXIO; 183 184 rid = PCIR_BAR(1) + (unit01 ? 8 : 0); 185 ctlio = bus_alloc_resource_any(parent, SYS_RES_IOPORT, &rid, RF_ACTIVE); 186 if (!ctlio) { 187 bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io); 188 return ENXIO; 189 } 190 191 for (i = ATA_DATA; i <= ATA_COMMAND; i ++) { 192 ch->r_io[i].res = io; 193 ch->r_io[i].offset = i + (unit10 ? 8 : 0); 194 } 195 ch->r_io[ATA_CONTROL].res = ctlio; 196 ch->r_io[ATA_CONTROL].offset = 2 + (unit10 ? 4 : 0); 197 ch->r_io[ATA_IDX_ADDR].res = io; 198 ata_default_registers(dev); 199 if (ctlr->r_res1) { 200 for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) { 201 ch->r_io[i].res = ctlr->r_res1; 202 ch->r_io[i].offset = (i - ATA_BMCMD_PORT)+(ch->unit * ATA_BMIOSIZE); 203 } 204 } 205 ch->flags |= ATA_NO_SLAVE; 206 207 /* XXX SOS PHY handling awkward in ALI chip not supported yet */ 208 ata_pci_hw(dev); 209 return 0; 210 } 211 212 static void 213 ata_ali_reset(device_t dev) 214 { 215 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 216 struct ata_channel *ch = device_get_softc(dev); 217 device_t *children; 218 int nchildren, i; 219 220 ata_generic_reset(dev); 221 222 /* 223 * workaround for datacorruption bug found on at least SUN Blade-100 224 * find the ISA function on the southbridge and disable then enable 225 * the ATA channel tristate buffer 226 */ 227 if (ctlr->chip->chiprev == 0xc3 || ctlr->chip->chiprev == 0xc2) { 228 if (!device_get_children(GRANDPARENT(dev), &children, &nchildren)) { 229 for (i = 0; i < nchildren; i++) { 230 if (pci_get_devid(children[i]) == ATA_ALI_1533) { 231 pci_write_config(children[i], 0x58, 232 pci_read_config(children[i], 0x58, 1) & 233 ~(0x04 << ch->unit), 1); 234 pci_write_config(children[i], 0x58, 235 pci_read_config(children[i], 0x58, 1) | 236 (0x04 << ch->unit), 1); 237 break; 238 } 239 } 240 free(children, M_TEMP); 241 } 242 } 243 } 244 245 static void 246 ata_ali_setmode(device_t dev, int mode) 247 { 248 device_t gparent = GRANDPARENT(dev); 249 struct ata_pci_controller *ctlr = device_get_softc(gparent); 250 struct ata_channel *ch = device_get_softc(device_get_parent(dev)); 251 struct ata_device *atadev = device_get_softc(dev); 252 int devno = (ch->unit << 1) + atadev->unit; 253 int error; 254 255 mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); 256 257 if (ctlr->chip->cfg2 & ALI_NEW) { 258 if (mode > ATA_UDMA2 && 259 pci_read_config(gparent, 0x4a, 1) & (1 << ch->unit)) { 260 ata_print_cable(dev, "controller"); 261 mode = ATA_UDMA2; 262 } 263 } 264 else 265 mode = ata_check_80pin(dev, mode); 266 267 if (ctlr->chip->cfg2 & ALI_OLD) { 268 /* doesn't support ATAPI DMA on write */ 269 ch->flags |= ATA_ATAPI_DMA_RO; 270 if (ch->devices & ATA_ATAPI_MASTER && ch->devices & ATA_ATAPI_SLAVE) { 271 /* doesn't support ATAPI DMA on two ATAPI devices */ 272 device_printf(dev, "two atapi devices on this channel, no DMA\n"); 273 mode = ata_limit_mode(dev, mode, ATA_PIO_MAX); 274 } 275 } 276 277 error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode); 278 279 if (bootverbose) 280 device_printf(dev, "%ssetting %s on %s chip\n", 281 (error) ? "FAILURE " : "", 282 ata_mode2str(mode), ctlr->chip->text); 283 if (!error) { 284 if (mode >= ATA_UDMA0) { 285 u_int8_t udma[] = {0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x0f, 0x0d}; 286 u_int32_t word54 = pci_read_config(gparent, 0x54, 4); 287 288 word54 &= ~(0x000f000f << (devno << 2)); 289 word54 |= (((udma[mode&ATA_MODE_MASK]<<16)|0x05)<<(devno<<2)); 290 pci_write_config(gparent, 0x54, word54, 4); 291 pci_write_config(gparent, 0x58 + (ch->unit << 2), 292 0x00310001, 4); 293 } 294 else { 295 u_int32_t piotimings[] = 296 { 0x006d0003, 0x00580002, 0x00440001, 0x00330001, 297 0x00310001, 0x00440001, 0x00330001, 0x00310001}; 298 299 pci_write_config(gparent, 0x54, pci_read_config(gparent, 0x54, 4) & 300 ~(0x0008000f << (devno << 2)), 4); 301 pci_write_config(gparent, 0x58 + (ch->unit << 2), 302 piotimings[ata_mode2idx(mode)], 4); 303 } 304 atadev->mode = mode; 305 } 306 } 307 308 ATA_DECLARE_DRIVER(ata_ali); 309 MODULE_DEPEND(ata_ali, ata_ahci, 1, 1, 1); 310