1 /*- 2 * Copyright (c) 1998 - 2003 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #include "opt_ata.h" 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/module.h> 36 #include <sys/bus.h> 37 #include <sys/malloc.h> 38 #include <machine/stdarg.h> 39 #include <machine/resource.h> 40 #include <machine/bus.h> 41 #ifdef __alpha__ 42 #include <machine/md_var.h> 43 #endif 44 #include <sys/rman.h> 45 #include <pci/pcivar.h> 46 #include <pci/pcireg.h> 47 #include <dev/ata/ata-all.h> 48 #include <dev/ata/ata-pci.h> 49 50 /* local vars */ 51 static MALLOC_DEFINE(M_ATAPCI, "ATA PCI", "ATA driver PCI"); 52 53 /* misc defines */ 54 #define IOMASK 0xfffffffc 55 56 /* prototypes */ 57 static int ata_pci_allocate(device_t, struct ata_channel *); 58 static int ata_pci_dmainit(struct ata_channel *); 59 static void ata_pci_locknoop(struct ata_channel *, int); 60 61 static int 62 ata_pci_probe(device_t dev) 63 { 64 if (pci_get_class(dev) != PCIC_STORAGE) 65 return ENXIO; 66 67 switch (pci_get_vendor(dev)) { 68 case ATA_ACARD_ID: 69 return ata_acard_ident(dev); 70 case ATA_ACER_LABS_ID: 71 return ata_ali_ident(dev); 72 case ATA_AMD_ID: 73 return ata_amd_ident(dev); 74 case ATA_CYRIX_ID: 75 return ata_cyrix_ident(dev); 76 case ATA_CYPRESS_ID: 77 return ata_cypress_ident(dev); 78 case ATA_HIGHPOINT_ID: 79 return ata_highpoint_ident(dev); 80 case ATA_INTEL_ID: 81 return ata_intel_ident(dev); 82 case ATA_NVIDIA_ID: 83 return ata_nvidia_ident(dev); 84 case ATA_PROMISE_ID: 85 return ata_promise_ident(dev); 86 case ATA_SERVERWORKS_ID: 87 return ata_serverworks_ident(dev); 88 case ATA_SILICON_IMAGE_ID: 89 return ata_sii_ident(dev); 90 case ATA_SIS_ID: 91 return ata_sis_ident(dev); 92 case ATA_VIA_ID: 93 return ata_via_ident(dev); 94 95 case 0x16ca: 96 if (pci_get_devid(dev) == 0x000116ca) { 97 ata_generic_ident(dev); 98 device_set_desc(dev, "Cenatek Rocket Drive controller"); 99 return 0; 100 } 101 return ENXIO; 102 103 case 0x1042: 104 if (pci_get_devid(dev)==0x10001042 || pci_get_devid(dev)==0x10011042) { 105 ata_generic_ident(dev); 106 device_set_desc(dev, 107 "RZ 100? ATA controller !WARNING! buggy HW data loss possible"); 108 return 0; 109 } 110 return ENXIO; 111 112 /* unknown chipset, try generic DMA if it seems possible */ 113 default: 114 if (pci_get_class(dev) == PCIC_STORAGE && 115 (pci_get_subclass(dev) == PCIS_STORAGE_IDE)) 116 return ata_generic_ident(dev); 117 } 118 return ENXIO; 119 } 120 121 static int 122 ata_pci_attach(device_t dev) 123 { 124 struct ata_pci_controller *ctlr = device_get_softc(dev); 125 u_int8_t class, subclass; 126 u_int32_t type, cmd; 127 int unit; 128 129 /* set up vendor-specific stuff */ 130 type = pci_get_devid(dev); 131 class = pci_get_class(dev); 132 subclass = pci_get_subclass(dev); 133 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 134 135 if (!(cmd & PCIM_CMD_PORTEN)) { 136 device_printf(dev, "ATA channel disabled by BIOS\n"); 137 return 0; 138 } 139 140 /* do chipset specific setups only needed once */ 141 if (ATA_MASTERDEV(dev) || pci_read_config(dev, 0x18, 4) & IOMASK) 142 ctlr->channels = 2; 143 else 144 ctlr->channels = 1; 145 ctlr->allocate = ata_pci_allocate; 146 ctlr->dmainit = ata_pci_dmainit; 147 ctlr->locking = ata_pci_locknoop; 148 149 #ifdef __sparc64__ 150 if (!(cmd & PCIM_CMD_BUSMASTEREN)) { 151 pci_write_config(dev, PCIR_COMMAND, cmd | PCIM_CMD_BUSMASTEREN, 2); 152 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 153 } 154 #endif 155 /* is busmastering supported and configured ? */ 156 if ((cmd & PCIM_CMD_BUSMASTEREN) == PCIM_CMD_BUSMASTEREN) { 157 int rid = ATA_BMADDR_RID; 158 159 if (!ctlr->r_io2) { 160 if (!(ctlr->r_io1 = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 161 0, ~0, 1, RF_ACTIVE))) 162 device_printf(dev, "Busmastering DMA not configured\n"); 163 } 164 } 165 else 166 device_printf(dev, "Busmastering DMA not supported\n"); 167 168 ctlr->chipinit(dev); 169 170 /* attach all channels on this controller */ 171 for (unit = 0; unit < ctlr->channels; unit++) 172 device_add_child(dev, "ata", ATA_MASTERDEV(dev) ? 173 unit : devclass_find_free_unit(ata_devclass, 2)); 174 175 return bus_generic_attach(dev); 176 } 177 178 179 static int 180 ata_pci_print_child(device_t dev, device_t child) 181 { 182 struct ata_channel *ch = device_get_softc(child); 183 int retval = 0; 184 185 retval += bus_print_child_header(dev, child); 186 retval += printf(": at 0x%lx", rman_get_start(ch->r_io[ATA_IDX_ADDR].res)); 187 188 if (ATA_MASTERDEV(dev)) 189 retval += printf(" irq %d", 14 + ch->unit); 190 191 retval += bus_print_child_footer(dev, child); 192 193 return retval; 194 } 195 196 static struct resource * 197 ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid, 198 u_long start, u_long end, u_long count, u_int flags) 199 { 200 struct ata_pci_controller *controller = device_get_softc(dev); 201 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 202 struct resource *res = NULL; 203 int myrid; 204 205 if (type == SYS_RES_IOPORT) { 206 switch (*rid) { 207 case ATA_IOADDR_RID: 208 if (ATA_MASTERDEV(dev)) { 209 myrid = 0; 210 start = (unit ? ATA_SECONDARY : ATA_PRIMARY); 211 end = start + ATA_IOSIZE - 1; 212 count = ATA_IOSIZE; 213 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 214 SYS_RES_IOPORT, &myrid, 215 start, end, count, flags); 216 } 217 else { 218 myrid = 0x10 + 8 * unit; 219 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 220 SYS_RES_IOPORT, &myrid, 221 start, end, count, flags); 222 } 223 break; 224 225 case ATA_ALTADDR_RID: 226 if (ATA_MASTERDEV(dev)) { 227 myrid = 0; 228 start = (unit ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET; 229 end = start + ATA_ALTIOSIZE - 1; 230 count = ATA_ALTIOSIZE; 231 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 232 SYS_RES_IOPORT, &myrid, 233 start, end, count, flags); 234 } 235 else { 236 myrid = 0x14 + 8 * unit; 237 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 238 SYS_RES_IOPORT, &myrid, 239 start, end, count, flags); 240 if (res) { 241 start = rman_get_start(res) + 2; 242 end = start + ATA_ALTIOSIZE - 1; 243 count = ATA_ALTIOSIZE; 244 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 245 SYS_RES_IOPORT, myrid, res); 246 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 247 SYS_RES_IOPORT, &myrid, 248 start, end, count, flags); 249 } 250 } 251 break; 252 } 253 return res; 254 } 255 256 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) { 257 if (ATA_MASTERDEV(dev)) { 258 #ifdef __alpha__ 259 return alpha_platform_alloc_ide_intr(unit); 260 #else 261 int irq = (unit == 0 ? 14 : 15); 262 263 return BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 264 SYS_RES_IRQ, rid, irq, irq, 1, flags); 265 #endif 266 } 267 else { 268 return controller->r_irq; 269 } 270 } 271 return 0; 272 } 273 274 static int 275 ata_pci_release_resource(device_t dev, device_t child, int type, int rid, 276 struct resource *r) 277 { 278 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 279 280 if (type == SYS_RES_IOPORT) { 281 switch (rid) { 282 case ATA_IOADDR_RID: 283 if (ATA_MASTERDEV(dev)) 284 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 285 SYS_RES_IOPORT, 0x0, r); 286 else 287 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 288 SYS_RES_IOPORT, 0x10 + 8 * unit, r); 289 break; 290 291 case ATA_ALTADDR_RID: 292 if (ATA_MASTERDEV(dev)) 293 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 294 SYS_RES_IOPORT, 0x0, r); 295 else 296 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 297 SYS_RES_IOPORT, 0x14 + 8 * unit, r); 298 break; 299 default: 300 return ENOENT; 301 } 302 } 303 if (type == SYS_RES_IRQ) { 304 if (rid != ATA_IRQ_RID) 305 return ENOENT; 306 307 if (ATA_MASTERDEV(dev)) { 308 #ifdef __alpha__ 309 return alpha_platform_release_ide_intr(unit, r); 310 #else 311 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 312 SYS_RES_IRQ, rid, r); 313 #endif 314 } 315 else 316 return 0; 317 } 318 return EINVAL; 319 } 320 321 static int 322 ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq, 323 int flags, driver_intr_t *function, void *argument, 324 void **cookiep) 325 { 326 if (ATA_MASTERDEV(dev)) { 327 #ifdef __alpha__ 328 return alpha_platform_setup_ide_intr(child, irq, function, argument, 329 cookiep); 330 #else 331 return BUS_SETUP_INTR(device_get_parent(dev), child, irq, 332 flags, function, argument, cookiep); 333 #endif 334 } 335 else { 336 struct ata_pci_controller *controller = device_get_softc(dev); 337 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 338 339 controller->interrupt[unit].function = function; 340 controller->interrupt[unit].argument = argument; 341 *cookiep = controller; 342 return 0; 343 } 344 } 345 346 static int 347 ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq, 348 void *cookie) 349 { 350 if (ATA_MASTERDEV(dev)) { 351 #ifdef __alpha__ 352 return alpha_platform_teardown_ide_intr(child, irq, cookie); 353 #else 354 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie); 355 #endif 356 } 357 else { 358 struct ata_pci_controller *controller = device_get_softc(dev); 359 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 360 361 controller->interrupt[unit].function = NULL; 362 controller->interrupt[unit].argument = NULL; 363 return 0; 364 } 365 } 366 367 static int 368 ata_pci_allocate(device_t dev, struct ata_channel *ch) 369 { 370 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 371 struct resource *io = NULL, *altio = NULL; 372 int i, rid; 373 374 rid = ATA_IOADDR_RID; 375 io = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 376 0, ~0, ATA_IOSIZE, RF_ACTIVE); 377 if (!io) 378 return ENXIO; 379 380 rid = ATA_ALTADDR_RID; 381 altio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 382 0, ~0, ATA_ALTIOSIZE, RF_ACTIVE); 383 if (!altio) { 384 bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io); 385 return ENXIO; 386 } 387 388 for (i = ATA_DATA; i <= ATA_STATUS; i ++) { 389 ch->r_io[i].res = io; 390 ch->r_io[i].offset = i; 391 } 392 ch->r_io[ATA_ALTSTAT].res = altio; 393 ch->r_io[ATA_ALTSTAT].offset = 0; 394 ch->r_io[ATA_IDX_ADDR].res = io; 395 396 if (ctlr->r_io1) { 397 for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) { 398 ch->r_io[i].res = ctlr->r_io1; 399 ch->r_io[i].offset = (i - ATA_BMCMD_PORT)+(ch->unit * ATA_BMIOSIZE); 400 } 401 402 /* if simplex controller, only allow DMA on primary channel */ 403 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & 404 (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE)); 405 if (ch->unit > 0 && 406 (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX)) 407 device_printf(dev, "simplex device, DMA on primary only\n"); 408 else 409 ctlr->dmainit(ch); 410 } 411 return 0; 412 } 413 414 static int 415 ata_pci_dmastart(struct ata_channel *ch, caddr_t data, int32_t count, int dir) 416 { 417 int error; 418 419 if ((error = ata_dmastart(ch, data, count, dir))) 420 return error; 421 422 ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, ch->dma->mdmatab); 423 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, dir ? ATA_BMCMD_WRITE_READ : 0); 424 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) | 425 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR))); 426 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, 427 ATA_IDX_INB(ch, ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP); 428 return 0; 429 } 430 431 static int 432 ata_pci_dmastop(struct ata_channel *ch) 433 { 434 int error; 435 436 error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT); 437 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, 438 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 439 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR); 440 441 ata_dmastop(ch); 442 443 return (error & ATA_BMSTAT_MASK); 444 } 445 446 static int 447 ata_pci_dmainit(struct ata_channel *ch) 448 { 449 int error; 450 451 if ((error = ata_dmainit(ch))) 452 return error; 453 454 ch->dma->start = ata_pci_dmastart; 455 ch->dma->stop = ata_pci_dmastop; 456 return 0; 457 } 458 459 static void 460 ata_pci_locknoop(struct ata_channel *ch, int flags) 461 { 462 } 463 464 static device_method_t ata_pci_methods[] = { 465 /* device interface */ 466 DEVMETHOD(device_probe, ata_pci_probe), 467 DEVMETHOD(device_attach, ata_pci_attach), 468 DEVMETHOD(device_detach, ata_pci_attach), 469 DEVMETHOD(device_shutdown, bus_generic_shutdown), 470 DEVMETHOD(device_suspend, bus_generic_suspend), 471 DEVMETHOD(device_resume, bus_generic_resume), 472 473 /* bus methods */ 474 DEVMETHOD(bus_print_child, ata_pci_print_child), 475 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource), 476 DEVMETHOD(bus_release_resource, ata_pci_release_resource), 477 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 478 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 479 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr), 480 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr), 481 { 0, 0 } 482 }; 483 484 static driver_t ata_pci_driver = { 485 "atapci", 486 ata_pci_methods, 487 sizeof(struct ata_pci_controller), 488 }; 489 490 static devclass_t ata_pci_devclass; 491 492 DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0); 493 494 static int 495 ata_pcisub_probe(device_t dev) 496 { 497 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 498 struct ata_channel *ch = device_get_softc(dev); 499 device_t *children; 500 int count, error, i; 501 502 /* find channel number on this controller */ 503 device_get_children(device_get_parent(dev), &children, &count); 504 for (i = 0; i < count; i++) { 505 if (children[i] == dev) 506 ch->unit = i; 507 } 508 free(children, M_TEMP); 509 510 if ((error = ctlr->allocate(dev, ch))) 511 return error; 512 513 if (ctlr->chip) 514 ch->chiptype = ctlr->chip->chipid; 515 ch->device[MASTER].setmode = ctlr->setmode; 516 ch->device[SLAVE].setmode = ctlr->setmode; 517 ch->locking = ctlr->locking; 518 return ata_probe(dev); 519 } 520 521 static device_method_t ata_pcisub_methods[] = { 522 /* device interface */ 523 DEVMETHOD(device_probe, ata_pcisub_probe), 524 DEVMETHOD(device_attach, ata_attach), 525 DEVMETHOD(device_detach, ata_detach), 526 DEVMETHOD(device_suspend, ata_suspend), 527 DEVMETHOD(device_resume, ata_resume), 528 { 0, 0 } 529 }; 530 531 static driver_t ata_pcisub_driver = { 532 "ata", 533 ata_pcisub_methods, 534 sizeof(struct ata_channel), 535 }; 536 537 DRIVER_MODULE(ata, atapci, ata_pcisub_driver, ata_devclass, 0, 0); 538