1 /*- 2 * Copyright (c) 1998,1999,2000,2001 S�ren Schmidt 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/disk.h> 35 #include <sys/module.h> 36 #include <sys/bus.h> 37 #include <sys/bio.h> 38 #include <sys/malloc.h> 39 #include <sys/devicestat.h> 40 #include <sys/sysctl.h> 41 #include <machine/stdarg.h> 42 #include <machine/resource.h> 43 #include <machine/bus.h> 44 #ifdef __alpha__ 45 #include <machine/md_var.h> 46 #endif 47 #include <sys/rman.h> 48 #include <pci/pcivar.h> 49 #include <pci/pcireg.h> 50 #include <dev/ata/ata-all.h> 51 52 /* misc defines */ 53 #define IOMASK 0xfffffffc 54 #define ATA_MASTERDEV(dev) ((pci_get_progif(dev) & 0x80) && \ 55 (pci_get_progif(dev) & 0x05) != 0x05) 56 57 struct ata_pci_softc { 58 struct resource *bmio; 59 int bmaddr; 60 struct resource *irq; 61 int irqcnt; 62 }; 63 64 int 65 ata_find_dev(device_t dev, u_int32_t type, u_int32_t revid) 66 { 67 device_t *children, child; 68 int nchildren, i; 69 70 if (device_get_children(device_get_parent(dev), &children, &nchildren)) 71 return 0; 72 73 for (i = 0; i < nchildren; i++) { 74 child = children[i]; 75 76 /* check that it's on the same silicon and the device we want */ 77 if (pci_get_slot(dev) == pci_get_slot(child) && 78 pci_get_vendor(child) == (type & 0xffff) && 79 pci_get_device(child) == ((type & 0xffff0000) >> 16) && 80 pci_get_revid(child) >= revid) { 81 free(children, M_TEMP); 82 return 1; 83 } 84 } 85 free(children, M_TEMP); 86 return 0; 87 } 88 89 static const char * 90 ata_pci_match(device_t dev) 91 { 92 if (pci_get_class(dev) != PCIC_STORAGE) 93 return NULL; 94 95 switch (pci_get_devid(dev)) { 96 /* supported chipsets */ 97 case 0x12308086: 98 return "Intel PIIX ATA controller"; 99 100 case 0x70108086: 101 return "Intel PIIX3 ATA controller"; 102 103 case 0x71118086: 104 case 0x71998086: 105 return "Intel PIIX4 ATA33 controller"; 106 107 case 0x24218086: 108 return "Intel ICH0 ATA33 controller"; 109 110 case 0x24118086: 111 return "Intel ICH ATA66 controller"; 112 113 case 0x244a8086: 114 case 0x244b8086: 115 return "Intel ICH2 ATA100 controller"; 116 117 case 0x522910b9: 118 if (pci_get_revid(dev) < 0x20) 119 return "AcerLabs Aladdin ATA controller"; 120 else 121 return "AcerLabs Aladdin ATA33 controller"; 122 123 case 0x05711106: 124 if (ata_find_dev(dev, 0x05861106, 0x02)) 125 return "VIA 82C586 ATA33 controller"; 126 if (ata_find_dev(dev, 0x05861106, 0)) 127 return "VIA 82C586 ATA controller"; 128 if (ata_find_dev(dev, 0x05961106, 0x12)) 129 return "VIA 82C596 ATA66 controller"; 130 if (ata_find_dev(dev, 0x05961106, 0)) 131 return "VIA 82C596 ATA33 controller"; 132 if (ata_find_dev(dev, 0x06861106, 0x40)) 133 return "VIA 82C686 ATA100 controller"; 134 if (ata_find_dev(dev, 0x06861106, 0)) 135 return "VIA 82C686 ATA66 controller"; 136 return "VIA Apollo ATA controller"; 137 138 case 0x55131039: 139 return "SiS 5591 ATA33 controller"; 140 141 case 0x06491095: 142 return "CMD 649 ATA100 controller"; 143 144 case 0x06481095: 145 return "CMD 648 ATA66 controller"; 146 147 case 0x06461095: 148 return "CMD 646 ATA controller"; 149 150 case 0xc6931080: 151 if (pci_get_subclass(dev) == PCIS_STORAGE_IDE) 152 return "Cypress 82C693 ATA controller"; 153 break; 154 155 case 0x01021078: 156 return "Cyrix 5530 ATA33 controller"; 157 158 case 0x74091022: 159 return "AMD 756 ATA66 controller"; 160 161 case 0x02111166: 162 return "ServerWorks ROSB4 ATA33 controller"; 163 164 case 0x4d33105a: 165 return "Promise ATA33 controller"; 166 167 case 0x4d38105a: 168 return "Promise ATA66 controller"; 169 170 case 0x0d30105a: 171 case 0x4d30105a: 172 return "Promise ATA100 controller"; 173 174 case 0x00041103: 175 switch (pci_get_revid(dev)) { 176 case 0x00: 177 case 0x01: 178 return "HighPoint HPT366 ATA66 controller"; 179 case 0x02: 180 return "HighPoint HPT368 ATA66 controller"; 181 case 0x03: 182 case 0x04: 183 return "HighPoint HPT370 ATA100 controller"; 184 default: 185 return "Unknown revision HighPoint ATA controller"; 186 } 187 188 /* unsupported but known chipsets, generic DMA only */ 189 case 0x10001042: 190 case 0x10011042: 191 return "RZ 100? ATA controller !WARNING! buggy chip data loss possible"; 192 193 case 0x06401095: 194 return "CMD 640 ATA controller !WARNING! buggy chip data loss possible"; 195 196 /* unknown chipsets, try generic DMA if it seems possible */ 197 default: 198 if (pci_get_class(dev) == PCIC_STORAGE && 199 (pci_get_subclass(dev) == PCIS_STORAGE_IDE)) 200 return "Generic PCI ATA controller"; 201 } 202 return NULL; 203 } 204 205 static int 206 ata_pci_probe(device_t dev) 207 { 208 const char *desc = ata_pci_match(dev); 209 210 if (desc) { 211 device_set_desc(dev, desc); 212 return 0; 213 } 214 else 215 return ENXIO; 216 } 217 218 static int 219 ata_pci_add_child(device_t dev, int unit) 220 { 221 device_t child; 222 223 /* check if this is located at one of the std addresses */ 224 if (ATA_MASTERDEV(dev)) { 225 if (!(child = device_add_child(dev, "ata", unit))) 226 return ENOMEM; 227 } 228 else { 229 if (!(child = device_add_child(dev, "ata", 2))) 230 return ENOMEM; 231 } 232 return 0; 233 } 234 235 static int 236 ata_pci_attach(device_t dev) 237 { 238 struct ata_pci_softc *sc = device_get_softc(dev); 239 u_int8_t class, subclass; 240 u_int32_t type, cmd; 241 int rid; 242 243 /* set up vendor-specific stuff */ 244 type = pci_get_devid(dev); 245 class = pci_get_class(dev); 246 subclass = pci_get_subclass(dev); 247 cmd = pci_read_config(dev, PCIR_COMMAND, 4); 248 249 if (!(cmd & PCIM_CMD_PORTEN)) { 250 device_printf(dev, "ATA channel disabled by BIOS\n"); 251 return 0; 252 } 253 254 /* is busmastering supported ? */ 255 if ((cmd & (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) == 256 (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) { 257 258 /* is there a valid port range to connect to ? */ 259 rid = 0x20; 260 sc->bmio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 261 0, ~0, 1, RF_ACTIVE); 262 if (!sc->bmio) 263 device_printf(dev, "Busmastering DMA not configured\n"); 264 } 265 else 266 device_printf(dev, "Busmastering DMA not supported\n"); 267 268 /* do extra chipset specific setups */ 269 switch (type) { 270 case 0x522910b9: /* Aladdin need to activate the ATAPI FIFO */ 271 pci_write_config(dev, 0x53, 272 (pci_read_config(dev, 0x53, 1) & ~0x01) | 0x02, 1); 273 break; 274 275 case 0x4d38105a: /* Promise 66 & 100 need their clock changed */ 276 case 0x4d30105a: 277 case 0x0d30105a: 278 ATA_OUTB(sc->bmio, 0x11, ATA_INB(sc->bmio, 0x11) | 0x0a); 279 /* FALLTHROUGH */ 280 281 case 0x4d33105a: /* Promise (all) need burst mode to be turned on */ 282 ATA_OUTB(sc->bmio, 0x1f, ATA_INB(sc->bmio, 0x1f) | 0x01); 283 break; 284 285 case 0x00041103: /* HighPoint */ 286 switch (pci_get_revid(dev)) { 287 case 0x00: 288 case 0x01: 289 /* turn off interrupt prediction */ 290 pci_write_config(dev, 0x51, 291 (pci_read_config(dev, 0x51, 1) & ~0x80), 1); 292 break; 293 294 case 0x02: 295 case 0x03: 296 case 0x04: 297 /* turn off interrupt prediction */ 298 pci_write_config(dev, 0x51, 299 (pci_read_config(dev, 0x51, 1) & ~0x02), 1); 300 pci_write_config(dev, 0x55, 301 (pci_read_config(dev, 0x55, 1) & ~0x02), 1); 302 /* turn on interrupts */ 303 pci_write_config(dev, 0x5a, 304 (pci_read_config(dev, 0x5a, 1) & ~0x10), 1); 305 306 } 307 break; 308 309 case 0x05711106: 310 case 0x74091022: /* VIA 82C586, 82C596, 82C686 & AMD 756 default setup */ 311 312 /* set prefetch, postwrite */ 313 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1); 314 315 /* set fifo configuration half'n'half */ 316 pci_write_config(dev, 0x43, 317 (pci_read_config(dev, 0x43, 1) & 0x90) | 0x2a, 1); 318 319 /* set status register read retry */ 320 pci_write_config(dev, 0x44, pci_read_config(dev, 0x44, 1) | 0x08, 1); 321 322 /* set DMA read & end-of-sector fifo flush */ 323 pci_write_config(dev, 0x46, 324 (pci_read_config(dev, 0x46, 1) & 0x0c) | 0xf0, 1); 325 326 /* set sector size */ 327 pci_write_config(dev, 0x60, DEV_BSIZE, 2); 328 pci_write_config(dev, 0x68, DEV_BSIZE, 2); 329 330 /* prepare for ATA-66 on the 82C686 and rev 0x12 and newer 82C596's */ 331 if (ata_find_dev(dev, 0x06861106, 0) || 332 ata_find_dev(dev, 0x05961106, 0x12)) { 333 pci_write_config(dev, 0x50, 334 pci_read_config(dev, 0x50, 4) | 0x070f070f, 4); 335 } 336 break; 337 338 case 0x10001042: /* RZ 100? known bad, no DMA */ 339 case 0x10011042: 340 case 0x06401095: /* CMD 640 known bad, no DMA */ 341 sc->bmio = NULL; 342 device_printf(dev, "Busmastering DMA disabled\n"); 343 } 344 345 if (sc->bmio) { 346 sc->bmaddr = rman_get_start(sc->bmio); 347 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 348 SYS_RES_IOPORT, rid, sc->bmio); 349 sc->bmio = NULL; 350 } 351 352 /* 353 * the Cypress chip is a mess, it contains two ATA functions, but 354 * both channels are visible on the first one. 355 * simply ignore the second function for now, as the right 356 * solution (ignoring the second channel on the first function) 357 * doesn't work with the crappy ATA interrupt setup on the alpha. 358 */ 359 if (pci_get_devid(dev) == 0xc6931080 && pci_get_function(dev) > 1) 360 return 0; 361 362 ata_pci_add_child(dev, 0); 363 364 if (ATA_MASTERDEV(dev) || pci_read_config(dev, 0x18, 4) & IOMASK) 365 ata_pci_add_child(dev, 1); 366 367 return bus_generic_attach(dev); 368 } 369 370 static int 371 ata_pci_intr(struct ata_softc *scp) 372 { 373 u_int8_t dmastat; 374 375 /* 376 * since we might share the IRQ with another device, and in some 377 * cases with our twin channel, we only want to process interrupts 378 * that we know this channel generated. 379 */ 380 switch (scp->chiptype) { 381 case 0x00041103: /* HighPoint HPT366/368/370 */ 382 if (((dmastat = ata_dmastatus(scp)) & 383 (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) != ATA_BMSTAT_INTERRUPT) 384 return 1; 385 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT); 386 DELAY(1); 387 return 0; 388 389 case 0x06481095: /* CMD 648 */ 390 case 0x06491095: /* CMD 649 */ 391 if (!(pci_read_config(device_get_parent(scp->dev), 0x71, 1) & 392 (scp->channel ? 0x08 : 0x04))) 393 return 1; 394 break; 395 396 case 0x4d33105a: /* Promise Ultra/Fasttrak 33 */ 397 case 0x4d38105a: /* Promise Ultra/Fasttrak 66 */ 398 case 0x4d30105a: /* Promise Ultra/Fasttrak 100 */ 399 case 0x0d30105a: /* Promise OEM ATA100 */ 400 if (!(ATA_INL(scp->r_bmio, (scp->channel ? 0x14 : 0x1c)) & 401 (scp->channel ? 0x00004000 : 0x00000400))) 402 return 1; 403 break; 404 } 405 406 if (scp->flags & ATA_DMA_ACTIVE) { 407 if (!((dmastat = ata_dmastatus(scp)) & ATA_BMSTAT_INTERRUPT)) 408 return 1; 409 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT); 410 DELAY(1); 411 } 412 return 0; 413 } 414 415 static int 416 ata_pci_print_child(device_t dev, device_t child) 417 { 418 struct ata_softc *scp = device_get_softc(child); 419 int retval = 0; 420 421 retval += bus_print_child_header(dev, child); 422 retval += printf(": at 0x%lx", rman_get_start(scp->r_io)); 423 424 if (ATA_MASTERDEV(dev)) 425 retval += printf(" irq %d", 14 + scp->channel); 426 427 retval += bus_print_child_footer(dev, child); 428 429 return retval; 430 } 431 432 static struct resource * 433 ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid, 434 u_long start, u_long end, u_long count, u_int flags) 435 { 436 struct ata_pci_softc *sc = device_get_softc(dev); 437 struct resource *res = NULL; 438 int channel = ((struct ata_softc *)device_get_softc(child))->channel; 439 int myrid; 440 441 if (type == SYS_RES_IOPORT) { 442 switch (*rid) { 443 case ATA_IOADDR_RID: 444 if (ATA_MASTERDEV(dev)) { 445 myrid = 0; 446 start = (channel ? ATA_SECONDARY : ATA_PRIMARY); 447 end = start + ATA_IOSIZE - 1; 448 count = ATA_IOSIZE; 449 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 450 SYS_RES_IOPORT, &myrid, 451 start, end, count, flags); 452 } 453 else { 454 myrid = 0x10 + 8 * channel; 455 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 456 SYS_RES_IOPORT, &myrid, 457 start, end, count, flags); 458 } 459 break; 460 461 case ATA_ALTADDR_RID: 462 if (ATA_MASTERDEV(dev)) { 463 myrid = 0; 464 start = (channel ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET; 465 end = start + ATA_ALTIOSIZE - 1; 466 count = ATA_ALTIOSIZE; 467 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 468 SYS_RES_IOPORT, &myrid, 469 start, end, count, flags); 470 } 471 else { 472 myrid = 0x14 + 8 * channel; 473 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 474 SYS_RES_IOPORT, &myrid, 475 start, end, count, flags); 476 if (res) { 477 start = rman_get_start(res) + 2; 478 end = rman_get_start(res) + ATA_ALTIOSIZE - 1; 479 count = ATA_ALTIOSIZE; 480 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 481 SYS_RES_IOPORT, myrid, res); 482 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 483 SYS_RES_IOPORT, &myrid, 484 start, end, count, flags); 485 } 486 } 487 break; 488 489 case ATA_BMADDR_RID: 490 if (sc->bmaddr) { 491 myrid = 0x20; 492 start = (channel == 0 ? sc->bmaddr : sc->bmaddr + ATA_BMIOSIZE); 493 end = start + ATA_BMIOSIZE - 1; 494 count = ATA_BMIOSIZE; 495 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 496 SYS_RES_IOPORT, &myrid, 497 start, end, count, flags); 498 } 499 } 500 return res; 501 } 502 503 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) { 504 if (ATA_MASTERDEV(dev)) { 505 #ifdef __alpha__ 506 return alpha_platform_alloc_ide_intr(channel); 507 #else 508 int irq = (channel == 0 ? 14 : 15); 509 510 return BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 511 SYS_RES_IRQ, rid, 512 irq, irq, 1, flags & ~RF_SHAREABLE); 513 #endif 514 } 515 else { 516 /* primary and secondary channels share interrupt, keep track */ 517 if (!sc->irq) 518 sc->irq = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 519 SYS_RES_IRQ, rid, 0, ~0, 1, flags); 520 sc->irqcnt++; 521 return sc->irq; 522 } 523 } 524 return 0; 525 } 526 527 static int 528 ata_pci_release_resource(device_t dev, device_t child, int type, int rid, 529 struct resource *r) 530 { 531 struct ata_pci_softc *sc = device_get_softc(dev); 532 int channel = ((struct ata_softc *)device_get_softc(child))->channel; 533 534 if (type == SYS_RES_IOPORT) { 535 switch (rid) { 536 case ATA_IOADDR_RID: 537 if (ATA_MASTERDEV(dev)) 538 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 539 SYS_RES_IOPORT, 0x0, r); 540 else 541 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 542 SYS_RES_IOPORT, 0x10+8*channel, r); 543 break; 544 545 case ATA_ALTADDR_RID: 546 if (ATA_MASTERDEV(dev)) 547 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 548 SYS_RES_IOPORT, 0x0, r); 549 else 550 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 551 SYS_RES_IOPORT, 0x14+8*channel, r); 552 break; 553 554 case ATA_BMADDR_RID: 555 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 556 SYS_RES_IOPORT, 0x20, r); 557 default: 558 return ENOENT; 559 } 560 } 561 if (type == SYS_RES_IRQ) { 562 if (rid != ATA_IRQ_RID) 563 return ENOENT; 564 565 if (ATA_MASTERDEV(dev)) { 566 #ifdef __alpha__ 567 return alpha_platform_release_ide_intr(channel, r); 568 #else 569 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 570 SYS_RES_IRQ, rid, r); 571 #endif 572 } 573 else { 574 /* primary and secondary channels share interrupt, keep track */ 575 if (--sc->irqcnt) 576 return 0; 577 sc->irq = 0; 578 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 579 SYS_RES_IRQ, rid, r); 580 } 581 } 582 return EINVAL; 583 } 584 585 static int 586 ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq, 587 int flags, driver_intr_t *intr, void *arg, 588 void **cookiep) 589 { 590 if (ATA_MASTERDEV(dev)) { 591 #ifdef __alpha__ 592 return alpha_platform_setup_ide_intr(child, irq, intr, arg, cookiep); 593 #else 594 return BUS_SETUP_INTR(device_get_parent(dev), child, irq, 595 flags, intr, arg, cookiep); 596 #endif 597 } 598 else 599 return BUS_SETUP_INTR(device_get_parent(dev), dev, irq, 600 flags, intr, arg, cookiep); 601 } 602 603 static int 604 ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq, 605 void *cookie) 606 { 607 if (ATA_MASTERDEV(dev)) { 608 #ifdef __alpha__ 609 return alpha_platform_teardown_ide_intr(child, irq, cookie); 610 #else 611 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie); 612 #endif 613 } 614 else 615 return BUS_TEARDOWN_INTR(device_get_parent(dev), dev, irq, cookie); 616 } 617 618 static device_method_t ata_pci_methods[] = { 619 /* device interface */ 620 DEVMETHOD(device_probe, ata_pci_probe), 621 DEVMETHOD(device_attach, ata_pci_attach), 622 DEVMETHOD(device_shutdown, bus_generic_shutdown), 623 DEVMETHOD(device_suspend, bus_generic_suspend), 624 DEVMETHOD(device_resume, bus_generic_resume), 625 626 /* bus methods */ 627 DEVMETHOD(bus_print_child, ata_pci_print_child), 628 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource), 629 DEVMETHOD(bus_release_resource, ata_pci_release_resource), 630 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 631 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 632 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr), 633 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr), 634 { 0, 0 } 635 }; 636 637 static driver_t ata_pci_driver = { 638 "atapci", 639 ata_pci_methods, 640 sizeof(struct ata_pci_softc), 641 }; 642 643 static devclass_t ata_pci_devclass; 644 645 DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0); 646 647 static int 648 ata_pcisub_probe(device_t dev) 649 { 650 struct ata_softc *scp = device_get_softc(dev); 651 device_t *children; 652 int count, i; 653 654 /* find channel number on this controller */ 655 device_get_children(device_get_parent(dev), &children, &count); 656 for (i = 0; i < count; i++) { 657 if (children[i] == dev) 658 scp->channel = i; 659 } 660 free(children, M_TEMP); 661 scp->chiptype = pci_get_devid(device_get_parent(dev)); 662 scp->intr_func = ata_pci_intr; 663 return ata_probe(dev); 664 } 665 666 static device_method_t ata_pcisub_methods[] = { 667 /* device interface */ 668 DEVMETHOD(device_probe, ata_pcisub_probe), 669 DEVMETHOD(device_attach, ata_attach), 670 DEVMETHOD(device_detach, ata_detach), 671 DEVMETHOD(device_resume, ata_resume), 672 { 0, 0 } 673 }; 674 675 static driver_t ata_pcisub_driver = { 676 "ata", 677 ata_pcisub_methods, 678 sizeof(struct ata_softc), 679 }; 680 681 DRIVER_MODULE(ata, atapci, ata_pcisub_driver, ata_devclass, 0, 0); 682