1 /*- 2 * Copyright (c) 1998,1999,2000,2001 S�ren Schmidt 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/disk.h> 35 #include <sys/module.h> 36 #include <sys/bus.h> 37 #include <sys/bio.h> 38 #include <sys/malloc.h> 39 #include <sys/devicestat.h> 40 #include <sys/sysctl.h> 41 #include <machine/stdarg.h> 42 #include <machine/resource.h> 43 #include <machine/bus.h> 44 #ifdef __alpha__ 45 #include <machine/md_var.h> 46 #endif 47 #include <sys/rman.h> 48 #include <pci/pcivar.h> 49 #include <pci/pcireg.h> 50 #include <dev/ata/ata-all.h> 51 52 /* misc defines */ 53 #define IOMASK 0xfffffffc 54 #define ATA_MASTERDEV(dev) ((pci_get_progif(dev) & 0x80) && \ 55 (pci_get_progif(dev) & 0x05) != 0x05) 56 57 struct ata_pci_softc { 58 struct resource *bmio; 59 int bmaddr; 60 struct resource *irq; 61 int irqcnt; 62 }; 63 64 int 65 ata_find_dev(device_t dev, u_int32_t type, u_int32_t revid) 66 { 67 device_t *children, child; 68 int nchildren, i; 69 70 if (device_get_children(device_get_parent(dev), &children, &nchildren)) 71 return 0; 72 73 for (i = 0; i < nchildren; i++) { 74 child = children[i]; 75 76 /* check that it's on the same silicon and the device we want */ 77 if (pci_get_slot(dev) == pci_get_slot(child) && 78 pci_get_vendor(child) == (type & 0xffff) && 79 pci_get_device(child) == ((type & 0xffff0000) >> 16) && 80 pci_get_revid(child) >= revid) { 81 free(children, M_TEMP); 82 return 1; 83 } 84 } 85 free(children, M_TEMP); 86 return 0; 87 } 88 89 static const char * 90 ata_pci_match(device_t dev) 91 { 92 if (pci_get_class(dev) != PCIC_STORAGE) 93 return NULL; 94 95 switch (pci_get_devid(dev)) { 96 /* supported chipsets */ 97 case 0x12308086: 98 return "Intel PIIX ATA controller"; 99 100 case 0x70108086: 101 return "Intel PIIX3 ATA controller"; 102 103 case 0x71118086: 104 case 0x71998086: 105 return "Intel PIIX4 ATA33 controller"; 106 107 case 0x24218086: 108 return "Intel ICH0 ATA33 controller"; 109 110 case 0x24118086: 111 return "Intel ICH ATA66 controller"; 112 113 case 0x244a8086: 114 case 0x244b8086: 115 return "Intel ICH2 ATA100 controller"; 116 117 case 0x522910b9: 118 if (pci_get_revid(dev) < 0x20) 119 return "AcerLabs Aladdin ATA controller"; 120 else 121 return "AcerLabs Aladdin ATA33 controller"; 122 123 case 0x05711106: 124 if (ata_find_dev(dev, 0x05861106, 0x02)) 125 return "VIA 82C586 ATA33 controller"; 126 if (ata_find_dev(dev, 0x05861106, 0)) 127 return "VIA 82C586 ATA controller"; 128 if (ata_find_dev(dev, 0x05961106, 0x12)) 129 return "VIA 82C596 ATA66 controller"; 130 if (ata_find_dev(dev, 0x05961106, 0)) 131 return "VIA 82C596 ATA33 controller"; 132 if (ata_find_dev(dev, 0x06861106, 0x40)) 133 return "VIA 82C686 ATA100 controller"; 134 if (ata_find_dev(dev, 0x06861106, 0)) 135 return "VIA 82C686 ATA66 controller"; 136 return "VIA Apollo ATA controller"; 137 138 case 0x55131039: 139 return "SiS 5591 ATA33 controller"; 140 141 case 0x06491095: 142 return "CMD 649 ATA100 controller"; 143 144 case 0x06481095: 145 return "CMD 648 ATA66 controller"; 146 147 case 0x06461095: 148 return "CMD 646 ATA controller"; 149 150 case 0xc6931080: 151 if (pci_get_subclass(dev) == PCIS_STORAGE_IDE) 152 return "Cypress 82C693 ATA controller"; 153 break; 154 155 case 0x01021078: 156 return "Cyrix 5530 ATA33 controller"; 157 158 case 0x74091022: 159 return "AMD 756 ATA66 controller"; 160 161 case 0x74111022: 162 return "AMD 766 ATA100 controller"; 163 164 case 0x02111166: 165 return "ServerWorks ROSB4 ATA33 controller"; 166 167 case 0x4d33105a: 168 return "Promise ATA33 controller"; 169 170 case 0x4d38105a: 171 return "Promise ATA66 controller"; 172 173 case 0x0d30105a: 174 case 0x4d30105a: 175 return "Promise ATA100 controller"; 176 177 case 0x00041103: 178 switch (pci_get_revid(dev)) { 179 case 0x00: 180 case 0x01: 181 return "HighPoint HPT366 ATA66 controller"; 182 case 0x02: 183 return "HighPoint HPT368 ATA66 controller"; 184 case 0x03: 185 case 0x04: 186 return "HighPoint HPT370 ATA100 controller"; 187 default: 188 return "Unknown revision HighPoint ATA controller"; 189 } 190 191 /* unsupported but known chipsets, generic DMA only */ 192 case 0x10001042: 193 case 0x10011042: 194 return "RZ 100? ATA controller !WARNING! buggy chip data loss possible"; 195 196 case 0x06401095: 197 return "CMD 640 ATA controller !WARNING! buggy chip data loss possible"; 198 199 /* unknown chipsets, try generic DMA if it seems possible */ 200 default: 201 if (pci_get_class(dev) == PCIC_STORAGE && 202 (pci_get_subclass(dev) == PCIS_STORAGE_IDE)) 203 return "Generic PCI ATA controller"; 204 } 205 return NULL; 206 } 207 208 static int 209 ata_pci_probe(device_t dev) 210 { 211 const char *desc = ata_pci_match(dev); 212 213 if (desc) { 214 device_set_desc(dev, desc); 215 return 0; 216 } 217 else 218 return ENXIO; 219 } 220 221 static int 222 ata_pci_add_child(device_t dev, int unit) 223 { 224 device_t child; 225 226 /* check if this is located at one of the std addresses */ 227 if (ATA_MASTERDEV(dev)) { 228 if (!(child = device_add_child(dev, "ata", unit))) 229 return ENOMEM; 230 } 231 else { 232 if (!(child = device_add_child(dev, "ata", 2))) 233 return ENOMEM; 234 } 235 return 0; 236 } 237 238 static int 239 ata_pci_attach(device_t dev) 240 { 241 struct ata_pci_softc *sc = device_get_softc(dev); 242 u_int8_t class, subclass; 243 u_int32_t type, cmd; 244 int rid; 245 246 /* set up vendor-specific stuff */ 247 type = pci_get_devid(dev); 248 class = pci_get_class(dev); 249 subclass = pci_get_subclass(dev); 250 cmd = pci_read_config(dev, PCIR_COMMAND, 4); 251 252 if (!(cmd & PCIM_CMD_PORTEN)) { 253 device_printf(dev, "ATA channel disabled by BIOS\n"); 254 return 0; 255 } 256 257 /* is busmastering supported ? */ 258 if ((cmd & (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) == 259 (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) { 260 261 /* is there a valid port range to connect to ? */ 262 rid = 0x20; 263 sc->bmio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 264 0, ~0, 1, RF_ACTIVE); 265 if (!sc->bmio) 266 device_printf(dev, "Busmastering DMA not configured\n"); 267 } 268 else 269 device_printf(dev, "Busmastering DMA not supported\n"); 270 271 /* do extra chipset specific setups */ 272 switch (type) { 273 case 0x522910b9: /* Aladdin need to activate the ATAPI FIFO */ 274 pci_write_config(dev, 0x53, 275 (pci_read_config(dev, 0x53, 1) & ~0x01) | 0x02, 1); 276 break; 277 278 case 0x4d38105a: /* Promise 66 & 100 need their clock changed */ 279 case 0x4d30105a: 280 case 0x0d30105a: 281 ATA_OUTB(sc->bmio, 0x11, ATA_INB(sc->bmio, 0x11) | 0x0a); 282 /* FALLTHROUGH */ 283 284 case 0x4d33105a: /* Promise (all) need burst mode to be turned on */ 285 ATA_OUTB(sc->bmio, 0x1f, ATA_INB(sc->bmio, 0x1f) | 0x01); 286 break; 287 288 case 0x00041103: /* HighPoint */ 289 switch (pci_get_revid(dev)) { 290 case 0x00: 291 case 0x01: 292 /* turn off interrupt prediction */ 293 pci_write_config(dev, 0x51, 294 (pci_read_config(dev, 0x51, 1) & ~0x80), 1); 295 break; 296 297 case 0x02: 298 case 0x03: 299 case 0x04: 300 /* turn off interrupt prediction */ 301 pci_write_config(dev, 0x51, 302 (pci_read_config(dev, 0x51, 1) & ~0x02), 1); 303 pci_write_config(dev, 0x55, 304 (pci_read_config(dev, 0x55, 1) & ~0x02), 1); 305 /* turn on interrupts */ 306 pci_write_config(dev, 0x5a, 307 (pci_read_config(dev, 0x5a, 1) & ~0x10), 1); 308 309 } 310 break; 311 312 case 0x05711106: 313 case 0x74091022: 314 case 0x74111022: /* VIA 82C586, '596, '686 & AMD 756, '766 default setup */ 315 316 /* set prefetch, postwrite */ 317 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1); 318 319 /* set fifo configuration half'n'half */ 320 pci_write_config(dev, 0x43, 321 (pci_read_config(dev, 0x43, 1) & 0x90) | 0x2a, 1); 322 323 /* set status register read retry */ 324 pci_write_config(dev, 0x44, pci_read_config(dev, 0x44, 1) | 0x08, 1); 325 326 /* set DMA read & end-of-sector fifo flush */ 327 pci_write_config(dev, 0x46, 328 (pci_read_config(dev, 0x46, 1) & 0x0c) | 0xf0, 1); 329 330 /* set sector size */ 331 pci_write_config(dev, 0x60, DEV_BSIZE, 2); 332 pci_write_config(dev, 0x68, DEV_BSIZE, 2); 333 334 /* prepare for ATA-66 on the 82C686 and rev 0x12 and newer 82C596's */ 335 if (ata_find_dev(dev, 0x06861106, 0) || 336 ata_find_dev(dev, 0x05961106, 0x12)) { 337 pci_write_config(dev, 0x50, 338 pci_read_config(dev, 0x50, 4) | 0x070f070f, 4); 339 } 340 break; 341 342 case 0x10001042: /* RZ 100? known bad, no DMA */ 343 case 0x10011042: 344 case 0x06401095: /* CMD 640 known bad, no DMA */ 345 sc->bmio = NULL; 346 device_printf(dev, "Busmastering DMA disabled\n"); 347 } 348 349 if (sc->bmio) { 350 sc->bmaddr = rman_get_start(sc->bmio); 351 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 352 SYS_RES_IOPORT, rid, sc->bmio); 353 sc->bmio = NULL; 354 } 355 356 /* 357 * the Cypress chip is a mess, it contains two ATA functions, but 358 * both channels are visible on the first one. 359 * simply ignore the second function for now, as the right 360 * solution (ignoring the second channel on the first function) 361 * doesn't work with the crappy ATA interrupt setup on the alpha. 362 */ 363 if (pci_get_devid(dev) == 0xc6931080 && pci_get_function(dev) > 1) 364 return 0; 365 366 ata_pci_add_child(dev, 0); 367 368 if (ATA_MASTERDEV(dev) || pci_read_config(dev, 0x18, 4) & IOMASK) 369 ata_pci_add_child(dev, 1); 370 371 return bus_generic_attach(dev); 372 } 373 374 static int 375 ata_pci_intr(struct ata_softc *scp) 376 { 377 u_int8_t dmastat; 378 379 /* 380 * since we might share the IRQ with another device, and in some 381 * cases with our twin channel, we only want to process interrupts 382 * that we know this channel generated. 383 */ 384 switch (scp->chiptype) { 385 case 0x00041103: /* HighPoint HPT366/368/370 */ 386 if (((dmastat = ata_dmastatus(scp)) & 387 (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) != ATA_BMSTAT_INTERRUPT) 388 return 1; 389 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT); 390 DELAY(1); 391 return 0; 392 393 case 0x06481095: /* CMD 648 */ 394 case 0x06491095: /* CMD 649 */ 395 if (!(pci_read_config(device_get_parent(scp->dev), 0x71, 1) & 396 (scp->channel ? 0x08 : 0x04))) 397 return 1; 398 break; 399 400 case 0x4d33105a: /* Promise Ultra/Fasttrak 33 */ 401 case 0x4d38105a: /* Promise Ultra/Fasttrak 66 */ 402 case 0x4d30105a: /* Promise Ultra/Fasttrak 100 */ 403 case 0x0d30105a: /* Promise OEM ATA100 */ 404 if (!(ATA_INL(scp->r_bmio, (scp->channel ? 0x14 : 0x1c)) & 405 (scp->channel ? 0x00004000 : 0x00000400))) 406 return 1; 407 break; 408 } 409 410 if (scp->flags & ATA_DMA_ACTIVE) { 411 if (!((dmastat = ata_dmastatus(scp)) & ATA_BMSTAT_INTERRUPT)) 412 return 1; 413 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT); 414 DELAY(1); 415 } 416 return 0; 417 } 418 419 static int 420 ata_pci_print_child(device_t dev, device_t child) 421 { 422 struct ata_softc *scp = device_get_softc(child); 423 int retval = 0; 424 425 retval += bus_print_child_header(dev, child); 426 retval += printf(": at 0x%lx", rman_get_start(scp->r_io)); 427 428 if (ATA_MASTERDEV(dev)) 429 retval += printf(" irq %d", 14 + scp->channel); 430 431 retval += bus_print_child_footer(dev, child); 432 433 return retval; 434 } 435 436 static struct resource * 437 ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid, 438 u_long start, u_long end, u_long count, u_int flags) 439 { 440 struct ata_pci_softc *sc = device_get_softc(dev); 441 struct resource *res = NULL; 442 int channel = ((struct ata_softc *)device_get_softc(child))->channel; 443 int myrid; 444 445 if (type == SYS_RES_IOPORT) { 446 switch (*rid) { 447 case ATA_IOADDR_RID: 448 if (ATA_MASTERDEV(dev)) { 449 myrid = 0; 450 start = (channel ? ATA_SECONDARY : ATA_PRIMARY); 451 end = start + ATA_IOSIZE - 1; 452 count = ATA_IOSIZE; 453 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 454 SYS_RES_IOPORT, &myrid, 455 start, end, count, flags); 456 } 457 else { 458 myrid = 0x10 + 8 * channel; 459 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 460 SYS_RES_IOPORT, &myrid, 461 start, end, count, flags); 462 } 463 break; 464 465 case ATA_ALTADDR_RID: 466 if (ATA_MASTERDEV(dev)) { 467 myrid = 0; 468 start = (channel ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET; 469 end = start + ATA_ALTIOSIZE - 1; 470 count = ATA_ALTIOSIZE; 471 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 472 SYS_RES_IOPORT, &myrid, 473 start, end, count, flags); 474 } 475 else { 476 myrid = 0x14 + 8 * channel; 477 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 478 SYS_RES_IOPORT, &myrid, 479 start, end, count, flags); 480 if (res) { 481 start = rman_get_start(res) + 2; 482 end = rman_get_start(res) + ATA_ALTIOSIZE - 1; 483 count = ATA_ALTIOSIZE; 484 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 485 SYS_RES_IOPORT, myrid, res); 486 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 487 SYS_RES_IOPORT, &myrid, 488 start, end, count, flags); 489 } 490 } 491 break; 492 493 case ATA_BMADDR_RID: 494 if (sc->bmaddr) { 495 myrid = 0x20; 496 start = (channel == 0 ? sc->bmaddr : sc->bmaddr + ATA_BMIOSIZE); 497 end = start + ATA_BMIOSIZE - 1; 498 count = ATA_BMIOSIZE; 499 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 500 SYS_RES_IOPORT, &myrid, 501 start, end, count, flags); 502 } 503 } 504 return res; 505 } 506 507 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) { 508 if (ATA_MASTERDEV(dev)) { 509 #ifdef __alpha__ 510 return alpha_platform_alloc_ide_intr(channel); 511 #else 512 int irq = (channel == 0 ? 14 : 15); 513 514 return BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 515 SYS_RES_IRQ, rid, 516 irq, irq, 1, flags & ~RF_SHAREABLE); 517 #endif 518 } 519 else { 520 /* primary and secondary channels share interrupt, keep track */ 521 if (!sc->irq) 522 sc->irq = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 523 SYS_RES_IRQ, rid, 0, ~0, 1, flags); 524 sc->irqcnt++; 525 return sc->irq; 526 } 527 } 528 return 0; 529 } 530 531 static int 532 ata_pci_release_resource(device_t dev, device_t child, int type, int rid, 533 struct resource *r) 534 { 535 struct ata_pci_softc *sc = device_get_softc(dev); 536 int channel = ((struct ata_softc *)device_get_softc(child))->channel; 537 538 if (type == SYS_RES_IOPORT) { 539 switch (rid) { 540 case ATA_IOADDR_RID: 541 if (ATA_MASTERDEV(dev)) 542 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 543 SYS_RES_IOPORT, 0x0, r); 544 else 545 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 546 SYS_RES_IOPORT, 0x10+8*channel, r); 547 break; 548 549 case ATA_ALTADDR_RID: 550 if (ATA_MASTERDEV(dev)) 551 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 552 SYS_RES_IOPORT, 0x0, r); 553 else 554 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 555 SYS_RES_IOPORT, 0x14+8*channel, r); 556 break; 557 558 case ATA_BMADDR_RID: 559 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 560 SYS_RES_IOPORT, 0x20, r); 561 default: 562 return ENOENT; 563 } 564 } 565 if (type == SYS_RES_IRQ) { 566 if (rid != ATA_IRQ_RID) 567 return ENOENT; 568 569 if (ATA_MASTERDEV(dev)) { 570 #ifdef __alpha__ 571 return alpha_platform_release_ide_intr(channel, r); 572 #else 573 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 574 SYS_RES_IRQ, rid, r); 575 #endif 576 } 577 else { 578 /* primary and secondary channels share interrupt, keep track */ 579 if (--sc->irqcnt) 580 return 0; 581 sc->irq = 0; 582 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 583 SYS_RES_IRQ, rid, r); 584 } 585 } 586 return EINVAL; 587 } 588 589 static int 590 ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq, 591 int flags, driver_intr_t *intr, void *arg, 592 void **cookiep) 593 { 594 if (ATA_MASTERDEV(dev)) { 595 #ifdef __alpha__ 596 return alpha_platform_setup_ide_intr(child, irq, intr, arg, cookiep); 597 #else 598 return BUS_SETUP_INTR(device_get_parent(dev), child, irq, 599 flags, intr, arg, cookiep); 600 #endif 601 } 602 else 603 return BUS_SETUP_INTR(device_get_parent(dev), dev, irq, 604 flags, intr, arg, cookiep); 605 } 606 607 static int 608 ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq, 609 void *cookie) 610 { 611 if (ATA_MASTERDEV(dev)) { 612 #ifdef __alpha__ 613 return alpha_platform_teardown_ide_intr(child, irq, cookie); 614 #else 615 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie); 616 #endif 617 } 618 else 619 return BUS_TEARDOWN_INTR(device_get_parent(dev), dev, irq, cookie); 620 } 621 622 static device_method_t ata_pci_methods[] = { 623 /* device interface */ 624 DEVMETHOD(device_probe, ata_pci_probe), 625 DEVMETHOD(device_attach, ata_pci_attach), 626 DEVMETHOD(device_shutdown, bus_generic_shutdown), 627 DEVMETHOD(device_suspend, bus_generic_suspend), 628 DEVMETHOD(device_resume, bus_generic_resume), 629 630 /* bus methods */ 631 DEVMETHOD(bus_print_child, ata_pci_print_child), 632 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource), 633 DEVMETHOD(bus_release_resource, ata_pci_release_resource), 634 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 635 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 636 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr), 637 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr), 638 { 0, 0 } 639 }; 640 641 static driver_t ata_pci_driver = { 642 "atapci", 643 ata_pci_methods, 644 sizeof(struct ata_pci_softc), 645 }; 646 647 static devclass_t ata_pci_devclass; 648 649 DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0); 650 651 static int 652 ata_pcisub_probe(device_t dev) 653 { 654 struct ata_softc *scp = device_get_softc(dev); 655 device_t *children; 656 int count, i; 657 658 /* find channel number on this controller */ 659 device_get_children(device_get_parent(dev), &children, &count); 660 for (i = 0; i < count; i++) { 661 if (children[i] == dev) 662 scp->channel = i; 663 } 664 free(children, M_TEMP); 665 scp->chiptype = pci_get_devid(device_get_parent(dev)); 666 scp->intr_func = ata_pci_intr; 667 return ata_probe(dev); 668 } 669 670 static device_method_t ata_pcisub_methods[] = { 671 /* device interface */ 672 DEVMETHOD(device_probe, ata_pcisub_probe), 673 DEVMETHOD(device_attach, ata_attach), 674 DEVMETHOD(device_detach, ata_detach), 675 DEVMETHOD(device_resume, ata_resume), 676 { 0, 0 } 677 }; 678 679 static driver_t ata_pcisub_driver = { 680 "ata", 681 ata_pcisub_methods, 682 sizeof(struct ata_softc), 683 }; 684 685 DRIVER_MODULE(ata, atapci, ata_pcisub_driver, ata_devclass, 0, 0); 686