1 /*- 2 * Copyright (c) 1998,1999,2000,2001 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/disk.h> 35 #include <sys/module.h> 36 #include <sys/bus.h> 37 #include <sys/bio.h> 38 #include <sys/malloc.h> 39 #include <sys/devicestat.h> 40 #include <sys/sysctl.h> 41 #include <machine/stdarg.h> 42 #include <machine/resource.h> 43 #include <machine/bus.h> 44 #ifdef __alpha__ 45 #include <machine/md_var.h> 46 #endif 47 #include <sys/rman.h> 48 #include <pci/pcivar.h> 49 #include <pci/pcireg.h> 50 #include <dev/ata/ata-all.h> 51 52 /* device structures */ 53 struct ata_pci_softc { 54 struct resource *bmio; 55 int bmaddr; 56 struct resource *irq; 57 int irqcnt; 58 }; 59 60 /* prototypes */ 61 void ata_via686b(device_t); 62 63 /* misc defines */ 64 #define IOMASK 0xfffffffc 65 #define ATA_MASTERDEV(dev) ((pci_get_progif(dev) & 0x80) && \ 66 (pci_get_progif(dev) & 0x05) != 0x05) 67 68 int 69 ata_find_dev(device_t dev, u_int32_t devid, u_int32_t revid) 70 { 71 device_t *children; 72 int nchildren, i; 73 74 if (device_get_children(device_get_parent(dev), &children, &nchildren)) 75 return 0; 76 77 for (i = 0; i < nchildren; i++) { 78 if (pci_get_devid(children[i]) == devid && 79 pci_get_revid(children[i]) >= revid) { 80 free(children, M_TEMP); 81 return 1; 82 } 83 } 84 free(children, M_TEMP); 85 return 0; 86 } 87 88 void 89 ata_via686b(device_t dev) 90 { 91 device_t *children, child; 92 int nchildren, i; 93 94 if (device_get_children(device_get_parent(dev), &children, &nchildren)) 95 return; 96 97 for (i = 0; i < nchildren; i++) { 98 child = children[i]; 99 100 if (pci_get_devid(child) == 0x03051106 || /* VIA KT133 */ 101 pci_get_devid(child) == 0x03911106) { /* VIA KX133 */ 102 pci_write_config(child, 0x75, 0x83, 1); 103 pci_write_config(child, 0x76, 104 (pci_read_config(child, 0x76, 1) & 0xdf) | 0xd0,1); 105 device_printf(dev, "VIA '686b southbridge fix applied\n"); 106 break; 107 } 108 } 109 free(children, M_TEMP); 110 } 111 112 static const char * 113 ata_pci_match(device_t dev) 114 { 115 if (pci_get_class(dev) != PCIC_STORAGE) 116 return NULL; 117 118 switch (pci_get_devid(dev)) { 119 /* supported chipsets */ 120 case 0x12308086: 121 return "Intel PIIX ATA controller"; 122 123 case 0x70108086: 124 return "Intel PIIX3 ATA controller"; 125 126 case 0x71118086: 127 case 0x71998086: 128 case 0x84ca8086: 129 return "Intel PIIX4 ATA33 controller"; 130 131 case 0x24218086: 132 return "Intel ICH0 ATA33 controller"; 133 134 case 0x24118086: 135 case 0x76018086: 136 return "Intel ICH ATA66 controller"; 137 138 case 0x244a8086: 139 case 0x244b8086: 140 return "Intel ICH2 ATA100 controller"; 141 142 case 0x248a8086: 143 case 0x248b8086: 144 return "Intel ICH3 ATA100 controller"; 145 146 case 0x522910b9: 147 if (pci_get_revid(dev) >= 0xc4) 148 return "AcerLabs Aladdin ATA100 controller"; 149 else if (pci_get_revid(dev) >= 0xc2) 150 return "AcerLabs Aladdin ATA66 controller"; 151 else if (pci_get_revid(dev) >= 0x20) 152 return "AcerLabs Aladdin ATA33 controller"; 153 else 154 return "AcerLabs Aladdin ATA controller"; 155 156 case 0x05711106: 157 if (ata_find_dev(dev, 0x05861106, 0x02)) 158 return "VIA 82C586 ATA33 controller"; 159 if (ata_find_dev(dev, 0x05861106, 0)) 160 return "VIA 82C586 ATA controller"; 161 if (ata_find_dev(dev, 0x05961106, 0x12)) 162 return "VIA 82C596 ATA66 controller"; 163 if (ata_find_dev(dev, 0x05961106, 0)) 164 return "VIA 82C596 ATA33 controller"; 165 if (ata_find_dev(dev, 0x06861106, 0x40) || 166 ata_find_dev(dev, 0x82311106, 0) || 167 ata_find_dev(dev, 0x30741106, 0)) 168 return "VIA 82C686 ATA100 controller"; 169 if (ata_find_dev(dev, 0x06861106, 0)) 170 return "VIA 82C686 ATA66 controller"; 171 return "VIA Apollo ATA controller"; 172 173 case 0x55131039: 174 if (ata_find_dev(dev, 0x06301039, 0x30) || 175 ata_find_dev(dev, 0x06331039, 0x00) || 176 ata_find_dev(dev, 0x06351039, 0x00) || 177 ata_find_dev(dev, 0x07301039, 0x00) || 178 ata_find_dev(dev, 0x07331039, 0x00) || 179 ata_find_dev(dev, 0x07351039, 0x00)) 180 return "SiS 5591 ATA100 controller"; 181 if (ata_find_dev(dev, 0x05301039, 0x00) || 182 ata_find_dev(dev, 0x05401039, 0x00) || 183 ata_find_dev(dev, 0x06201039, 0x00) || 184 ata_find_dev(dev, 0x06301039, 0x00)) 185 return "SiS 5591 ATA66 controller"; 186 return "SiS 5591 ATA33 controller"; 187 188 case 0x06491095: 189 return "CMD 649 ATA100 controller"; 190 191 case 0x06481095: 192 return "CMD 648 ATA66 controller"; 193 194 case 0x06461095: 195 return "CMD 646 ATA controller"; 196 197 case 0xc6931080: 198 if (pci_get_subclass(dev) == PCIS_STORAGE_IDE) 199 return "Cypress 82C693 ATA controller"; 200 break; 201 202 case 0x01021078: 203 return "Cyrix 5530 ATA33 controller"; 204 205 case 0x74091022: 206 return "AMD 756 ATA66 controller"; 207 208 case 0x74111022: 209 return "AMD 766 ATA100 controller"; 210 211 case 0x02111166: 212 return "ServerWorks ROSB4 ATA33 controller"; 213 214 case 0x4d33105a: 215 return "Promise ATA33 controller"; 216 217 case 0x4d38105a: 218 return "Promise ATA66 controller"; 219 220 case 0x0d30105a: 221 case 0x4d30105a: 222 return "Promise ATA100 controller"; 223 224 case 0x4d68105a: 225 case 0x6268105a: 226 return "Promise TX2 ATA100 controller"; 227 228 case 0x4d69105a: 229 return "Promise ATA133 controller"; 230 231 case 0x00041103: 232 switch (pci_get_revid(dev)) { 233 case 0x00: 234 case 0x01: 235 return "HighPoint HPT366 ATA66 controller"; 236 case 0x02: 237 return "HighPoint HPT368 ATA66 controller"; 238 case 0x03: 239 case 0x04: 240 return "HighPoint HPT370 ATA100 controller"; 241 case 0x05: 242 return "HighPoint HPT372 ATA133 controller"; 243 default: 244 return "Unknown revision HighPoint ATA controller"; 245 } 246 247 /* unsupported but known chipsets, generic DMA only */ 248 case 0x10001042: 249 case 0x10011042: 250 return "RZ 100? ATA controller !WARNING! buggy chip data loss possible"; 251 252 case 0x06401095: 253 return "CMD 640 ATA controller !WARNING! buggy chip data loss possible"; 254 255 /* unknown chipsets, try generic DMA if it seems possible */ 256 default: 257 if (pci_get_class(dev) == PCIC_STORAGE && 258 (pci_get_subclass(dev) == PCIS_STORAGE_IDE)) 259 return "Generic PCI ATA controller"; 260 } 261 return NULL; 262 } 263 264 static int 265 ata_pci_probe(device_t dev) 266 { 267 const char *desc = ata_pci_match(dev); 268 269 if (desc) { 270 device_set_desc(dev, desc); 271 return 0; 272 } 273 else 274 return ENXIO; 275 } 276 277 static int 278 ata_pci_add_child(device_t dev, int unit) 279 { 280 device_t child; 281 282 /* check if this is located at one of the std addresses */ 283 if (ATA_MASTERDEV(dev)) { 284 if (!(child = device_add_child(dev, "ata", unit))) 285 return ENOMEM; 286 } 287 else { 288 if (!(child = device_add_child(dev, "ata", 289 devclass_find_free_unit(devclass_find("ata"), 2)))) 290 return ENOMEM; 291 } 292 return 0; 293 } 294 295 static int 296 ata_pci_attach(device_t dev) 297 { 298 struct ata_pci_softc *sc = device_get_softc(dev); 299 u_int8_t class, subclass; 300 u_int32_t type, cmd; 301 int rid; 302 303 /* set up vendor-specific stuff */ 304 type = pci_get_devid(dev); 305 class = pci_get_class(dev); 306 subclass = pci_get_subclass(dev); 307 cmd = pci_read_config(dev, PCIR_COMMAND, 4); 308 309 if (!(cmd & PCIM_CMD_PORTEN)) { 310 device_printf(dev, "ATA channel disabled by BIOS\n"); 311 return 0; 312 } 313 314 /* is busmastering supported ? */ 315 if ((cmd & (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) == 316 (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) { 317 318 /* is there a valid port range to connect to ? */ 319 rid = 0x20; 320 sc->bmio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 321 0, ~0, 1, RF_ACTIVE); 322 if (!sc->bmio) 323 device_printf(dev, "Busmastering DMA not configured\n"); 324 } 325 else 326 device_printf(dev, "Busmastering DMA not supported\n"); 327 328 /* do extra chipset specific setups */ 329 switch (type) { 330 case 0x522910b9: /* Aladdin need to activate the ATAPI FIFO */ 331 pci_write_config(dev, 0x53, 332 (pci_read_config(dev, 0x53, 1) & ~0x01) | 0x02, 1); 333 break; 334 335 case 0x4d38105a: /* Promise 66 & 100 (before TX2) need the clock changed */ 336 case 0x4d30105a: 337 case 0x0d30105a: 338 ATA_OUTB(sc->bmio, 0x11, ATA_INB(sc->bmio, 0x11) | 0x0a); 339 /* FALLTHROUGH */ 340 341 case 0x4d33105a: /* Promise (before TX2) need burst mode turned on */ 342 ATA_OUTB(sc->bmio, 0x1f, ATA_INB(sc->bmio, 0x1f) | 0x01); 343 break; 344 345 case 0x00041103: /* HighPoint */ 346 switch (pci_get_revid(dev)) { 347 case 0x00: /* HPT 366 */ 348 case 0x01: 349 /* turn off interrupt prediction */ 350 pci_write_config(dev, 0x51, 351 (pci_read_config(dev, 0x51, 1) & ~0x80), 1); 352 break; 353 354 case 0x02: /* HPT 368 */ 355 case 0x03: /* HPT 370 */ 356 case 0x04: 357 case 0x05: /* HPT 372 */ 358 /* turn off interrupt prediction */ 359 pci_write_config(dev, 0x51, 360 (pci_read_config(dev, 0x51, 1) & ~0x02), 1); 361 pci_write_config(dev, 0x55, 362 (pci_read_config(dev, 0x55, 1) & ~0x02), 1); 363 /* turn on interrupts */ 364 pci_write_config(dev, 0x5a, 365 (pci_read_config(dev, 0x5a, 1) & ~0x10), 1); 366 367 } 368 break; 369 370 case 0x05711106: /* VIA 82C586, '596, '686 default setup */ 371 /* prepare for ATA-66 on the 82C686a and rev 0x12 and newer 82C596's */ 372 if ((ata_find_dev(dev, 0x06861106, 0) && 373 !ata_find_dev(dev, 0x06861106, 0x40)) || 374 ata_find_dev(dev, 0x05961106, 0x12)) 375 pci_write_config(dev, 0x50, 0x030b030b, 4); 376 377 /* the '686b might need the data corruption fix */ 378 if (ata_find_dev(dev, 0x06861106, 0x40)) 379 ata_via686b(dev); 380 381 /* FALLTHROUGH */ 382 383 case 0x74091022: /* AMD 756 default setup */ 384 case 0x74111022: /* AMD 766 default setup */ 385 386 /* set prefetch, postwrite */ 387 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1); 388 389 /* set fifo configuration half'n'half */ 390 pci_write_config(dev, 0x43, 391 (pci_read_config(dev, 0x43, 1) & 0x90) | 0x2a, 1); 392 393 /* set status register read retry */ 394 pci_write_config(dev, 0x44, pci_read_config(dev, 0x44, 1) | 0x08, 1); 395 396 /* set DMA read & end-of-sector fifo flush */ 397 pci_write_config(dev, 0x46, 398 (pci_read_config(dev, 0x46, 1) & 0x0c) | 0xf0, 1); 399 400 /* set sector size */ 401 pci_write_config(dev, 0x60, DEV_BSIZE, 2); 402 pci_write_config(dev, 0x68, DEV_BSIZE, 2); 403 break; 404 405 case 0x10001042: /* RZ 100? known bad, no DMA */ 406 case 0x10011042: 407 case 0x06401095: /* CMD 640 known bad, no DMA */ 408 sc->bmio = NULL; 409 device_printf(dev, "Busmastering DMA disabled\n"); 410 } 411 412 if (sc->bmio) { 413 sc->bmaddr = rman_get_start(sc->bmio); 414 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 415 SYS_RES_IOPORT, rid, sc->bmio); 416 sc->bmio = NULL; 417 } 418 419 /* 420 * the Cypress chip is a mess, it contains two ATA functions, but 421 * both channels are visible on the first one. 422 * simply ignore the second function for now, as the right 423 * solution (ignoring the second channel on the first function) 424 * doesn't work with the crappy ATA interrupt setup on the alpha. 425 */ 426 if (pci_get_devid(dev) == 0xc6931080 && pci_get_function(dev) > 1) 427 return 0; 428 429 ata_pci_add_child(dev, 0); 430 431 if (ATA_MASTERDEV(dev) || pci_read_config(dev, 0x18, 4) & IOMASK) 432 ata_pci_add_child(dev, 1); 433 434 return bus_generic_attach(dev); 435 } 436 437 static int 438 ata_pci_intr(struct ata_softc *scp) 439 { 440 u_int8_t dmastat; 441 442 /* 443 * since we might share the IRQ with another device, and in some 444 * cases with our twin channel, we only want to process interrupts 445 * that we know this channel generated. 446 */ 447 switch (scp->chiptype) { 448 case 0x00041103: /* HighPoint HPT366/368/370/372 */ 449 if (((dmastat = ata_dmastatus(scp)) & 450 (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) != ATA_BMSTAT_INTERRUPT) 451 return 1; 452 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT); 453 DELAY(1); 454 return 0; 455 456 case 0x06481095: /* CMD 648 */ 457 case 0x06491095: /* CMD 649 */ 458 if (!(pci_read_config(device_get_parent(scp->dev), 0x71, 1) & 459 (scp->channel ? 0x08 : 0x04))) 460 return 1; 461 break; 462 463 case 0x4d33105a: /* Promise Ultra/Fasttrak 33 */ 464 case 0x4d38105a: /* Promise Ultra/Fasttrak 66 */ 465 case 0x4d30105a: /* Promise Ultra/Fasttrak 100 */ 466 case 0x0d30105a: /* Promise OEM ATA100 */ 467 if (!(ATA_INL(scp->r_bmio, (scp->channel ? 0x14 : 0x1c)) & 468 (scp->channel ? 0x00004000 : 0x00000400))) 469 return 1; 470 break; 471 472 case 0x4d68105a: /* Promise TX2 ATA100 */ 473 case 0x6268105a: /* Promise TX2v2 ATA100 */ 474 case 0x4d69105a: /* Promise ATA133 */ 475 ATA_OUTB(scp->r_bmio, ATA_BMDEVSPEC_0, 0x0b); 476 if (!(ATA_INB(scp->r_bmio, ATA_BMDEVSPEC_1) & 0x20)) 477 return 1; 478 break; 479 } 480 481 if (scp->flags & ATA_DMA_ACTIVE) { 482 if (!((dmastat = ata_dmastatus(scp)) & ATA_BMSTAT_INTERRUPT)) 483 return 1; 484 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT); 485 DELAY(1); 486 } 487 return 0; 488 } 489 490 static int 491 ata_pci_print_child(device_t dev, device_t child) 492 { 493 struct ata_softc *scp = device_get_softc(child); 494 int retval = 0; 495 496 retval += bus_print_child_header(dev, child); 497 retval += printf(": at 0x%lx", rman_get_start(scp->r_io)); 498 499 if (ATA_MASTERDEV(dev)) 500 retval += printf(" irq %d", 14 + scp->channel); 501 502 retval += bus_print_child_footer(dev, child); 503 504 return retval; 505 } 506 507 static struct resource * 508 ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid, 509 u_long start, u_long end, u_long count, u_int flags) 510 { 511 struct ata_pci_softc *sc = device_get_softc(dev); 512 struct resource *res = NULL; 513 int channel = ((struct ata_softc *)device_get_softc(child))->channel; 514 int myrid; 515 516 if (type == SYS_RES_IOPORT) { 517 switch (*rid) { 518 case ATA_IOADDR_RID: 519 if (ATA_MASTERDEV(dev)) { 520 myrid = 0; 521 start = (channel ? ATA_SECONDARY : ATA_PRIMARY); 522 end = start + ATA_IOSIZE - 1; 523 count = ATA_IOSIZE; 524 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 525 SYS_RES_IOPORT, &myrid, 526 start, end, count, flags); 527 } 528 else { 529 myrid = 0x10 + 8 * channel; 530 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 531 SYS_RES_IOPORT, &myrid, 532 start, end, count, flags); 533 } 534 break; 535 536 case ATA_ALTADDR_RID: 537 if (ATA_MASTERDEV(dev)) { 538 myrid = 0; 539 start = (channel ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET; 540 end = start + ATA_ALTIOSIZE - 1; 541 count = ATA_ALTIOSIZE; 542 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 543 SYS_RES_IOPORT, &myrid, 544 start, end, count, flags); 545 } 546 else { 547 myrid = 0x14 + 8 * channel; 548 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 549 SYS_RES_IOPORT, &myrid, 550 start, end, count, flags); 551 if (res) { 552 start = rman_get_start(res) + 2; 553 end = rman_get_start(res) + ATA_ALTIOSIZE - 1; 554 count = ATA_ALTIOSIZE; 555 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 556 SYS_RES_IOPORT, myrid, res); 557 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 558 SYS_RES_IOPORT, &myrid, 559 start, end, count, flags); 560 } 561 } 562 break; 563 564 case ATA_BMADDR_RID: 565 if (sc->bmaddr) { 566 myrid = 0x20; 567 start = (channel == 0 ? sc->bmaddr : sc->bmaddr + ATA_BMIOSIZE); 568 end = start + ATA_BMIOSIZE - 1; 569 count = ATA_BMIOSIZE; 570 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 571 SYS_RES_IOPORT, &myrid, 572 start, end, count, flags); 573 } 574 } 575 return res; 576 } 577 578 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) { 579 if (ATA_MASTERDEV(dev)) { 580 #ifdef __alpha__ 581 return alpha_platform_alloc_ide_intr(channel); 582 #else 583 int irq = (channel == 0 ? 14 : 15); 584 585 return BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 586 SYS_RES_IRQ, rid, irq, irq, 1, flags); 587 #endif 588 } 589 else { 590 /* primary and secondary channels share interrupt, keep track */ 591 if (!sc->irq) 592 sc->irq = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 593 SYS_RES_IRQ, rid, 0, ~0, 1, flags); 594 sc->irqcnt++; 595 return sc->irq; 596 } 597 } 598 return 0; 599 } 600 601 static int 602 ata_pci_release_resource(device_t dev, device_t child, int type, int rid, 603 struct resource *r) 604 { 605 struct ata_pci_softc *sc = device_get_softc(dev); 606 int channel = ((struct ata_softc *)device_get_softc(child))->channel; 607 608 if (type == SYS_RES_IOPORT) { 609 switch (rid) { 610 case ATA_IOADDR_RID: 611 if (ATA_MASTERDEV(dev)) 612 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 613 SYS_RES_IOPORT, 0x0, r); 614 else 615 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 616 SYS_RES_IOPORT, 0x10+8*channel, r); 617 break; 618 619 case ATA_ALTADDR_RID: 620 if (ATA_MASTERDEV(dev)) 621 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 622 SYS_RES_IOPORT, 0x0, r); 623 else 624 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 625 SYS_RES_IOPORT, 0x14+8*channel, r); 626 break; 627 628 case ATA_BMADDR_RID: 629 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 630 SYS_RES_IOPORT, 0x20, r); 631 default: 632 return ENOENT; 633 } 634 } 635 if (type == SYS_RES_IRQ) { 636 if (rid != ATA_IRQ_RID) 637 return ENOENT; 638 639 if (ATA_MASTERDEV(dev)) { 640 #ifdef __alpha__ 641 return alpha_platform_release_ide_intr(channel, r); 642 #else 643 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 644 SYS_RES_IRQ, rid, r); 645 #endif 646 } 647 else { 648 /* primary and secondary channels share interrupt, keep track */ 649 if (--sc->irqcnt) 650 return 0; 651 sc->irq = 0; 652 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 653 SYS_RES_IRQ, rid, r); 654 } 655 } 656 return EINVAL; 657 } 658 659 static int 660 ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq, 661 int flags, driver_intr_t *intr, void *arg, 662 void **cookiep) 663 { 664 if (ATA_MASTERDEV(dev)) { 665 #ifdef __alpha__ 666 return alpha_platform_setup_ide_intr(child, irq, intr, arg, cookiep); 667 #else 668 return BUS_SETUP_INTR(device_get_parent(dev), child, irq, 669 flags, intr, arg, cookiep); 670 #endif 671 } 672 else 673 return BUS_SETUP_INTR(device_get_parent(dev), dev, irq, 674 flags, intr, arg, cookiep); 675 } 676 677 static int 678 ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq, 679 void *cookie) 680 { 681 if (ATA_MASTERDEV(dev)) { 682 #ifdef __alpha__ 683 return alpha_platform_teardown_ide_intr(child, irq, cookie); 684 #else 685 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie); 686 #endif 687 } 688 else 689 return BUS_TEARDOWN_INTR(device_get_parent(dev), dev, irq, cookie); 690 } 691 692 static device_method_t ata_pci_methods[] = { 693 /* device interface */ 694 DEVMETHOD(device_probe, ata_pci_probe), 695 DEVMETHOD(device_attach, ata_pci_attach), 696 DEVMETHOD(device_shutdown, bus_generic_shutdown), 697 DEVMETHOD(device_suspend, bus_generic_suspend), 698 DEVMETHOD(device_resume, bus_generic_resume), 699 700 /* bus methods */ 701 DEVMETHOD(bus_print_child, ata_pci_print_child), 702 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource), 703 DEVMETHOD(bus_release_resource, ata_pci_release_resource), 704 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 705 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 706 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr), 707 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr), 708 { 0, 0 } 709 }; 710 711 static driver_t ata_pci_driver = { 712 "atapci", 713 ata_pci_methods, 714 sizeof(struct ata_pci_softc), 715 }; 716 717 static devclass_t ata_pci_devclass; 718 719 DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0); 720 721 static int 722 ata_pcisub_probe(device_t dev) 723 { 724 struct ata_softc *scp = device_get_softc(dev); 725 device_t *children; 726 int count, i; 727 728 /* find channel number on this controller */ 729 device_get_children(device_get_parent(dev), &children, &count); 730 for (i = 0; i < count; i++) { 731 if (children[i] == dev) 732 scp->channel = i; 733 } 734 free(children, M_TEMP); 735 scp->chiptype = pci_get_devid(device_get_parent(dev)); 736 scp->intr_func = ata_pci_intr; 737 return ata_probe(dev); 738 } 739 740 static device_method_t ata_pcisub_methods[] = { 741 /* device interface */ 742 DEVMETHOD(device_probe, ata_pcisub_probe), 743 DEVMETHOD(device_attach, ata_attach), 744 DEVMETHOD(device_detach, ata_detach), 745 DEVMETHOD(device_resume, ata_resume), 746 { 0, 0 } 747 }; 748 749 static driver_t ata_pcisub_driver = { 750 "ata", 751 ata_pcisub_methods, 752 sizeof(struct ata_softc), 753 }; 754 755 DRIVER_MODULE(ata, atapci, ata_pcisub_driver, ata_devclass, 0, 0); 756