1 /*- 2 * Copyright (c) 1998,1999,2000,2001,2002 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/disk.h> 35 #include <sys/module.h> 36 #include <sys/bus.h> 37 #include <sys/bio.h> 38 #include <sys/malloc.h> 39 #include <sys/devicestat.h> 40 #include <sys/sysctl.h> 41 #include <machine/stdarg.h> 42 #include <machine/resource.h> 43 #include <machine/bus.h> 44 #ifdef __alpha__ 45 #include <machine/md_var.h> 46 #endif 47 #include <sys/rman.h> 48 #include <pci/pcivar.h> 49 #include <pci/pcireg.h> 50 #include <dev/ata/ata-all.h> 51 52 /* device structures */ 53 struct ata_pci_softc { 54 struct resource *bmio; 55 int bmaddr; 56 struct resource *irq; 57 int irqcnt; 58 }; 59 60 /* misc defines */ 61 #define IOMASK 0xfffffffc 62 #define GRANDPARENT(dev) device_get_parent(device_get_parent(dev)) 63 #define ATA_MASTERDEV(dev) ((pci_get_progif(dev) & 0x80) && \ 64 (pci_get_progif(dev) & 0x05) != 0x05) 65 66 int 67 ata_find_dev(device_t dev, u_int32_t devid, u_int32_t revid) 68 { 69 device_t *children; 70 int nchildren, i; 71 72 if (device_get_children(device_get_parent(dev), &children, &nchildren)) 73 return 0; 74 75 for (i = 0; i < nchildren; i++) { 76 if (pci_get_devid(children[i]) == devid && 77 pci_get_revid(children[i]) >= revid) { 78 free(children, M_TEMP); 79 return 1; 80 } 81 } 82 free(children, M_TEMP); 83 return 0; 84 } 85 86 static void 87 ata_via_southbridge_fixup(device_t dev) 88 { 89 device_t *children; 90 int nchildren, i; 91 92 if (device_get_children(device_get_parent(dev), &children, &nchildren)) 93 return; 94 95 for (i = 0; i < nchildren; i++) { 96 if (pci_get_devid(children[i]) == 0x03051106 || /* VIA VT8363 */ 97 pci_get_devid(children[i]) == 0x03911106 || /* VIA VT8371 */ 98 pci_get_devid(children[i]) == 0x31021106 || /* VIA VT8662 */ 99 pci_get_devid(children[i]) == 0x31121106) { /* VIA VT8361 */ 100 u_int8_t reg76 = pci_read_config(children[i], 0x76, 1); 101 102 if ((reg76 & 0xf0) != 0xd0) { 103 device_printf(dev, 104 "Correcting VIA config for southbridge data corruption bug\n"); 105 pci_write_config(children[i], 0x75, 0x80, 1); 106 pci_write_config(children[i], 0x76, (reg76 & 0x0f) | 0xd0, 1); 107 } 108 break; 109 } 110 } 111 free(children, M_TEMP); 112 } 113 114 static const char * 115 ata_pci_match(device_t dev) 116 { 117 if (pci_get_class(dev) != PCIC_STORAGE) 118 return NULL; 119 120 switch (pci_get_devid(dev)) { 121 /* supported chipsets */ 122 case 0x12308086: 123 return "Intel PIIX ATA controller"; 124 125 case 0x70108086: 126 return "Intel PIIX3 ATA controller"; 127 128 case 0x71118086: 129 case 0x71998086: 130 case 0x84ca8086: 131 return "Intel PIIX4 ATA33 controller"; 132 133 case 0x24218086: 134 return "Intel ICH0 ATA33 controller"; 135 136 case 0x24118086: 137 case 0x76018086: 138 return "Intel ICH ATA66 controller"; 139 140 case 0x244a8086: 141 case 0x244b8086: 142 return "Intel ICH2 ATA100 controller"; 143 144 case 0x248a8086: 145 case 0x248b8086: 146 return "Intel ICH3 ATA100 controller"; 147 148 case 0x522910b9: 149 if (pci_get_revid(dev) >= 0xc4) 150 return "AcerLabs Aladdin ATA100 controller"; 151 else if (pci_get_revid(dev) >= 0xc2) 152 return "AcerLabs Aladdin ATA66 controller"; 153 else if (pci_get_revid(dev) >= 0x20) 154 return "AcerLabs Aladdin ATA33 controller"; 155 else 156 return "AcerLabs Aladdin ATA controller"; 157 158 case 0x05711106: 159 if (ata_find_dev(dev, 0x05861106, 0x02)) 160 return "VIA 82C586 ATA33 controller"; 161 if (ata_find_dev(dev, 0x05861106, 0)) 162 return "VIA 82C586 ATA controller"; 163 if (ata_find_dev(dev, 0x05961106, 0x12)) 164 return "VIA 82C596 ATA66 controller"; 165 if (ata_find_dev(dev, 0x05961106, 0)) 166 return "VIA 82C596 ATA33 controller"; 167 if (ata_find_dev(dev, 0x06861106, 0x40)) 168 return "VIA 82C686 ATA100 controller"; 169 if (ata_find_dev(dev, 0x06861106, 0x10)) 170 return "VIA 82C686 ATA66 controller"; 171 if (ata_find_dev(dev, 0x06861106, 0)) 172 return "VIA 82C686 ATA33 controller"; 173 if (ata_find_dev(dev, 0x82311106, 0)) 174 return "VIA 8231 ATA100 controller"; 175 if (ata_find_dev(dev, 0x30741106, 0) || 176 ata_find_dev(dev, 0x31091106, 0)) 177 return "VIA 8233 ATA100 controller"; 178 if (ata_find_dev(dev, 0x31471106, 0)) 179 return "VIA 8233 ATA133 controller"; 180 return "VIA Apollo ATA controller"; 181 182 case 0x55131039: 183 if (ata_find_dev(dev, 0x06301039, 0x30) || 184 ata_find_dev(dev, 0x06331039, 0x00) || 185 ata_find_dev(dev, 0x06351039, 0x00) || 186 ata_find_dev(dev, 0x06401039, 0x00) || 187 ata_find_dev(dev, 0x06451039, 0x00) || 188 ata_find_dev(dev, 0x06501039, 0x00) || 189 ata_find_dev(dev, 0x07301039, 0x00) || 190 ata_find_dev(dev, 0x07331039, 0x00) || 191 ata_find_dev(dev, 0x07351039, 0x00) || 192 ata_find_dev(dev, 0x07401039, 0x00) || 193 ata_find_dev(dev, 0x07451039, 0x00) || 194 ata_find_dev(dev, 0x07501039, 0x00)) 195 return "SiS 5591 ATA100 controller"; 196 else if (ata_find_dev(dev, 0x05301039, 0x00) || 197 ata_find_dev(dev, 0x05401039, 0x00) || 198 ata_find_dev(dev, 0x06201039, 0x00) || 199 ata_find_dev(dev, 0x06301039, 0x00)) 200 return "SiS 5591 ATA66 controller"; 201 else 202 return "SiS 5591 ATA33 controller"; 203 204 case 0x06491095: 205 return "CMD 649 ATA100 controller"; 206 207 case 0x06481095: 208 return "CMD 648 ATA66 controller"; 209 210 case 0x06461095: 211 return "CMD 646 ATA controller"; 212 213 case 0xc6931080: 214 if (pci_get_subclass(dev) == PCIS_STORAGE_IDE) 215 return "Cypress 82C693 ATA controller"; 216 return NULL; 217 218 case 0x01021078: 219 return "Cyrix 5530 ATA33 controller"; 220 221 case 0x74091022: 222 return "AMD 756 ATA66 controller"; 223 224 case 0x74111022: 225 return "AMD 766 ATA100 controller"; 226 227 case 0x02111166: 228 return "ServerWorks ROSB4 ATA33 controller"; 229 230 case 0x4d33105a: 231 return "Promise ATA33 controller"; 232 233 case 0x4d38105a: 234 return "Promise ATA66 controller"; 235 236 case 0x0d30105a: 237 case 0x4d30105a: 238 return "Promise ATA100 controller"; 239 240 case 0x4d68105a: 241 case 0x6268105a: 242 if (pci_get_devid(GRANDPARENT(dev)) == 0x00221011 && 243 pci_get_class(GRANDPARENT(dev)) == PCIC_BRIDGE) { 244 static long start = 0, end = 0; 245 246 /* we belive we are on a TX4, now do our (simple) magic */ 247 if (pci_get_slot(dev) == 1) { 248 bus_get_resource(dev, SYS_RES_IRQ, 0, &start, &end); 249 return "Promise TX4 ATA100 controller (channel 0+1)"; 250 } 251 else if (pci_get_slot(dev) == 2 && start && end) { 252 bus_set_resource(dev, SYS_RES_IRQ, 0, start, end); 253 start = end = 0; 254 return "Promise TX4 ATA100 controller (channel 2+3)"; 255 } 256 else 257 start = end = 0; 258 } 259 return "Promise TX2 ATA100 controller"; 260 261 case 0x4d69105a: 262 return "Promise TX2 ATA133 controller"; 263 264 case 0x00041103: 265 switch (pci_get_revid(dev)) { 266 case 0x00: 267 case 0x01: 268 return "HighPoint HPT366 ATA66 controller"; 269 case 0x02: 270 return "HighPoint HPT368 ATA66 controller"; 271 case 0x03: 272 case 0x04: 273 return "HighPoint HPT370 ATA100 controller"; 274 case 0x05: 275 return "HighPoint HPT372 ATA133 controller"; 276 } 277 return NULL; 278 279 /* unsupported but known chipsets, generic DMA only */ 280 case 0x10001042: 281 case 0x10011042: 282 return "RZ 100? ATA controller !WARNING! buggy chip data loss possible"; 283 284 case 0x06401095: 285 return "CMD 640 ATA controller !WARNING! buggy chip data loss possible"; 286 287 /* unknown chipsets, try generic DMA if it seems possible */ 288 default: 289 if (pci_get_class(dev) == PCIC_STORAGE && 290 (pci_get_subclass(dev) == PCIS_STORAGE_IDE)) 291 return "Generic PCI ATA controller"; 292 } 293 return NULL; 294 } 295 296 static int 297 ata_pci_probe(device_t dev) 298 { 299 const char *desc = ata_pci_match(dev); 300 301 if (desc) { 302 device_set_desc(dev, desc); 303 return 0; 304 } 305 else 306 return ENXIO; 307 } 308 309 static int 310 ata_pci_add_child(device_t dev, int unit) 311 { 312 device_t child; 313 314 /* check if this is located at one of the std addresses */ 315 if (ATA_MASTERDEV(dev)) { 316 if (!(child = device_add_child(dev, "ata", unit))) 317 return ENOMEM; 318 } 319 else { 320 if (!(child = device_add_child(dev, "ata", 321 devclass_find_free_unit(devclass_find("ata"), 2)))) 322 return ENOMEM; 323 } 324 return 0; 325 } 326 327 static int 328 ata_pci_attach(device_t dev) 329 { 330 struct ata_pci_softc *sc = device_get_softc(dev); 331 u_int8_t class, subclass; 332 u_int32_t type, cmd; 333 int rid; 334 335 /* set up vendor-specific stuff */ 336 type = pci_get_devid(dev); 337 class = pci_get_class(dev); 338 subclass = pci_get_subclass(dev); 339 cmd = pci_read_config(dev, PCIR_COMMAND, 4); 340 341 if (!(cmd & PCIM_CMD_PORTEN)) { 342 device_printf(dev, "ATA channel disabled by BIOS\n"); 343 return 0; 344 } 345 346 /* is busmastering supported ? */ 347 if ((cmd & (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) == 348 (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) { 349 350 /* is there a valid port range to connect to ? */ 351 rid = 0x20; 352 sc->bmio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 353 0, ~0, 1, RF_ACTIVE); 354 if (!sc->bmio) 355 device_printf(dev, "Busmastering DMA not configured\n"); 356 } 357 else 358 device_printf(dev, "Busmastering DMA not supported\n"); 359 360 /* do extra chipset specific setups */ 361 switch (type) { 362 case 0x522910b9: /* Aladdin need to activate the ATAPI FIFO */ 363 pci_write_config(dev, 0x53, 364 (pci_read_config(dev, 0x53, 1) & ~0x01) | 0x02, 1); 365 break; 366 367 case 0x4d38105a: /* Promise 66 & 100 (before TX2) need the clock changed */ 368 case 0x4d30105a: 369 case 0x0d30105a: 370 ATA_OUTB(sc->bmio, 0x11, ATA_INB(sc->bmio, 0x11) | 0x0a); 371 /* FALLTHROUGH */ 372 373 case 0x4d33105a: /* Promise (before TX2) need burst mode turned on */ 374 ATA_OUTB(sc->bmio, 0x1f, ATA_INB(sc->bmio, 0x1f) | 0x01); 375 break; 376 377 case 0x00041103: /* HighPoint HPT 366/368/370/372 */ 378 switch (pci_get_revid(dev)) { 379 case 0x00: /* HPT 366 */ 380 case 0x01: 381 /* turn off interrupt prediction */ 382 pci_write_config(dev, 0x51, 383 (pci_read_config(dev, 0x51, 1) & ~0x80), 1); 384 break; 385 386 case 0x02: /* HPT 368 */ 387 case 0x03: /* HPT 370 */ 388 case 0x04: 389 case 0x05: /* HPT 372 */ 390 /* turn off interrupt prediction */ 391 pci_write_config(dev, 0x51, 392 (pci_read_config(dev, 0x51, 1) & ~0x03), 1); 393 pci_write_config(dev, 0x55, 394 (pci_read_config(dev, 0x55, 1) & ~0x03), 1); 395 /* turn on interrupts */ 396 pci_write_config(dev, 0x5a, 397 (pci_read_config(dev, 0x5a, 1) & ~0x10), 1); 398 399 } 400 break; 401 402 case 0x05711106: /* VIA 82C586, '596, '686 default setup */ 403 /* prepare for ATA-66 on the 82C686a and 82C596b */ 404 if ((ata_find_dev(dev, 0x06861106, 0x10) && 405 !ata_find_dev(dev, 0x06861106, 0x40)) || 406 ata_find_dev(dev, 0x05961106, 0x12)) 407 pci_write_config(dev, 0x50, 0x030b030b, 4); 408 409 /* the southbridge might need the data corruption fix */ 410 if (ata_find_dev(dev, 0x06861106, 0x40) || 411 ata_find_dev(dev, 0x82311106, 0x10)) 412 ata_via_southbridge_fixup(dev); 413 /* FALLTHROUGH */ 414 415 case 0x74091022: /* AMD 756 default setup */ 416 case 0x74111022: /* AMD 766 default setup */ 417 418 /* set prefetch, postwrite */ 419 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1); 420 421 /* set fifo configuration half'n'half */ 422 pci_write_config(dev, 0x43, 423 (pci_read_config(dev, 0x43, 1) & 0x90) | 0x2a, 1); 424 425 /* set status register read retry */ 426 pci_write_config(dev, 0x44, pci_read_config(dev, 0x44, 1) | 0x08, 1); 427 428 /* set DMA read & end-of-sector fifo flush */ 429 pci_write_config(dev, 0x46, 430 (pci_read_config(dev, 0x46, 1) & 0x0c) | 0xf0, 1); 431 432 /* set sector size */ 433 pci_write_config(dev, 0x60, DEV_BSIZE, 2); 434 pci_write_config(dev, 0x68, DEV_BSIZE, 2); 435 break; 436 437 case 0x10001042: /* RZ 100? known bad, no DMA */ 438 case 0x10011042: 439 case 0x06401095: /* CMD 640 known bad, no DMA */ 440 sc->bmio = NULL; 441 device_printf(dev, "Busmastering DMA disabled\n"); 442 } 443 444 if (sc->bmio) { 445 sc->bmaddr = rman_get_start(sc->bmio); 446 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 447 SYS_RES_IOPORT, rid, sc->bmio); 448 sc->bmio = NULL; 449 } 450 451 /* 452 * the Cypress chip is a mess, it contains two ATA functions, but 453 * both channels are visible on the first one. 454 * simply ignore the second function for now, as the right 455 * solution (ignoring the second channel on the first function) 456 * doesn't work with the crappy ATA interrupt setup on the alpha. 457 */ 458 if (pci_get_devid(dev) == 0xc6931080 && pci_get_function(dev) > 1) 459 return 0; 460 461 ata_pci_add_child(dev, 0); 462 463 if (ATA_MASTERDEV(dev) || pci_read_config(dev, 0x18, 4) & IOMASK) 464 ata_pci_add_child(dev, 1); 465 466 return bus_generic_attach(dev); 467 } 468 469 static int 470 ata_pci_intr(struct ata_softc *scp) 471 { 472 u_int8_t dmastat; 473 474 /* 475 * since we might share the IRQ with another device, and in some 476 * cases with our twin channel, we only want to process interrupts 477 * that we know this channel generated. 478 */ 479 switch (scp->chiptype) { 480 case 0x00041103: /* HighPoint HPT366/368/370/372 */ 481 if (((dmastat = ata_dmastatus(scp)) & 482 (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) != ATA_BMSTAT_INTERRUPT) 483 return 1; 484 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT); 485 DELAY(1); 486 return 0; 487 488 case 0x06481095: /* CMD 648 */ 489 case 0x06491095: /* CMD 649 */ 490 if (!(pci_read_config(device_get_parent(scp->dev), 0x71, 1) & 491 (scp->channel ? 0x08 : 0x04))) 492 return 1; 493 break; 494 495 case 0x4d33105a: /* Promise Ultra/Fasttrak 33 */ 496 case 0x4d38105a: /* Promise Ultra/Fasttrak 66 */ 497 case 0x4d30105a: /* Promise Ultra/Fasttrak 100 */ 498 case 0x0d30105a: /* Promise OEM ATA100 */ 499 if (!(ATA_INL(scp->r_bmio, (scp->channel ? 0x14 : 0x1c)) & 500 (scp->channel ? 0x00004000 : 0x00000400))) 501 return 1; 502 break; 503 504 case 0x4d68105a: /* Promise TX2 ATA100 */ 505 case 0x6268105a: /* Promise TX2 ATA100 */ 506 case 0x4d69105a: /* Promise TX2 ATA133 */ 507 ATA_OUTB(scp->r_bmio, ATA_BMDEVSPEC_0, 0x0b); 508 if (!(ATA_INB(scp->r_bmio, ATA_BMDEVSPEC_1) & 0x20)) 509 return 1; 510 break; 511 } 512 513 if (scp->flags & ATA_DMA_ACTIVE) { 514 if (!((dmastat = ata_dmastatus(scp)) & ATA_BMSTAT_INTERRUPT)) 515 return 1; 516 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT); 517 DELAY(1); 518 } 519 return 0; 520 } 521 522 static int 523 ata_pci_print_child(device_t dev, device_t child) 524 { 525 struct ata_softc *scp = device_get_softc(child); 526 int retval = 0; 527 528 retval += bus_print_child_header(dev, child); 529 retval += printf(": at 0x%lx", rman_get_start(scp->r_io)); 530 531 if (ATA_MASTERDEV(dev)) 532 retval += printf(" irq %d", 14 + scp->channel); 533 534 retval += bus_print_child_footer(dev, child); 535 536 return retval; 537 } 538 539 static struct resource * 540 ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid, 541 u_long start, u_long end, u_long count, u_int flags) 542 { 543 struct ata_pci_softc *sc = device_get_softc(dev); 544 struct resource *res = NULL; 545 int channel = ((struct ata_softc *)device_get_softc(child))->channel; 546 int myrid; 547 548 if (type == SYS_RES_IOPORT) { 549 switch (*rid) { 550 case ATA_IOADDR_RID: 551 if (ATA_MASTERDEV(dev)) { 552 myrid = 0; 553 start = (channel ? ATA_SECONDARY : ATA_PRIMARY); 554 end = start + ATA_IOSIZE - 1; 555 count = ATA_IOSIZE; 556 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 557 SYS_RES_IOPORT, &myrid, 558 start, end, count, flags); 559 } 560 else { 561 myrid = 0x10 + 8 * channel; 562 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 563 SYS_RES_IOPORT, &myrid, 564 start, end, count, flags); 565 } 566 break; 567 568 case ATA_ALTADDR_RID: 569 if (ATA_MASTERDEV(dev)) { 570 myrid = 0; 571 start = (channel ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET; 572 end = start + ATA_ALTIOSIZE - 1; 573 count = ATA_ALTIOSIZE; 574 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 575 SYS_RES_IOPORT, &myrid, 576 start, end, count, flags); 577 } 578 else { 579 myrid = 0x14 + 8 * channel; 580 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 581 SYS_RES_IOPORT, &myrid, 582 start, end, count, flags); 583 if (res) { 584 start = rman_get_start(res) + 2; 585 end = rman_get_start(res) + ATA_ALTIOSIZE - 1; 586 count = ATA_ALTIOSIZE; 587 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 588 SYS_RES_IOPORT, myrid, res); 589 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 590 SYS_RES_IOPORT, &myrid, 591 start, end, count, flags); 592 } 593 } 594 break; 595 596 case ATA_BMADDR_RID: 597 if (sc->bmaddr) { 598 myrid = 0x20; 599 start = (channel == 0 ? sc->bmaddr : sc->bmaddr + ATA_BMIOSIZE); 600 end = start + ATA_BMIOSIZE - 1; 601 count = ATA_BMIOSIZE; 602 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 603 SYS_RES_IOPORT, &myrid, 604 start, end, count, flags); 605 } 606 } 607 return res; 608 } 609 610 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) { 611 if (ATA_MASTERDEV(dev)) { 612 #ifdef __alpha__ 613 return alpha_platform_alloc_ide_intr(channel); 614 #else 615 int irq = (channel == 0 ? 14 : 15); 616 617 return BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 618 SYS_RES_IRQ, rid, irq, irq, 1, flags); 619 #endif 620 } 621 else { 622 /* primary and secondary channels share interrupt, keep track */ 623 if (!sc->irq) 624 sc->irq = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 625 SYS_RES_IRQ, rid, 0, ~0, 1, flags); 626 sc->irqcnt++; 627 return sc->irq; 628 } 629 } 630 return 0; 631 } 632 633 static int 634 ata_pci_release_resource(device_t dev, device_t child, int type, int rid, 635 struct resource *r) 636 { 637 struct ata_pci_softc *sc = device_get_softc(dev); 638 int channel = ((struct ata_softc *)device_get_softc(child))->channel; 639 640 if (type == SYS_RES_IOPORT) { 641 switch (rid) { 642 case ATA_IOADDR_RID: 643 if (ATA_MASTERDEV(dev)) 644 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 645 SYS_RES_IOPORT, 0x0, r); 646 else 647 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 648 SYS_RES_IOPORT, 0x10+8*channel, r); 649 break; 650 651 case ATA_ALTADDR_RID: 652 if (ATA_MASTERDEV(dev)) 653 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 654 SYS_RES_IOPORT, 0x0, r); 655 else 656 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 657 SYS_RES_IOPORT, 0x14+8*channel, r); 658 break; 659 660 case ATA_BMADDR_RID: 661 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 662 SYS_RES_IOPORT, 0x20, r); 663 default: 664 return ENOENT; 665 } 666 } 667 if (type == SYS_RES_IRQ) { 668 if (rid != ATA_IRQ_RID) 669 return ENOENT; 670 671 if (ATA_MASTERDEV(dev)) { 672 #ifdef __alpha__ 673 return alpha_platform_release_ide_intr(channel, r); 674 #else 675 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 676 SYS_RES_IRQ, rid, r); 677 #endif 678 } 679 else { 680 /* primary and secondary channels share interrupt, keep track */ 681 if (--sc->irqcnt) 682 return 0; 683 sc->irq = 0; 684 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 685 SYS_RES_IRQ, rid, r); 686 } 687 } 688 return EINVAL; 689 } 690 691 static int 692 ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq, 693 int flags, driver_intr_t *intr, void *arg, 694 void **cookiep) 695 { 696 if (ATA_MASTERDEV(dev)) { 697 #ifdef __alpha__ 698 return alpha_platform_setup_ide_intr(child, irq, intr, arg, cookiep); 699 #else 700 return BUS_SETUP_INTR(device_get_parent(dev), child, irq, 701 flags, intr, arg, cookiep); 702 #endif 703 } 704 else 705 return BUS_SETUP_INTR(device_get_parent(dev), dev, irq, 706 flags, intr, arg, cookiep); 707 } 708 709 static int 710 ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq, 711 void *cookie) 712 { 713 if (ATA_MASTERDEV(dev)) { 714 #ifdef __alpha__ 715 return alpha_platform_teardown_ide_intr(child, irq, cookie); 716 #else 717 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie); 718 #endif 719 } 720 else 721 return BUS_TEARDOWN_INTR(device_get_parent(dev), dev, irq, cookie); 722 } 723 724 static device_method_t ata_pci_methods[] = { 725 /* device interface */ 726 DEVMETHOD(device_probe, ata_pci_probe), 727 DEVMETHOD(device_attach, ata_pci_attach), 728 DEVMETHOD(device_shutdown, bus_generic_shutdown), 729 DEVMETHOD(device_suspend, bus_generic_suspend), 730 DEVMETHOD(device_resume, bus_generic_resume), 731 732 /* bus methods */ 733 DEVMETHOD(bus_print_child, ata_pci_print_child), 734 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource), 735 DEVMETHOD(bus_release_resource, ata_pci_release_resource), 736 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 737 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 738 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr), 739 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr), 740 { 0, 0 } 741 }; 742 743 static driver_t ata_pci_driver = { 744 "atapci", 745 ata_pci_methods, 746 sizeof(struct ata_pci_softc), 747 }; 748 749 static devclass_t ata_pci_devclass; 750 751 DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0); 752 753 static int 754 ata_pcisub_probe(device_t dev) 755 { 756 struct ata_softc *scp = device_get_softc(dev); 757 device_t *children; 758 int count, i; 759 760 /* find channel number on this controller */ 761 device_get_children(device_get_parent(dev), &children, &count); 762 for (i = 0; i < count; i++) { 763 if (children[i] == dev) 764 scp->channel = i; 765 } 766 free(children, M_TEMP); 767 scp->chiptype = pci_get_devid(device_get_parent(dev)); 768 scp->intr_func = ata_pci_intr; 769 return ata_probe(dev); 770 } 771 772 static device_method_t ata_pcisub_methods[] = { 773 /* device interface */ 774 DEVMETHOD(device_probe, ata_pcisub_probe), 775 DEVMETHOD(device_attach, ata_attach), 776 DEVMETHOD(device_detach, ata_detach), 777 DEVMETHOD(device_resume, ata_resume), 778 { 0, 0 } 779 }; 780 781 static driver_t ata_pcisub_driver = { 782 "ata", 783 ata_pcisub_methods, 784 sizeof(struct ata_softc), 785 }; 786 787 DRIVER_MODULE(ata, atapci, ata_pcisub_driver, ata_devclass, 0, 0); 788