1 /*- 2 * Copyright (c) 1998 - 2004 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include "opt_ata.h" 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/module.h> 37 #include <sys/bus.h> 38 #include <sys/malloc.h> 39 #include <sys/sema.h> 40 #include <sys/taskqueue.h> 41 #include <vm/uma.h> 42 #include <machine/stdarg.h> 43 #include <machine/resource.h> 44 #include <machine/bus.h> 45 #ifdef __alpha__ 46 #include <machine/md_var.h> 47 #endif 48 #include <sys/rman.h> 49 #include <dev/pci/pcivar.h> 50 #include <dev/pci/pcireg.h> 51 #include <dev/ata/ata-all.h> 52 #include <dev/ata/ata-pci.h> 53 54 /* local vars */ 55 static MALLOC_DEFINE(M_ATAPCI, "ATA PCI", "ATA driver PCI"); 56 57 /* misc defines */ 58 #define IOMASK 0xfffffffc 59 60 /* prototypes */ 61 static int ata_pci_allocate(device_t, struct ata_channel *); 62 static void ata_pci_dmainit(struct ata_channel *); 63 static void ata_pci_locknoop(struct ata_channel *, int); 64 65 int 66 ata_legacy(device_t dev) 67 { 68 return ((pci_read_config(dev, PCIR_PROGIF, 1)&PCIP_STORAGE_IDE_MASTERDEV) && 69 ((pci_read_config(dev, PCIR_PROGIF, 1) & 70 (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC)) != 71 (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC))); 72 } 73 74 static int 75 ata_pci_probe(device_t dev) 76 { 77 if (pci_get_class(dev) != PCIC_STORAGE) 78 return ENXIO; 79 80 switch (pci_get_vendor(dev)) { 81 case ATA_ACARD_ID: 82 if (!ata_acard_ident(dev)) 83 return 0; 84 break; 85 case ATA_ACER_LABS_ID: 86 if (!ata_ali_ident(dev)) 87 return 0; 88 break; 89 case ATA_AMD_ID: 90 if (!ata_amd_ident(dev)) 91 return 0; 92 break; 93 case ATA_CYRIX_ID: 94 if (!ata_cyrix_ident(dev)) 95 return 0; 96 break; 97 case ATA_CYPRESS_ID: 98 if (!ata_cypress_ident(dev)) 99 return 0; 100 break; 101 case ATA_HIGHPOINT_ID: 102 if (!ata_highpoint_ident(dev)) 103 return 0; 104 break; 105 case ATA_INTEL_ID: 106 if (!ata_intel_ident(dev)) 107 return 0; 108 break; 109 case ATA_NATIONAL_ID: 110 if (!ata_national_ident(dev)) 111 return 0; 112 break; 113 case ATA_NVIDIA_ID: 114 if (!ata_nvidia_ident(dev)) 115 return 0; 116 break; 117 case ATA_PROMISE_ID: 118 if (!ata_promise_ident(dev)) 119 return 0; 120 break; 121 case ATA_SERVERWORKS_ID: 122 if (!ata_serverworks_ident(dev)) 123 return 0; 124 break; 125 case ATA_SILICON_IMAGE_ID: 126 if (!ata_sii_ident(dev)) 127 return 0; 128 break; 129 case ATA_SIS_ID: 130 if (!ata_sis_ident(dev)) 131 return 0; 132 break; 133 case ATA_VIA_ID: 134 if (!ata_via_ident(dev)) 135 return 0; 136 break; 137 case 0x16ca: 138 if (pci_get_devid(dev) == 0x000116ca) { 139 ata_generic_ident(dev); 140 device_set_desc(dev, "Cenatek Rocket Drive controller"); 141 return 0; 142 } 143 break; 144 case 0x1042: 145 if (pci_get_devid(dev)==0x10001042 || pci_get_devid(dev)==0x10011042) { 146 ata_generic_ident(dev); 147 device_set_desc(dev, 148 "RZ 100? ATA controller !WARNING! buggy HW data loss possible"); 149 return 0; 150 } 151 break; 152 } 153 154 /* unknown chipset, try generic DMA if it seems possible */ 155 if ((pci_get_class(dev) == PCIC_STORAGE) && 156 (pci_get_subclass(dev) == PCIS_STORAGE_IDE)) 157 return ata_generic_ident(dev); 158 159 return ENXIO; 160 } 161 162 static int 163 ata_pci_attach(device_t dev) 164 { 165 struct ata_pci_controller *ctlr = device_get_softc(dev); 166 u_int32_t cmd; 167 int unit; 168 169 /* do chipset specific setups only needed once */ 170 if (ata_legacy(dev) || pci_read_config(dev, PCIR_BAR(2), 4) & IOMASK) 171 ctlr->channels = 2; 172 else 173 ctlr->channels = 1; 174 ctlr->allocate = ata_pci_allocate; 175 ctlr->dmainit = ata_pci_dmainit; 176 ctlr->locking = ata_pci_locknoop; 177 178 /* if needed try to enable busmastering */ 179 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 180 if (!(cmd & PCIM_CMD_BUSMASTEREN)) { 181 pci_write_config(dev, PCIR_COMMAND, cmd | PCIM_CMD_BUSMASTEREN, 2); 182 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 183 } 184 185 /* if busmastering mode "stuck" use it */ 186 if ((cmd & PCIM_CMD_BUSMASTEREN) == PCIM_CMD_BUSMASTEREN) { 187 ctlr->r_type1 = SYS_RES_IOPORT; 188 ctlr->r_rid1 = ATA_BMADDR_RID; 189 ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1, &ctlr->r_rid1, 190 RF_ACTIVE); 191 } 192 193 ctlr->chipinit(dev); 194 195 /* attach all channels on this controller */ 196 for (unit = 0; unit < ctlr->channels; unit++) { 197 if (unit == 0 && (pci_get_progif(dev) & 0x81) == 0x80) { 198 device_add_child(dev, "ata", unit); 199 continue; 200 } 201 if (unit == 1 && (pci_get_progif(dev) & 0x84) == 0x80) { 202 device_add_child(dev, "ata", unit); 203 continue; 204 } 205 device_add_child(dev, "ata", devclass_find_free_unit(ata_devclass, 2)); 206 } 207 return bus_generic_attach(dev); 208 } 209 210 static int 211 ata_pci_detach(device_t dev) 212 { 213 struct ata_pci_controller *ctlr = device_get_softc(dev); 214 struct ata_channel *ch; 215 int unit; 216 217 /* mark HW as gone, we dont want to issue commands to HW no longer there */ 218 for (unit = 0; unit < ctlr->channels; unit++) { 219 if ((ch = ctlr->interrupt[unit].argument)) 220 ch->flags |= ATA_HWGONE; 221 } 222 223 bus_generic_detach(dev); 224 225 if (ctlr->r_irq) { 226 bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle); 227 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ctlr->r_irq); 228 } 229 if (ctlr->r_res2) 230 bus_release_resource(dev, ctlr->r_type2, ctlr->r_rid2, ctlr->r_res2); 231 if (ctlr->r_res1) 232 bus_release_resource(dev, ctlr->r_type1, ctlr->r_rid1, ctlr->r_res1); 233 234 return 0; 235 } 236 237 static int 238 ata_pci_print_child(device_t dev, device_t child) 239 { 240 struct ata_channel *ch = device_get_softc(child); 241 int retval = 0; 242 243 retval += bus_print_child_header(dev, child); 244 retval += printf(": at 0x%lx", rman_get_start(ch->r_io[ATA_IDX_ADDR].res)); 245 246 if (ata_legacy(dev)) 247 retval += printf(" irq %d", 14 + ch->unit); 248 249 retval += bus_print_child_footer(dev, child); 250 251 return retval; 252 } 253 254 static struct resource * 255 ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid, 256 u_long start, u_long end, u_long count, u_int flags) 257 { 258 struct ata_pci_controller *controller = device_get_softc(dev); 259 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 260 struct resource *res = NULL; 261 int myrid; 262 263 if (type == SYS_RES_IOPORT) { 264 switch (*rid) { 265 case ATA_IOADDR_RID: 266 if (ata_legacy(dev)) { 267 start = (unit ? ATA_SECONDARY : ATA_PRIMARY); 268 count = ATA_IOSIZE; 269 end = start + count - 1; 270 } 271 myrid = PCIR_BAR(0) + (unit << 3); 272 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 273 SYS_RES_IOPORT, &myrid, 274 start, end, count, flags); 275 break; 276 277 case ATA_ALTADDR_RID: 278 if (ata_legacy(dev)) { 279 start = (unit ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET; 280 count = ATA_ALTIOSIZE; 281 end = start + count - 1; 282 } 283 myrid = PCIR_BAR(1) + (unit << 3); 284 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 285 SYS_RES_IOPORT, &myrid, 286 start, end, count, flags); 287 break; 288 } 289 return res; 290 } 291 292 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) { 293 if (ata_legacy(dev)) { 294 #ifdef __alpha__ 295 return alpha_platform_alloc_ide_intr(unit); 296 #else 297 int irq = (unit == 0 ? 14 : 15); 298 299 return BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 300 SYS_RES_IRQ, rid, irq, irq, 1, flags); 301 #endif 302 } 303 else { 304 return controller->r_irq; 305 } 306 } 307 return 0; 308 } 309 310 static int 311 ata_pci_release_resource(device_t dev, device_t child, int type, int rid, 312 struct resource *r) 313 { 314 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 315 316 if (type == SYS_RES_IOPORT) { 317 switch (rid) { 318 case ATA_IOADDR_RID: 319 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 320 SYS_RES_IOPORT, 321 PCIR_BAR(0) + (unit << 3), r); 322 break; 323 324 case ATA_ALTADDR_RID: 325 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 326 SYS_RES_IOPORT, 327 PCIR_BAR(1) + (unit << 3), r); 328 break; 329 default: 330 return ENOENT; 331 } 332 } 333 if (type == SYS_RES_IRQ) { 334 if (rid != ATA_IRQ_RID) 335 return ENOENT; 336 337 if (ata_legacy(dev)) { 338 #ifdef __alpha__ 339 return alpha_platform_release_ide_intr(unit, r); 340 #else 341 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 342 SYS_RES_IRQ, rid, r); 343 #endif 344 } 345 else 346 return 0; 347 } 348 return EINVAL; 349 } 350 351 static int 352 ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq, 353 int flags, driver_intr_t *function, void *argument, 354 void **cookiep) 355 { 356 if (ata_legacy(dev)) { 357 #ifdef __alpha__ 358 return alpha_platform_setup_ide_intr(child, irq, function, argument, 359 cookiep); 360 #else 361 return BUS_SETUP_INTR(device_get_parent(dev), child, irq, 362 flags, function, argument, cookiep); 363 #endif 364 } 365 else { 366 struct ata_pci_controller *controller = device_get_softc(dev); 367 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 368 369 controller->interrupt[unit].function = function; 370 controller->interrupt[unit].argument = argument; 371 *cookiep = controller; 372 return 0; 373 } 374 } 375 376 static int 377 ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq, 378 void *cookie) 379 { 380 if (ata_legacy(dev)) { 381 #ifdef __alpha__ 382 return alpha_platform_teardown_ide_intr(child, irq, cookie); 383 #else 384 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie); 385 #endif 386 } 387 else { 388 struct ata_pci_controller *controller = device_get_softc(dev); 389 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 390 391 controller->interrupt[unit].function = NULL; 392 controller->interrupt[unit].argument = NULL; 393 return 0; 394 } 395 } 396 397 static int 398 ata_pci_allocate(device_t dev, struct ata_channel *ch) 399 { 400 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 401 struct resource *io = NULL, *altio = NULL; 402 int i, rid; 403 404 rid = ATA_IOADDR_RID; 405 io = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 406 0, ~0, ATA_IOSIZE, RF_ACTIVE); 407 if (!io) 408 return ENXIO; 409 410 rid = ATA_ALTADDR_RID; 411 altio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 412 0, ~0, ATA_ALTIOSIZE, RF_ACTIVE); 413 if (!altio) { 414 bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io); 415 return ENXIO; 416 } 417 418 for (i = ATA_DATA; i <= ATA_STATUS; i ++) { 419 ch->r_io[i].res = io; 420 ch->r_io[i].offset = i; 421 } 422 ch->r_io[ATA_ALTSTAT].res = altio; 423 ch->r_io[ATA_ALTSTAT].offset = ata_legacy(device_get_parent(dev)) ? 0 : 2; 424 ch->r_io[ATA_IDX_ADDR].res = io; 425 426 if (ctlr->r_res1) { 427 for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) { 428 ch->r_io[i].res = ctlr->r_res1; 429 ch->r_io[i].offset = (i - ATA_BMCMD_PORT)+(ch->unit * ATA_BMIOSIZE); 430 } 431 432 /* if simplex controller, only allow DMA on primary channel */ 433 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & 434 (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE)); 435 if (ch->unit > 0 && 436 (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX)) 437 device_printf(dev, "simplex device, DMA on primary only\n"); 438 else 439 ctlr->dmainit(ch); 440 } 441 442 ata_generic_hw(ch); 443 444 return 0; 445 } 446 447 static int 448 ata_pci_dmastart(struct ata_channel *ch) 449 { 450 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) | 451 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR))); 452 ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, ch->dma->mdmatab); 453 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, 454 (ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_WRITE_READ) | 455 ((ch->dma->flags & ATA_DMA_READ) ? ATA_BMCMD_WRITE_READ : 0) | 456 ATA_BMCMD_START_STOP); 457 return 0; 458 } 459 460 static int 461 ata_pci_dmastop(struct ata_channel *ch) 462 { 463 int error; 464 465 error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 466 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, 467 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 468 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR); 469 return error; 470 } 471 472 static void 473 ata_pci_dmainit(struct ata_channel *ch) 474 { 475 ata_dmainit(ch); 476 if (ch->dma) { 477 ch->dma->start = ata_pci_dmastart; 478 ch->dma->stop = ata_pci_dmastop; 479 } 480 } 481 482 static void 483 ata_pci_locknoop(struct ata_channel *ch, int flags) 484 { 485 } 486 487 static device_method_t ata_pci_methods[] = { 488 /* device interface */ 489 DEVMETHOD(device_probe, ata_pci_probe), 490 DEVMETHOD(device_attach, ata_pci_attach), 491 DEVMETHOD(device_detach, ata_pci_detach), 492 DEVMETHOD(device_shutdown, bus_generic_shutdown), 493 DEVMETHOD(device_suspend, bus_generic_suspend), 494 DEVMETHOD(device_resume, bus_generic_resume), 495 496 /* bus methods */ 497 DEVMETHOD(bus_print_child, ata_pci_print_child), 498 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource), 499 DEVMETHOD(bus_release_resource, ata_pci_release_resource), 500 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 501 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 502 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr), 503 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr), 504 { 0, 0 } 505 }; 506 507 static driver_t ata_pci_driver = { 508 "atapci", 509 ata_pci_methods, 510 sizeof(struct ata_pci_controller), 511 }; 512 513 static devclass_t ata_pci_devclass; 514 515 DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0); 516 517 static int 518 ata_pcisub_probe(device_t dev) 519 { 520 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 521 struct ata_channel *ch = device_get_softc(dev); 522 device_t *children; 523 int count, error, i; 524 525 /* take care of green memory */ 526 bzero(ch, sizeof(struct ata_channel)); 527 528 /* find channel number on this controller */ 529 device_get_children(device_get_parent(dev), &children, &count); 530 for (i = 0; i < count; i++) { 531 if (children[i] == dev) 532 ch->unit = i; 533 } 534 free(children, M_TEMP); 535 536 ch->device[MASTER].setmode = ctlr->setmode; 537 ch->device[SLAVE].setmode = ctlr->setmode; 538 ch->locking = ctlr->locking; 539 ch->reset = ctlr->reset; 540 541 if ((error = ctlr->allocate(dev, ch))) 542 return error; 543 544 return ata_probe(dev); 545 } 546 547 static device_method_t ata_pcisub_methods[] = { 548 /* device interface */ 549 DEVMETHOD(device_probe, ata_pcisub_probe), 550 DEVMETHOD(device_attach, ata_attach), 551 DEVMETHOD(device_detach, ata_detach), 552 DEVMETHOD(device_suspend, ata_suspend), 553 DEVMETHOD(device_resume, ata_resume), 554 { 0, 0 } 555 }; 556 557 static driver_t ata_pcisub_driver = { 558 "ata", 559 ata_pcisub_methods, 560 sizeof(struct ata_channel), 561 }; 562 563 DRIVER_MODULE(ata, atapci, ata_pcisub_driver, ata_devclass, 0, 0); 564