1 /*- 2 * Copyright (c) 1998 - 2008 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include "opt_ata.h" 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/module.h> 35 #include <sys/ata.h> 36 #include <sys/bus.h> 37 #include <sys/conf.h> 38 #include <sys/malloc.h> 39 #include <sys/sema.h> 40 #include <sys/taskqueue.h> 41 #include <vm/uma.h> 42 #include <machine/stdarg.h> 43 #include <machine/resource.h> 44 #include <machine/bus.h> 45 #include <sys/rman.h> 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/ata/ata-all.h> 49 #include <dev/ata/ata-pci.h> 50 #include <ata_if.h> 51 52 /* local vars */ 53 static MALLOC_DEFINE(M_ATAPCI, "ata_pci", "ATA driver PCI"); 54 55 /* misc defines */ 56 #define IOMASK 0xfffffffc 57 58 /* local prototypes */ 59 static int ata_generic_chipinit(device_t dev); 60 static void ata_generic_setmode(device_t dev, int mode); 61 62 /* 63 * generic PCI ATA device probe 64 */ 65 int 66 ata_pci_probe(device_t dev) 67 { 68 struct ata_pci_controller *ctlr = device_get_softc(dev); 69 char buffer[64]; 70 71 /* is this a storage class device ? */ 72 if (pci_get_class(dev) != PCIC_STORAGE) 73 return (ENXIO); 74 75 /* is this an IDE/ATA type device ? */ 76 if (pci_get_subclass(dev) != PCIS_STORAGE_IDE) 77 return (ENXIO); 78 79 sprintf(buffer, "%s ATA controller", ata_pcivendor2str(dev)); 80 device_set_desc_copy(dev, buffer); 81 ctlr->chipinit = ata_generic_chipinit; 82 83 /* we are a low priority handler */ 84 return (BUS_PROBE_GENERIC); 85 } 86 87 int 88 ata_pci_attach(device_t dev) 89 { 90 struct ata_pci_controller *ctlr = device_get_softc(dev); 91 device_t child; 92 u_int32_t cmd; 93 int unit; 94 95 /* do chipset specific setups only needed once */ 96 ctlr->legacy = ata_legacy(dev); 97 if (ctlr->legacy || pci_read_config(dev, PCIR_BAR(2), 4) & IOMASK) 98 ctlr->channels = 2; 99 else 100 ctlr->channels = 1; 101 ctlr->ichannels = -1; 102 ctlr->ch_attach = ata_pci_ch_attach; 103 ctlr->ch_detach = ata_pci_ch_detach; 104 ctlr->dev = dev; 105 106 /* if needed try to enable busmastering */ 107 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 108 if (!(cmd & PCIM_CMD_BUSMASTEREN)) { 109 pci_write_config(dev, PCIR_COMMAND, cmd | PCIM_CMD_BUSMASTEREN, 2); 110 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 111 } 112 113 /* if busmastering mode "stuck" use it */ 114 if ((cmd & PCIM_CMD_BUSMASTEREN) == PCIM_CMD_BUSMASTEREN) { 115 ctlr->r_type1 = SYS_RES_IOPORT; 116 ctlr->r_rid1 = ATA_BMADDR_RID; 117 ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1, &ctlr->r_rid1, 118 RF_ACTIVE); 119 } 120 121 if (ctlr->chipinit(dev)) 122 return ENXIO; 123 124 /* attach all channels on this controller */ 125 for (unit = 0; unit < ctlr->channels; unit++) { 126 if ((ctlr->ichannels & (1 << unit)) == 0) 127 continue; 128 child = device_add_child(dev, "ata", 129 ((unit == 0 || unit == 1) && ctlr->legacy) ? 130 unit : devclass_find_free_unit(ata_devclass, 2)); 131 if (child == NULL) 132 device_printf(dev, "failed to add ata child device\n"); 133 else 134 device_set_ivars(child, (void *)(intptr_t)unit); 135 } 136 bus_generic_attach(dev); 137 return 0; 138 } 139 140 int 141 ata_pci_detach(device_t dev) 142 { 143 struct ata_pci_controller *ctlr = device_get_softc(dev); 144 device_t *children; 145 int nchildren, i; 146 147 /* detach & delete all children */ 148 if (!device_get_children(dev, &children, &nchildren)) { 149 for (i = 0; i < nchildren; i++) 150 device_delete_child(dev, children[i]); 151 free(children, M_TEMP); 152 } 153 154 if (ctlr->r_irq) { 155 bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle); 156 bus_release_resource(dev, SYS_RES_IRQ, ctlr->r_irq_rid, ctlr->r_irq); 157 if (ctlr->r_irq_rid != ATA_IRQ_RID) 158 pci_release_msi(dev); 159 } 160 if (ctlr->r_res2) 161 bus_release_resource(dev, ctlr->r_type2, ctlr->r_rid2, ctlr->r_res2); 162 if (ctlr->r_res1) 163 bus_release_resource(dev, ctlr->r_type1, ctlr->r_rid1, ctlr->r_res1); 164 165 return 0; 166 } 167 168 int 169 ata_pci_suspend(device_t dev) 170 { 171 struct ata_pci_controller *ctlr = device_get_softc(dev); 172 int error = 0; 173 174 bus_generic_suspend(dev); 175 if (ctlr->suspend) 176 error = ctlr->suspend(dev); 177 return error; 178 } 179 180 int 181 ata_pci_resume(device_t dev) 182 { 183 struct ata_pci_controller *ctlr = device_get_softc(dev); 184 int error = 0; 185 186 if (ctlr->resume) 187 error = ctlr->resume(dev); 188 bus_generic_resume(dev); 189 return error; 190 } 191 192 int 193 ata_pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 194 { 195 196 return (BUS_READ_IVAR(device_get_parent(dev), dev, which, result)); 197 } 198 199 int 200 ata_pci_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 201 { 202 203 return (BUS_WRITE_IVAR(device_get_parent(dev), dev, which, value)); 204 } 205 206 uint32_t 207 ata_pci_read_config(device_t dev, device_t child, int reg, int width) 208 { 209 210 return (pci_read_config(dev, reg, width)); 211 } 212 213 void 214 ata_pci_write_config(device_t dev, device_t child, int reg, 215 uint32_t val, int width) 216 { 217 218 pci_write_config(dev, reg, val, width); 219 } 220 221 struct resource * 222 ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid, 223 u_long start, u_long end, u_long count, u_int flags) 224 { 225 struct ata_pci_controller *controller = device_get_softc(dev); 226 struct resource *res = NULL; 227 228 if (device_get_devclass(child) == ata_devclass) { 229 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 230 int myrid; 231 232 if (type == SYS_RES_IOPORT) { 233 switch (*rid) { 234 case ATA_IOADDR_RID: 235 if (controller->legacy) { 236 start = (unit ? ATA_SECONDARY : ATA_PRIMARY); 237 count = ATA_IOSIZE; 238 end = start + count - 1; 239 } 240 myrid = PCIR_BAR(0) + (unit << 3); 241 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 242 SYS_RES_IOPORT, &myrid, 243 start, end, count, flags); 244 break; 245 case ATA_CTLADDR_RID: 246 if (controller->legacy) { 247 start = (unit ? ATA_SECONDARY : ATA_PRIMARY) + 248 ATA_CTLOFFSET; 249 count = ATA_CTLIOSIZE; 250 end = start + count - 1; 251 } 252 myrid = PCIR_BAR(1) + (unit << 3); 253 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 254 SYS_RES_IOPORT, &myrid, 255 start, end, count, flags); 256 break; 257 } 258 } 259 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) { 260 if (controller->legacy) { 261 int irq = (unit == 0 ? 14 : 15); 262 263 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 264 SYS_RES_IRQ, rid, irq, irq, 1, flags); 265 } else 266 res = controller->r_irq; 267 } 268 } else { 269 if (type == SYS_RES_IRQ) { 270 if (*rid != ATA_IRQ_RID) 271 return (NULL); 272 res = controller->r_irq; 273 } else { 274 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 275 type, rid, start, end, count, flags); 276 } 277 } 278 return (res); 279 } 280 281 int 282 ata_pci_release_resource(device_t dev, device_t child, int type, int rid, 283 struct resource *r) 284 { 285 286 if (device_get_devclass(child) == ata_devclass) { 287 struct ata_pci_controller *controller = device_get_softc(dev); 288 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 289 290 if (type == SYS_RES_IOPORT) { 291 switch (rid) { 292 case ATA_IOADDR_RID: 293 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 294 SYS_RES_IOPORT, 295 PCIR_BAR(0) + (unit << 3), r); 296 case ATA_CTLADDR_RID: 297 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 298 SYS_RES_IOPORT, 299 PCIR_BAR(1) + (unit << 3), r); 300 default: 301 return ENOENT; 302 } 303 } 304 if (type == SYS_RES_IRQ) { 305 if (rid != ATA_IRQ_RID) 306 return ENOENT; 307 if (controller->legacy) { 308 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 309 SYS_RES_IRQ, rid, r); 310 } else 311 return 0; 312 } 313 } else { 314 if (type == SYS_RES_IRQ) { 315 if (rid != ATA_IRQ_RID) 316 return (ENOENT); 317 return (0); 318 } else { 319 return (BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 320 type, rid, r)); 321 } 322 } 323 return (EINVAL); 324 } 325 326 int 327 ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq, 328 int flags, driver_filter_t *filter, driver_intr_t *function, 329 void *argument, void **cookiep) 330 { 331 struct ata_pci_controller *controller = device_get_softc(dev); 332 333 if (controller->legacy) { 334 return BUS_SETUP_INTR(device_get_parent(dev), child, irq, 335 flags, filter, function, argument, cookiep); 336 } else { 337 struct ata_pci_controller *controller = device_get_softc(dev); 338 int unit; 339 340 if (filter != NULL) { 341 printf("ata-pci.c: we cannot use a filter here\n"); 342 return (EINVAL); 343 } 344 if (device_get_devclass(child) == ata_devclass) 345 unit = ((struct ata_channel *)device_get_softc(child))->unit; 346 else 347 unit = ATA_PCI_MAX_CH - 1; 348 controller->interrupt[unit].function = function; 349 controller->interrupt[unit].argument = argument; 350 *cookiep = controller; 351 return 0; 352 } 353 } 354 355 int 356 ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq, 357 void *cookie) 358 { 359 struct ata_pci_controller *controller = device_get_softc(dev); 360 361 if (controller->legacy) { 362 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie); 363 } else { 364 struct ata_pci_controller *controller = device_get_softc(dev); 365 int unit; 366 367 if (device_get_devclass(child) == ata_devclass) 368 unit = ((struct ata_channel *)device_get_softc(child))->unit; 369 else 370 unit = ATA_PCI_MAX_CH - 1; 371 controller->interrupt[unit].function = NULL; 372 controller->interrupt[unit].argument = NULL; 373 return 0; 374 } 375 } 376 377 static void 378 ata_generic_setmode(device_t dev, int mode) 379 { 380 struct ata_device *atadev = device_get_softc(dev); 381 382 mode = ata_limit_mode(dev, mode, ATA_UDMA2); 383 mode = ata_check_80pin(dev, mode); 384 if (!ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode)) 385 atadev->mode = mode; 386 } 387 388 static int 389 ata_generic_chipinit(device_t dev) 390 { 391 struct ata_pci_controller *ctlr = device_get_softc(dev); 392 393 if (ata_setup_interrupt(dev, ata_generic_intr)) 394 return ENXIO; 395 ctlr->setmode = ata_generic_setmode; 396 return 0; 397 } 398 399 int 400 ata_pci_ch_attach(device_t dev) 401 { 402 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 403 struct ata_channel *ch = device_get_softc(dev); 404 struct resource *io = NULL, *ctlio = NULL; 405 int i, rid; 406 407 rid = ATA_IOADDR_RID; 408 if (!(io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE))) 409 return ENXIO; 410 411 rid = ATA_CTLADDR_RID; 412 if (!(ctlio = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,RF_ACTIVE))){ 413 bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io); 414 return ENXIO; 415 } 416 417 ata_pci_dmainit(dev); 418 419 for (i = ATA_DATA; i <= ATA_COMMAND; i ++) { 420 ch->r_io[i].res = io; 421 ch->r_io[i].offset = i; 422 } 423 ch->r_io[ATA_CONTROL].res = ctlio; 424 ch->r_io[ATA_CONTROL].offset = ctlr->legacy ? 0 : 2; 425 ch->r_io[ATA_IDX_ADDR].res = io; 426 ata_default_registers(dev); 427 if (ctlr->r_res1) { 428 for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) { 429 ch->r_io[i].res = ctlr->r_res1; 430 ch->r_io[i].offset = (i - ATA_BMCMD_PORT) + (ch->unit*ATA_BMIOSIZE); 431 } 432 } 433 434 ata_pci_hw(dev); 435 return 0; 436 } 437 438 int 439 ata_pci_ch_detach(device_t dev) 440 { 441 struct ata_channel *ch = device_get_softc(dev); 442 443 ata_pci_dmafini(dev); 444 445 bus_release_resource(dev, SYS_RES_IOPORT, ATA_CTLADDR_RID, 446 ch->r_io[ATA_CONTROL].res); 447 bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, 448 ch->r_io[ATA_IDX_ADDR].res); 449 450 return (0); 451 } 452 453 int 454 ata_pci_status(device_t dev) 455 { 456 struct ata_pci_controller *controller = 457 device_get_softc(device_get_parent(dev)); 458 struct ata_channel *ch = device_get_softc(dev); 459 460 if ((dumping || !controller->legacy) && 461 ((ch->flags & ATA_ALWAYS_DMASTAT) || 462 (ch->dma.flags & ATA_DMA_ACTIVE))) { 463 int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 464 465 if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) != 466 ATA_BMSTAT_INTERRUPT) 467 return 0; 468 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR); 469 DELAY(1); 470 } 471 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) { 472 DELAY(100); 473 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) 474 return 0; 475 } 476 return 1; 477 } 478 479 void 480 ata_pci_hw(device_t dev) 481 { 482 struct ata_channel *ch = device_get_softc(dev); 483 484 ata_generic_hw(dev); 485 ch->hw.status = ata_pci_status; 486 } 487 488 static int 489 ata_pci_dmastart(struct ata_request *request) 490 { 491 struct ata_channel *ch = device_get_softc(request->parent); 492 493 ATA_DEBUG_RQ(request, "dmastart"); 494 495 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) | 496 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR))); 497 ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, request->dma->sg_bus); 498 ch->dma.flags |= ATA_DMA_ACTIVE; 499 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, 500 (ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_WRITE_READ) | 501 ((request->flags & ATA_R_READ) ? ATA_BMCMD_WRITE_READ : 0)| 502 ATA_BMCMD_START_STOP); 503 return 0; 504 } 505 506 static int 507 ata_pci_dmastop(struct ata_request *request) 508 { 509 struct ata_channel *ch = device_get_softc(request->parent); 510 int error; 511 512 ATA_DEBUG_RQ(request, "dmastop"); 513 514 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, 515 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 516 ch->dma.flags &= ~ATA_DMA_ACTIVE; 517 error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 518 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR); 519 return error; 520 } 521 522 static void 523 ata_pci_dmareset(device_t dev) 524 { 525 struct ata_channel *ch = device_get_softc(dev); 526 struct ata_request *request; 527 528 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, 529 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 530 ch->dma.flags &= ~ATA_DMA_ACTIVE; 531 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR); 532 if ((request = ch->running)) { 533 device_printf(dev, "DMA reset calling unload\n"); 534 ch->dma.unload(request); 535 } 536 } 537 538 void 539 ata_pci_dmainit(device_t dev) 540 { 541 struct ata_channel *ch = device_get_softc(dev); 542 543 ata_dmainit(dev); 544 ch->dma.start = ata_pci_dmastart; 545 ch->dma.stop = ata_pci_dmastop; 546 ch->dma.reset = ata_pci_dmareset; 547 } 548 549 void 550 ata_pci_dmafini(device_t dev) 551 { 552 553 ata_dmafini(dev); 554 } 555 556 static device_method_t ata_pci_methods[] = { 557 /* device interface */ 558 DEVMETHOD(device_probe, ata_pci_probe), 559 DEVMETHOD(device_attach, ata_pci_attach), 560 DEVMETHOD(device_detach, ata_pci_detach), 561 DEVMETHOD(device_suspend, ata_pci_suspend), 562 DEVMETHOD(device_resume, ata_pci_resume), 563 DEVMETHOD(device_shutdown, bus_generic_shutdown), 564 565 /* bus methods */ 566 DEVMETHOD(bus_read_ivar, ata_pci_read_ivar), 567 DEVMETHOD(bus_write_ivar, ata_pci_write_ivar), 568 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource), 569 DEVMETHOD(bus_release_resource, ata_pci_release_resource), 570 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 571 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 572 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr), 573 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr), 574 DEVMETHOD(pci_read_config, ata_pci_read_config), 575 DEVMETHOD(pci_write_config, ata_pci_write_config), 576 577 { 0, 0 } 578 }; 579 580 devclass_t ata_pci_devclass; 581 582 static driver_t ata_pci_driver = { 583 "atapci", 584 ata_pci_methods, 585 sizeof(struct ata_pci_controller), 586 }; 587 588 DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0); 589 MODULE_VERSION(atapci, 1); 590 MODULE_DEPEND(atapci, ata, 1, 1, 1); 591 592 static int 593 ata_pcichannel_probe(device_t dev) 594 { 595 char buffer[32]; 596 597 if ((intptr_t)device_get_ivars(dev) < 0) 598 return (ENXIO); 599 sprintf(buffer, "ATA channel %d", (int)(intptr_t)device_get_ivars(dev)); 600 device_set_desc_copy(dev, buffer); 601 602 return ata_probe(dev); 603 } 604 605 static int 606 ata_pcichannel_attach(device_t dev) 607 { 608 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 609 struct ata_channel *ch = device_get_softc(dev); 610 int error; 611 612 if (ch->attached) 613 return (0); 614 ch->attached = 1; 615 616 ch->unit = (intptr_t)device_get_ivars(dev); 617 618 resource_int_value(device_get_name(dev), 619 device_get_unit(dev), "pm_level", &ch->pm_level); 620 621 if ((error = ctlr->ch_attach(dev))) 622 return error; 623 624 return ata_attach(dev); 625 } 626 627 static int 628 ata_pcichannel_detach(device_t dev) 629 { 630 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 631 struct ata_channel *ch = device_get_softc(dev); 632 int error; 633 634 if (!ch->attached) 635 return (0); 636 ch->attached = 0; 637 638 if ((error = ata_detach(dev))) 639 return error; 640 641 if (ctlr->ch_detach) 642 return (ctlr->ch_detach(dev)); 643 644 return (0); 645 } 646 static int 647 ata_pcichannel_suspend(device_t dev) 648 { 649 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 650 struct ata_channel *ch = device_get_softc(dev); 651 int error; 652 653 if (!ch->attached) 654 return (0); 655 656 if ((error = ata_suspend(dev))) 657 return (error); 658 659 if (ctlr->ch_suspend != NULL && (error = ctlr->ch_suspend(dev))) 660 return (error); 661 662 return (0); 663 } 664 665 static int 666 ata_pcichannel_resume(device_t dev) 667 { 668 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 669 struct ata_channel *ch = device_get_softc(dev); 670 int error; 671 672 if (!ch->attached) 673 return (0); 674 675 if (ctlr->ch_resume != NULL && (error = ctlr->ch_resume(dev))) 676 return (error); 677 678 return ata_resume(dev); 679 } 680 681 682 static int 683 ata_pcichannel_locking(device_t dev, int mode) 684 { 685 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 686 struct ata_channel *ch = device_get_softc(dev); 687 688 if (ctlr->locking) 689 return ctlr->locking(dev, mode); 690 else 691 return ch->unit; 692 } 693 694 static void 695 ata_pcichannel_reset(device_t dev) 696 { 697 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 698 struct ata_channel *ch = device_get_softc(dev); 699 700 /* if DMA engine present reset it */ 701 if (ch->dma.reset) 702 ch->dma.reset(dev); 703 704 /* reset the controller HW */ 705 if (ctlr->reset) 706 ctlr->reset(dev); 707 else 708 ata_generic_reset(dev); 709 } 710 711 static void 712 ata_pcichannel_setmode(device_t parent, device_t dev) 713 { 714 struct ata_pci_controller *ctlr = device_get_softc(GRANDPARENT(dev)); 715 struct ata_device *atadev = device_get_softc(dev); 716 int mode = atadev->mode; 717 718 ctlr->setmode(dev, ATA_PIO_MAX); 719 if (mode >= ATA_DMA) 720 ctlr->setmode(dev, mode); 721 } 722 723 static device_method_t ata_pcichannel_methods[] = { 724 /* device interface */ 725 DEVMETHOD(device_probe, ata_pcichannel_probe), 726 DEVMETHOD(device_attach, ata_pcichannel_attach), 727 DEVMETHOD(device_detach, ata_pcichannel_detach), 728 DEVMETHOD(device_shutdown, bus_generic_shutdown), 729 DEVMETHOD(device_suspend, ata_pcichannel_suspend), 730 DEVMETHOD(device_resume, ata_pcichannel_resume), 731 732 /* ATA methods */ 733 DEVMETHOD(ata_setmode, ata_pcichannel_setmode), 734 DEVMETHOD(ata_locking, ata_pcichannel_locking), 735 DEVMETHOD(ata_reset, ata_pcichannel_reset), 736 737 { 0, 0 } 738 }; 739 740 driver_t ata_pcichannel_driver = { 741 "ata", 742 ata_pcichannel_methods, 743 sizeof(struct ata_channel), 744 }; 745 746 DRIVER_MODULE(ata, atapci, ata_pcichannel_driver, ata_devclass, 0, 0); 747 748 749 /* 750 * misc support fucntions 751 */ 752 int 753 ata_legacy(device_t dev) 754 { 755 return (((pci_read_config(dev, PCIR_PROGIF, 1)&PCIP_STORAGE_IDE_MASTERDEV)&& 756 ((pci_read_config(dev, PCIR_PROGIF, 1) & 757 (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC)) != 758 (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC))) || 759 (!pci_read_config(dev, PCIR_BAR(0), 4) && 760 !pci_read_config(dev, PCIR_BAR(1), 4) && 761 !pci_read_config(dev, PCIR_BAR(2), 4) && 762 !pci_read_config(dev, PCIR_BAR(3), 4) && 763 !pci_read_config(dev, PCIR_BAR(5), 4))); 764 } 765 766 void 767 ata_generic_intr(void *data) 768 { 769 struct ata_pci_controller *ctlr = data; 770 struct ata_channel *ch; 771 int unit; 772 773 for (unit = 0; unit < ATA_PCI_MAX_CH; unit++) { 774 if ((ch = ctlr->interrupt[unit].argument)) 775 ctlr->interrupt[unit].function(ch); 776 } 777 } 778 779 int 780 ata_setup_interrupt(device_t dev, void *intr_func) 781 { 782 struct ata_pci_controller *ctlr = device_get_softc(dev); 783 int i, msi = 0; 784 785 if (!ctlr->legacy) { 786 if (resource_int_value(device_get_name(dev), 787 device_get_unit(dev), "msi", &i) == 0 && i != 0) 788 msi = 1; 789 if (msi && pci_msi_count(dev) > 0 && pci_alloc_msi(dev, &msi) == 0) { 790 ctlr->r_irq_rid = 0x1; 791 } else { 792 ctlr->r_irq_rid = ATA_IRQ_RID; 793 } 794 if (!(ctlr->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 795 &ctlr->r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 796 device_printf(dev, "unable to map interrupt\n"); 797 return ENXIO; 798 } 799 if ((bus_setup_intr(dev, ctlr->r_irq, ATA_INTR_FLAGS, NULL, 800 intr_func, ctlr, &ctlr->handle))) { 801 /* SOS XXX release r_irq */ 802 device_printf(dev, "unable to setup interrupt\n"); 803 return ENXIO; 804 } 805 } 806 return 0; 807 } 808 809 void 810 ata_set_desc(device_t dev) 811 { 812 struct ata_pci_controller *ctlr = device_get_softc(dev); 813 char buffer[128]; 814 815 sprintf(buffer, "%s %s %s controller", 816 ata_pcivendor2str(dev), ctlr->chip->text, 817 ata_mode2str(ctlr->chip->max_dma)); 818 device_set_desc_copy(dev, buffer); 819 } 820 821 struct ata_chip_id * 822 ata_match_chip(device_t dev, struct ata_chip_id *index) 823 { 824 uint32_t devid; 825 uint8_t revid; 826 827 devid = pci_get_devid(dev); 828 revid = pci_get_revid(dev); 829 while (index->chipid != 0) { 830 if (devid == index->chipid && revid >= index->chiprev) 831 return (index); 832 index++; 833 } 834 return (NULL); 835 } 836 837 struct ata_chip_id * 838 ata_find_chip(device_t dev, struct ata_chip_id *index, int slot) 839 { 840 struct ata_chip_id *idx; 841 device_t *children; 842 int nchildren, i; 843 uint8_t s; 844 845 if (device_get_children(device_get_parent(dev), &children, &nchildren)) 846 return (NULL); 847 848 for (i = 0; i < nchildren; i++) { 849 s = pci_get_slot(children[i]); 850 if ((slot >= 0 && s == slot) || (slot < 0 && s <= -slot)) { 851 idx = ata_match_chip(children[i], index); 852 if (idx != NULL) { 853 free(children, M_TEMP); 854 return (idx); 855 } 856 } 857 } 858 free(children, M_TEMP); 859 return (NULL); 860 } 861 862 void 863 ata_print_cable(device_t dev, u_int8_t *who) 864 { 865 device_printf(dev, 866 "DMA limited to UDMA33, %s found non-ATA66 cable\n", who); 867 } 868 869 int 870 ata_check_80pin(device_t dev, int mode) 871 { 872 struct ata_device *atadev = device_get_softc(dev); 873 874 if (!ata_dma_check_80pin) { 875 if (bootverbose) 876 device_printf(dev, "Skipping 80pin cable check\n"); 877 return mode; 878 } 879 880 if (mode > ATA_UDMA2 && !(atadev->param.hwres & ATA_CABLE_ID)) { 881 ata_print_cable(dev, "device"); 882 mode = ATA_UDMA2; 883 } 884 return mode; 885 } 886 887 char * 888 ata_pcivendor2str(device_t dev) 889 { 890 switch (pci_get_vendor(dev)) { 891 case ATA_ACARD_ID: return "Acard"; 892 case ATA_ACER_LABS_ID: return "AcerLabs"; 893 case ATA_AMD_ID: return "AMD"; 894 case ATA_ADAPTEC_ID: return "Adaptec"; 895 case ATA_ATI_ID: return "ATI"; 896 case ATA_CYRIX_ID: return "Cyrix"; 897 case ATA_CYPRESS_ID: return "Cypress"; 898 case ATA_HIGHPOINT_ID: return "HighPoint"; 899 case ATA_INTEL_ID: return "Intel"; 900 case ATA_ITE_ID: return "ITE"; 901 case ATA_JMICRON_ID: return "JMicron"; 902 case ATA_MARVELL_ID: return "Marvell"; 903 case ATA_NATIONAL_ID: return "National"; 904 case ATA_NETCELL_ID: return "Netcell"; 905 case ATA_NVIDIA_ID: return "nVidia"; 906 case ATA_PROMISE_ID: return "Promise"; 907 case ATA_SERVERWORKS_ID: return "ServerWorks"; 908 case ATA_SILICON_IMAGE_ID: return "SiI"; 909 case ATA_SIS_ID: return "SiS"; 910 case ATA_VIA_ID: return "VIA"; 911 case ATA_CENATEK_ID: return "Cenatek"; 912 case ATA_MICRON_ID: return "Micron"; 913 default: return "Generic"; 914 } 915 } 916 917 int 918 ata_mode2idx(int mode) 919 { 920 if ((mode & ATA_DMA_MASK) == ATA_UDMA0) 921 return (mode & ATA_MODE_MASK) + 8; 922 if ((mode & ATA_DMA_MASK) == ATA_WDMA0) 923 return (mode & ATA_MODE_MASK) + 5; 924 return (mode & ATA_MODE_MASK) - ATA_PIO0; 925 } 926 927