1 /*- 2 * Copyright (c) 1998,1999,2000,2001 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/disk.h> 35 #include <sys/module.h> 36 #include <sys/bus.h> 37 #include <sys/bio.h> 38 #include <sys/malloc.h> 39 #include <sys/devicestat.h> 40 #include <sys/sysctl.h> 41 #include <machine/stdarg.h> 42 #include <machine/resource.h> 43 #include <machine/bus.h> 44 #ifdef __alpha__ 45 #include <machine/md_var.h> 46 #endif 47 #include <sys/rman.h> 48 #include <pci/pcivar.h> 49 #include <pci/pcireg.h> 50 #include <dev/ata/ata-all.h> 51 52 /* device structures */ 53 struct ata_pci_softc { 54 struct resource *bmio; 55 int bmaddr; 56 struct resource *irq; 57 int irqcnt; 58 }; 59 60 /* prototypes */ 61 void ata_via686b(device_t); 62 63 /* misc defines */ 64 #define IOMASK 0xfffffffc 65 #define ATA_MASTERDEV(dev) ((pci_get_progif(dev) & 0x80) && \ 66 (pci_get_progif(dev) & 0x05) != 0x05) 67 68 int 69 ata_find_dev(device_t dev, u_int32_t devid, u_int32_t revid) 70 { 71 device_t *children, child; 72 int nchildren, i; 73 74 if (device_get_children(device_get_parent(dev), &children, &nchildren)) 75 return 0; 76 77 for (i = 0; i < nchildren; i++) { 78 child = children[i]; 79 80 /* check that it's on the same silicon and the device we want */ 81 if (pci_get_slot(dev) == pci_get_slot(child) && 82 pci_get_devid(child) == devid && pci_get_revid(child) >= revid) { 83 free(children, M_TEMP); 84 return 1; 85 } 86 } 87 free(children, M_TEMP); 88 return 0; 89 } 90 91 void 92 ata_via686b(device_t dev) 93 { 94 device_t *children, child; 95 int nchildren, i; 96 97 if (device_get_children(device_get_parent(dev), &children, &nchildren)) 98 return; 99 100 for (i = 0; i < nchildren; i++) { 101 child = children[i]; 102 103 if (pci_get_devid(child) == 0x03051106 || /* VIA KT133 */ 104 pci_get_devid(child) == 0x03911106) { /* VIA KX133 */ 105 pci_write_config(child, 0x75, 0x83, 1); 106 pci_write_config(child, 0x76, 107 (pci_read_config(child, 0x76, 1) & 0xdf) | 0xd0,1); 108 device_printf(dev, "VIA '686b southbridge fix applied\n"); 109 break; 110 } 111 } 112 free(children, M_TEMP); 113 } 114 115 static const char * 116 ata_pci_match(device_t dev) 117 { 118 if (pci_get_class(dev) != PCIC_STORAGE) 119 return NULL; 120 121 switch (pci_get_devid(dev)) { 122 /* supported chipsets */ 123 case 0x12308086: 124 return "Intel PIIX ATA controller"; 125 126 case 0x70108086: 127 return "Intel PIIX3 ATA controller"; 128 129 case 0x71118086: 130 case 0x71998086: 131 case 0x84ca8086: 132 return "Intel PIIX4 ATA33 controller"; 133 134 case 0x24218086: 135 return "Intel ICH0 ATA33 controller"; 136 137 case 0x24118086: 138 case 0x76018086: 139 return "Intel ICH ATA66 controller"; 140 141 case 0x244a8086: 142 case 0x244b8086: 143 return "Intel ICH2 ATA100 controller"; 144 145 case 0x248a8086: 146 case 0x248b8086: 147 return "Intel ICH3 ATA100 controller"; 148 149 case 0x522910b9: 150 if (pci_get_revid(dev) < 0x20) 151 return "AcerLabs Aladdin ATA controller"; 152 else 153 return "AcerLabs Aladdin ATA33 controller"; 154 155 case 0x05711106: 156 if (ata_find_dev(dev, 0x05861106, 0x02)) 157 return "VIA 82C586 ATA33 controller"; 158 if (ata_find_dev(dev, 0x05861106, 0)) 159 return "VIA 82C586 ATA controller"; 160 if (ata_find_dev(dev, 0x05961106, 0x12)) 161 return "VIA 82C596 ATA66 controller"; 162 if (ata_find_dev(dev, 0x05961106, 0)) 163 return "VIA 82C596 ATA33 controller"; 164 if (ata_find_dev(dev, 0x06861106, 0x40) || 165 ata_find_dev(dev, 0x30741106, 0)) 166 return "VIA 82C686 ATA100 controller"; 167 if (ata_find_dev(dev, 0x06861106, 0)) 168 return "VIA 82C686 ATA66 controller"; 169 return "VIA Apollo ATA controller"; 170 171 case 0x55131039: 172 return "SiS 5591 ATA33 controller"; 173 174 case 0x06491095: 175 return "CMD 649 ATA100 controller"; 176 177 case 0x06481095: 178 return "CMD 648 ATA66 controller"; 179 180 case 0x06461095: 181 return "CMD 646 ATA controller"; 182 183 case 0xc6931080: 184 if (pci_get_subclass(dev) == PCIS_STORAGE_IDE) 185 return "Cypress 82C693 ATA controller"; 186 break; 187 188 case 0x01021078: 189 return "Cyrix 5530 ATA33 controller"; 190 191 case 0x74091022: 192 return "AMD 756 ATA66 controller"; 193 194 case 0x74111022: 195 return "AMD 766 ATA100 controller"; 196 197 case 0x02111166: 198 return "ServerWorks ROSB4 ATA33 controller"; 199 200 case 0x4d33105a: 201 return "Promise ATA33 controller"; 202 203 case 0x4d38105a: 204 return "Promise ATA66 controller"; 205 206 case 0x0d30105a: 207 case 0x4d30105a: 208 return "Promise ATA100 controller"; 209 210 case 0x4d68105a: 211 case 0x6268105a: 212 return "Promise TX2 ATA100 controller"; 213 214 case 0x4d69105a: 215 return "Promise ATA133 controller"; 216 217 case 0x00041103: 218 switch (pci_get_revid(dev)) { 219 case 0x00: 220 case 0x01: 221 return "HighPoint HPT366 ATA66 controller"; 222 case 0x02: 223 return "HighPoint HPT368 ATA66 controller"; 224 case 0x03: 225 case 0x04: 226 return "HighPoint HPT370 ATA100 controller"; 227 case 0x05: 228 return "HighPoint HPT372 ATA133 controller"; 229 default: 230 return "Unknown revision HighPoint ATA controller"; 231 } 232 233 /* unsupported but known chipsets, generic DMA only */ 234 case 0x10001042: 235 case 0x10011042: 236 return "RZ 100? ATA controller !WARNING! buggy chip data loss possible"; 237 238 case 0x06401095: 239 return "CMD 640 ATA controller !WARNING! buggy chip data loss possible"; 240 241 /* unknown chipsets, try generic DMA if it seems possible */ 242 default: 243 if (pci_get_class(dev) == PCIC_STORAGE && 244 (pci_get_subclass(dev) == PCIS_STORAGE_IDE)) 245 return "Generic PCI ATA controller"; 246 } 247 return NULL; 248 } 249 250 static int 251 ata_pci_probe(device_t dev) 252 { 253 const char *desc = ata_pci_match(dev); 254 255 if (desc) { 256 device_set_desc(dev, desc); 257 return 0; 258 } 259 else 260 return ENXIO; 261 } 262 263 static int 264 ata_pci_add_child(device_t dev, int unit) 265 { 266 device_t child; 267 268 /* check if this is located at one of the std addresses */ 269 if (ATA_MASTERDEV(dev)) { 270 if (!(child = device_add_child(dev, "ata", unit))) 271 return ENOMEM; 272 } 273 else { 274 if (!(child = device_add_child(dev, "ata", 275 devclass_find_free_unit(devclass_find("ata"), 2)))) 276 return ENOMEM; 277 } 278 return 0; 279 } 280 281 static int 282 ata_pci_attach(device_t dev) 283 { 284 struct ata_pci_softc *sc = device_get_softc(dev); 285 u_int8_t class, subclass; 286 u_int32_t type, cmd; 287 int rid; 288 289 /* set up vendor-specific stuff */ 290 type = pci_get_devid(dev); 291 class = pci_get_class(dev); 292 subclass = pci_get_subclass(dev); 293 cmd = pci_read_config(dev, PCIR_COMMAND, 4); 294 295 if (!(cmd & PCIM_CMD_PORTEN)) { 296 device_printf(dev, "ATA channel disabled by BIOS\n"); 297 return 0; 298 } 299 300 /* is busmastering supported ? */ 301 if ((cmd & (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) == 302 (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) { 303 304 /* is there a valid port range to connect to ? */ 305 rid = 0x20; 306 sc->bmio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 307 0, ~0, 1, RF_ACTIVE); 308 if (!sc->bmio) 309 device_printf(dev, "Busmastering DMA not configured\n"); 310 } 311 else 312 device_printf(dev, "Busmastering DMA not supported\n"); 313 314 /* do extra chipset specific setups */ 315 switch (type) { 316 case 0x522910b9: /* Aladdin need to activate the ATAPI FIFO */ 317 pci_write_config(dev, 0x53, 318 (pci_read_config(dev, 0x53, 1) & ~0x01) | 0x02, 1); 319 break; 320 321 case 0x4d38105a: /* Promise 66 & 100 (before TX2) need the clock changed */ 322 case 0x4d30105a: 323 case 0x0d30105a: 324 ATA_OUTB(sc->bmio, 0x11, ATA_INB(sc->bmio, 0x11) | 0x0a); 325 /* FALLTHROUGH */ 326 327 case 0x4d33105a: /* Promise (before TX2) need burst mode turned on */ 328 ATA_OUTB(sc->bmio, 0x1f, ATA_INB(sc->bmio, 0x1f) | 0x01); 329 break; 330 331 case 0x00041103: /* HighPoint */ 332 switch (pci_get_revid(dev)) { 333 case 0x00: /* HPT 366 */ 334 case 0x01: 335 /* turn off interrupt prediction */ 336 pci_write_config(dev, 0x51, 337 (pci_read_config(dev, 0x51, 1) & ~0x80), 1); 338 break; 339 340 case 0x02: /* HPT 368 */ 341 case 0x03: /* HPT 370 */ 342 case 0x04: 343 case 0x05: /* HPT 372 */ 344 /* turn off interrupt prediction */ 345 pci_write_config(dev, 0x51, 346 (pci_read_config(dev, 0x51, 1) & ~0x02), 1); 347 pci_write_config(dev, 0x55, 348 (pci_read_config(dev, 0x55, 1) & ~0x02), 1); 349 /* turn on interrupts */ 350 pci_write_config(dev, 0x5a, 351 (pci_read_config(dev, 0x5a, 1) & ~0x10), 1); 352 353 } 354 break; 355 356 case 0x05711106: /* VIA 82C586, '596, '686 default setup */ 357 /* prepare for ATA-66 on the 82C686a and rev 0x12 and newer 82C596's */ 358 if ((ata_find_dev(dev, 0x06861106, 0) && 359 !ata_find_dev(dev, 0x06861106, 0x40)) || 360 ata_find_dev(dev, 0x05961106, 0x12)) 361 pci_write_config(dev, 0x50, 0x030b030b, 4); 362 363 /* the '686b might need the data corruption fix */ 364 if (ata_find_dev(dev, 0x06861106, 0x40)) 365 ata_via686b(dev); 366 367 /* FALLTHROUGH */ 368 369 case 0x74091022: /* AMD 756 default setup */ 370 case 0x74111022: /* AMD 766 default setup */ 371 372 /* set prefetch, postwrite */ 373 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1); 374 375 /* set fifo configuration half'n'half */ 376 pci_write_config(dev, 0x43, 377 (pci_read_config(dev, 0x43, 1) & 0x90) | 0x2a, 1); 378 379 /* set status register read retry */ 380 pci_write_config(dev, 0x44, pci_read_config(dev, 0x44, 1) | 0x08, 1); 381 382 /* set DMA read & end-of-sector fifo flush */ 383 pci_write_config(dev, 0x46, 384 (pci_read_config(dev, 0x46, 1) & 0x0c) | 0xf0, 1); 385 386 /* set sector size */ 387 pci_write_config(dev, 0x60, DEV_BSIZE, 2); 388 pci_write_config(dev, 0x68, DEV_BSIZE, 2); 389 break; 390 391 case 0x10001042: /* RZ 100? known bad, no DMA */ 392 case 0x10011042: 393 case 0x06401095: /* CMD 640 known bad, no DMA */ 394 sc->bmio = NULL; 395 device_printf(dev, "Busmastering DMA disabled\n"); 396 } 397 398 if (sc->bmio) { 399 sc->bmaddr = rman_get_start(sc->bmio); 400 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 401 SYS_RES_IOPORT, rid, sc->bmio); 402 sc->bmio = NULL; 403 } 404 405 /* 406 * the Cypress chip is a mess, it contains two ATA functions, but 407 * both channels are visible on the first one. 408 * simply ignore the second function for now, as the right 409 * solution (ignoring the second channel on the first function) 410 * doesn't work with the crappy ATA interrupt setup on the alpha. 411 */ 412 if (pci_get_devid(dev) == 0xc6931080 && pci_get_function(dev) > 1) 413 return 0; 414 415 ata_pci_add_child(dev, 0); 416 417 if (ATA_MASTERDEV(dev) || pci_read_config(dev, 0x18, 4) & IOMASK) 418 ata_pci_add_child(dev, 1); 419 420 return bus_generic_attach(dev); 421 } 422 423 static int 424 ata_pci_intr(struct ata_softc *scp) 425 { 426 u_int8_t dmastat; 427 428 /* 429 * since we might share the IRQ with another device, and in some 430 * cases with our twin channel, we only want to process interrupts 431 * that we know this channel generated. 432 */ 433 switch (scp->chiptype) { 434 case 0x00041103: /* HighPoint HPT366/368/370/372 */ 435 if (((dmastat = ata_dmastatus(scp)) & 436 (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) != ATA_BMSTAT_INTERRUPT) 437 return 1; 438 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT); 439 DELAY(1); 440 return 0; 441 442 case 0x06481095: /* CMD 648 */ 443 case 0x06491095: /* CMD 649 */ 444 if (!(pci_read_config(device_get_parent(scp->dev), 0x71, 1) & 445 (scp->channel ? 0x08 : 0x04))) 446 return 1; 447 break; 448 449 case 0x4d33105a: /* Promise Ultra/Fasttrak 33 */ 450 case 0x4d38105a: /* Promise Ultra/Fasttrak 66 */ 451 case 0x4d30105a: /* Promise Ultra/Fasttrak 100 */ 452 case 0x0d30105a: /* Promise OEM ATA100 */ 453 if (!(ATA_INL(scp->r_bmio, (scp->channel ? 0x14 : 0x1c)) & 454 (scp->channel ? 0x00004000 : 0x00000400))) 455 return 1; 456 break; 457 458 case 0x4d68105a: /* Promise TX2 ATA100 */ 459 case 0x6268105a: /* Promise TX2v2 ATA100 */ 460 case 0x4d69105a: /* Promise ATA133 */ 461 ATA_OUTB(scp->r_bmio, ATA_BMDEVSPEC_0, 0x0b); 462 if (!(ATA_INB(scp->r_bmio, ATA_BMDEVSPEC_1) & 0x20)) 463 return 1; 464 break; 465 } 466 467 if (scp->flags & ATA_DMA_ACTIVE) { 468 if (!((dmastat = ata_dmastatus(scp)) & ATA_BMSTAT_INTERRUPT)) 469 return 1; 470 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT); 471 DELAY(1); 472 } 473 return 0; 474 } 475 476 static int 477 ata_pci_print_child(device_t dev, device_t child) 478 { 479 struct ata_softc *scp = device_get_softc(child); 480 int retval = 0; 481 482 retval += bus_print_child_header(dev, child); 483 retval += printf(": at 0x%lx", rman_get_start(scp->r_io)); 484 485 if (ATA_MASTERDEV(dev)) 486 retval += printf(" irq %d", 14 + scp->channel); 487 488 retval += bus_print_child_footer(dev, child); 489 490 return retval; 491 } 492 493 static struct resource * 494 ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid, 495 u_long start, u_long end, u_long count, u_int flags) 496 { 497 struct ata_pci_softc *sc = device_get_softc(dev); 498 struct resource *res = NULL; 499 int channel = ((struct ata_softc *)device_get_softc(child))->channel; 500 int myrid; 501 502 if (type == SYS_RES_IOPORT) { 503 switch (*rid) { 504 case ATA_IOADDR_RID: 505 if (ATA_MASTERDEV(dev)) { 506 myrid = 0; 507 start = (channel ? ATA_SECONDARY : ATA_PRIMARY); 508 end = start + ATA_IOSIZE - 1; 509 count = ATA_IOSIZE; 510 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 511 SYS_RES_IOPORT, &myrid, 512 start, end, count, flags); 513 } 514 else { 515 myrid = 0x10 + 8 * channel; 516 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 517 SYS_RES_IOPORT, &myrid, 518 start, end, count, flags); 519 } 520 break; 521 522 case ATA_ALTADDR_RID: 523 if (ATA_MASTERDEV(dev)) { 524 myrid = 0; 525 start = (channel ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET; 526 end = start + ATA_ALTIOSIZE - 1; 527 count = ATA_ALTIOSIZE; 528 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 529 SYS_RES_IOPORT, &myrid, 530 start, end, count, flags); 531 } 532 else { 533 myrid = 0x14 + 8 * channel; 534 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 535 SYS_RES_IOPORT, &myrid, 536 start, end, count, flags); 537 if (res) { 538 start = rman_get_start(res) + 2; 539 end = rman_get_start(res) + ATA_ALTIOSIZE - 1; 540 count = ATA_ALTIOSIZE; 541 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 542 SYS_RES_IOPORT, myrid, res); 543 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 544 SYS_RES_IOPORT, &myrid, 545 start, end, count, flags); 546 } 547 } 548 break; 549 550 case ATA_BMADDR_RID: 551 if (sc->bmaddr) { 552 myrid = 0x20; 553 start = (channel == 0 ? sc->bmaddr : sc->bmaddr + ATA_BMIOSIZE); 554 end = start + ATA_BMIOSIZE - 1; 555 count = ATA_BMIOSIZE; 556 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 557 SYS_RES_IOPORT, &myrid, 558 start, end, count, flags); 559 } 560 } 561 return res; 562 } 563 564 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) { 565 if (ATA_MASTERDEV(dev)) { 566 #ifdef __alpha__ 567 return alpha_platform_alloc_ide_intr(channel); 568 #else 569 int irq = (channel == 0 ? 14 : 15); 570 571 return BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 572 SYS_RES_IRQ, rid, irq, irq, 1, flags); 573 #endif 574 } 575 else { 576 /* primary and secondary channels share interrupt, keep track */ 577 if (!sc->irq) 578 sc->irq = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 579 SYS_RES_IRQ, rid, 0, ~0, 1, flags); 580 sc->irqcnt++; 581 return sc->irq; 582 } 583 } 584 return 0; 585 } 586 587 static int 588 ata_pci_release_resource(device_t dev, device_t child, int type, int rid, 589 struct resource *r) 590 { 591 struct ata_pci_softc *sc = device_get_softc(dev); 592 int channel = ((struct ata_softc *)device_get_softc(child))->channel; 593 594 if (type == SYS_RES_IOPORT) { 595 switch (rid) { 596 case ATA_IOADDR_RID: 597 if (ATA_MASTERDEV(dev)) 598 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 599 SYS_RES_IOPORT, 0x0, r); 600 else 601 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 602 SYS_RES_IOPORT, 0x10+8*channel, r); 603 break; 604 605 case ATA_ALTADDR_RID: 606 if (ATA_MASTERDEV(dev)) 607 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 608 SYS_RES_IOPORT, 0x0, r); 609 else 610 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 611 SYS_RES_IOPORT, 0x14+8*channel, r); 612 break; 613 614 case ATA_BMADDR_RID: 615 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 616 SYS_RES_IOPORT, 0x20, r); 617 default: 618 return ENOENT; 619 } 620 } 621 if (type == SYS_RES_IRQ) { 622 if (rid != ATA_IRQ_RID) 623 return ENOENT; 624 625 if (ATA_MASTERDEV(dev)) { 626 #ifdef __alpha__ 627 return alpha_platform_release_ide_intr(channel, r); 628 #else 629 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 630 SYS_RES_IRQ, rid, r); 631 #endif 632 } 633 else { 634 /* primary and secondary channels share interrupt, keep track */ 635 if (--sc->irqcnt) 636 return 0; 637 sc->irq = 0; 638 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 639 SYS_RES_IRQ, rid, r); 640 } 641 } 642 return EINVAL; 643 } 644 645 static int 646 ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq, 647 int flags, driver_intr_t *intr, void *arg, 648 void **cookiep) 649 { 650 if (ATA_MASTERDEV(dev)) { 651 #ifdef __alpha__ 652 return alpha_platform_setup_ide_intr(child, irq, intr, arg, cookiep); 653 #else 654 return BUS_SETUP_INTR(device_get_parent(dev), child, irq, 655 flags, intr, arg, cookiep); 656 #endif 657 } 658 else 659 return BUS_SETUP_INTR(device_get_parent(dev), dev, irq, 660 flags, intr, arg, cookiep); 661 } 662 663 static int 664 ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq, 665 void *cookie) 666 { 667 if (ATA_MASTERDEV(dev)) { 668 #ifdef __alpha__ 669 return alpha_platform_teardown_ide_intr(child, irq, cookie); 670 #else 671 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie); 672 #endif 673 } 674 else 675 return BUS_TEARDOWN_INTR(device_get_parent(dev), dev, irq, cookie); 676 } 677 678 static device_method_t ata_pci_methods[] = { 679 /* device interface */ 680 DEVMETHOD(device_probe, ata_pci_probe), 681 DEVMETHOD(device_attach, ata_pci_attach), 682 DEVMETHOD(device_shutdown, bus_generic_shutdown), 683 DEVMETHOD(device_suspend, bus_generic_suspend), 684 DEVMETHOD(device_resume, bus_generic_resume), 685 686 /* bus methods */ 687 DEVMETHOD(bus_print_child, ata_pci_print_child), 688 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource), 689 DEVMETHOD(bus_release_resource, ata_pci_release_resource), 690 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 691 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 692 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr), 693 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr), 694 { 0, 0 } 695 }; 696 697 static driver_t ata_pci_driver = { 698 "atapci", 699 ata_pci_methods, 700 sizeof(struct ata_pci_softc), 701 }; 702 703 static devclass_t ata_pci_devclass; 704 705 DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0); 706 707 static int 708 ata_pcisub_probe(device_t dev) 709 { 710 struct ata_softc *scp = device_get_softc(dev); 711 device_t *children; 712 int count, i; 713 714 /* find channel number on this controller */ 715 device_get_children(device_get_parent(dev), &children, &count); 716 for (i = 0; i < count; i++) { 717 if (children[i] == dev) 718 scp->channel = i; 719 } 720 free(children, M_TEMP); 721 scp->chiptype = pci_get_devid(device_get_parent(dev)); 722 scp->intr_func = ata_pci_intr; 723 return ata_probe(dev); 724 } 725 726 static device_method_t ata_pcisub_methods[] = { 727 /* device interface */ 728 DEVMETHOD(device_probe, ata_pcisub_probe), 729 DEVMETHOD(device_attach, ata_attach), 730 DEVMETHOD(device_detach, ata_detach), 731 DEVMETHOD(device_resume, ata_resume), 732 { 0, 0 } 733 }; 734 735 static driver_t ata_pcisub_driver = { 736 "ata", 737 ata_pcisub_methods, 738 sizeof(struct ata_softc), 739 }; 740 741 DRIVER_MODULE(ata, atapci, ata_pcisub_driver, ata_devclass, 0, 0); 742