1 /*- 2 * Copyright (c) 1998,1999,2000,2001 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/disk.h> 35 #include <sys/module.h> 36 #include <sys/bus.h> 37 #include <sys/bio.h> 38 #include <sys/malloc.h> 39 #include <sys/devicestat.h> 40 #include <sys/sysctl.h> 41 #include <machine/stdarg.h> 42 #include <machine/resource.h> 43 #include <machine/bus.h> 44 #ifdef __alpha__ 45 #include <machine/md_var.h> 46 #endif 47 #include <sys/rman.h> 48 #include <pci/pcivar.h> 49 #include <pci/pcireg.h> 50 #include <dev/ata/ata-all.h> 51 52 /* device structures */ 53 struct ata_pci_softc { 54 struct resource *bmio; 55 int bmaddr; 56 struct resource *irq; 57 int irqcnt; 58 }; 59 60 /* prototypes */ 61 void ata_via686b(device_t); 62 63 /* misc defines */ 64 #define IOMASK 0xfffffffc 65 #define ATA_MASTERDEV(dev) ((pci_get_progif(dev) & 0x80) && \ 66 (pci_get_progif(dev) & 0x05) != 0x05) 67 68 int 69 ata_find_dev(device_t dev, u_int32_t devid, u_int32_t revid) 70 { 71 device_t *children, child; 72 int nchildren, i; 73 74 if (device_get_children(device_get_parent(dev), &children, &nchildren)) 75 return 0; 76 77 for (i = 0; i < nchildren; i++) { 78 child = children[i]; 79 80 /* check that it's on the same silicon and the device we want */ 81 if (pci_get_slot(dev) == pci_get_slot(child) && 82 pci_get_devid(child) == devid && pci_get_revid(child) >= revid) { 83 free(children, M_TEMP); 84 return 1; 85 } 86 } 87 free(children, M_TEMP); 88 return 0; 89 } 90 91 void 92 ata_via686b(device_t dev) 93 { 94 device_t *children, child; 95 int nchildren, i; 96 97 if (device_get_children(device_get_parent(dev), &children, &nchildren)) 98 return; 99 100 for (i = 0; i < nchildren; i++) { 101 child = children[i]; 102 103 if (pci_get_devid(child) == 0x03051106 || /* VIA KT133 */ 104 pci_get_devid(child) == 0x03911106) { /* VIA KX133 */ 105 pci_write_config(child, 0x75, 0x83, 1); 106 pci_write_config(child, 0x76, 107 (pci_read_config(child, 0x76, 1) & 0xdf) | 0xd0,1); 108 device_printf(dev, "VIA '686b southbridge fix applied\n"); 109 break; 110 } 111 } 112 free(children, M_TEMP); 113 } 114 115 static const char * 116 ata_pci_match(device_t dev) 117 { 118 if (pci_get_class(dev) != PCIC_STORAGE) 119 return NULL; 120 121 switch (pci_get_devid(dev)) { 122 /* supported chipsets */ 123 case 0x12308086: 124 return "Intel PIIX ATA controller"; 125 126 case 0x70108086: 127 return "Intel PIIX3 ATA controller"; 128 129 case 0x71118086: 130 case 0x71998086: 131 case 0x84ca8086: 132 return "Intel PIIX4 ATA33 controller"; 133 134 case 0x24218086: 135 return "Intel ICH0 ATA33 controller"; 136 137 case 0x24118086: 138 case 0x76018086: 139 return "Intel ICH ATA66 controller"; 140 141 case 0x244a8086: 142 case 0x244b8086: 143 return "Intel ICH2 ATA100 controller"; 144 145 case 0x248a8086: 146 case 0x248b8086: 147 return "Intel ICH3 ATA100 controller"; 148 149 case 0x522910b9: 150 if (pci_get_revid(dev) < 0x20) 151 return "AcerLabs Aladdin ATA controller"; 152 else 153 return "AcerLabs Aladdin ATA33 controller"; 154 155 case 0x05711106: 156 if (ata_find_dev(dev, 0x05861106, 0x02)) 157 return "VIA 82C586 ATA33 controller"; 158 if (ata_find_dev(dev, 0x05861106, 0)) 159 return "VIA 82C586 ATA controller"; 160 if (ata_find_dev(dev, 0x05961106, 0x12)) 161 return "VIA 82C596 ATA66 controller"; 162 if (ata_find_dev(dev, 0x05961106, 0)) 163 return "VIA 82C596 ATA33 controller"; 164 if (ata_find_dev(dev, 0x06861106, 0x40) || 165 ata_find_dev(dev, 0x82311106, 0) || 166 ata_find_dev(dev, 0x30741106, 0)) 167 return "VIA 82C686 ATA100 controller"; 168 if (ata_find_dev(dev, 0x06861106, 0)) 169 return "VIA 82C686 ATA66 controller"; 170 return "VIA Apollo ATA controller"; 171 172 case 0x55131039: 173 return "SiS 5591 ATA33 controller"; 174 175 case 0x06491095: 176 return "CMD 649 ATA100 controller"; 177 178 case 0x06481095: 179 return "CMD 648 ATA66 controller"; 180 181 case 0x06461095: 182 return "CMD 646 ATA controller"; 183 184 case 0xc6931080: 185 if (pci_get_subclass(dev) == PCIS_STORAGE_IDE) 186 return "Cypress 82C693 ATA controller"; 187 break; 188 189 case 0x01021078: 190 return "Cyrix 5530 ATA33 controller"; 191 192 case 0x74091022: 193 return "AMD 756 ATA66 controller"; 194 195 case 0x74111022: 196 return "AMD 766 ATA100 controller"; 197 198 case 0x02111166: 199 return "ServerWorks ROSB4 ATA33 controller"; 200 201 case 0x4d33105a: 202 return "Promise ATA33 controller"; 203 204 case 0x4d38105a: 205 return "Promise ATA66 controller"; 206 207 case 0x0d30105a: 208 case 0x4d30105a: 209 return "Promise ATA100 controller"; 210 211 case 0x4d68105a: 212 case 0x6268105a: 213 return "Promise TX2 ATA100 controller"; 214 215 case 0x4d69105a: 216 return "Promise ATA133 controller"; 217 218 case 0x00041103: 219 switch (pci_get_revid(dev)) { 220 case 0x00: 221 case 0x01: 222 return "HighPoint HPT366 ATA66 controller"; 223 case 0x02: 224 return "HighPoint HPT368 ATA66 controller"; 225 case 0x03: 226 case 0x04: 227 return "HighPoint HPT370 ATA100 controller"; 228 case 0x05: 229 return "HighPoint HPT372 ATA133 controller"; 230 default: 231 return "Unknown revision HighPoint ATA controller"; 232 } 233 234 /* unsupported but known chipsets, generic DMA only */ 235 case 0x10001042: 236 case 0x10011042: 237 return "RZ 100? ATA controller !WARNING! buggy chip data loss possible"; 238 239 case 0x06401095: 240 return "CMD 640 ATA controller !WARNING! buggy chip data loss possible"; 241 242 /* unknown chipsets, try generic DMA if it seems possible */ 243 default: 244 if (pci_get_class(dev) == PCIC_STORAGE && 245 (pci_get_subclass(dev) == PCIS_STORAGE_IDE)) 246 return "Generic PCI ATA controller"; 247 } 248 return NULL; 249 } 250 251 static int 252 ata_pci_probe(device_t dev) 253 { 254 const char *desc = ata_pci_match(dev); 255 256 if (desc) { 257 device_set_desc(dev, desc); 258 return 0; 259 } 260 else 261 return ENXIO; 262 } 263 264 static int 265 ata_pci_add_child(device_t dev, int unit) 266 { 267 device_t child; 268 269 /* check if this is located at one of the std addresses */ 270 if (ATA_MASTERDEV(dev)) { 271 if (!(child = device_add_child(dev, "ata", unit))) 272 return ENOMEM; 273 } 274 else { 275 if (!(child = device_add_child(dev, "ata", 276 devclass_find_free_unit(devclass_find("ata"), 2)))) 277 return ENOMEM; 278 } 279 return 0; 280 } 281 282 static int 283 ata_pci_attach(device_t dev) 284 { 285 struct ata_pci_softc *sc = device_get_softc(dev); 286 u_int8_t class, subclass; 287 u_int32_t type, cmd; 288 int rid; 289 290 /* set up vendor-specific stuff */ 291 type = pci_get_devid(dev); 292 class = pci_get_class(dev); 293 subclass = pci_get_subclass(dev); 294 cmd = pci_read_config(dev, PCIR_COMMAND, 4); 295 296 if (!(cmd & PCIM_CMD_PORTEN)) { 297 device_printf(dev, "ATA channel disabled by BIOS\n"); 298 return 0; 299 } 300 301 /* is busmastering supported ? */ 302 if ((cmd & (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) == 303 (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) { 304 305 /* is there a valid port range to connect to ? */ 306 rid = 0x20; 307 sc->bmio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 308 0, ~0, 1, RF_ACTIVE); 309 if (!sc->bmio) 310 device_printf(dev, "Busmastering DMA not configured\n"); 311 } 312 else 313 device_printf(dev, "Busmastering DMA not supported\n"); 314 315 /* do extra chipset specific setups */ 316 switch (type) { 317 case 0x522910b9: /* Aladdin need to activate the ATAPI FIFO */ 318 pci_write_config(dev, 0x53, 319 (pci_read_config(dev, 0x53, 1) & ~0x01) | 0x02, 1); 320 break; 321 322 case 0x4d38105a: /* Promise 66 & 100 (before TX2) need the clock changed */ 323 case 0x4d30105a: 324 case 0x0d30105a: 325 ATA_OUTB(sc->bmio, 0x11, ATA_INB(sc->bmio, 0x11) | 0x0a); 326 /* FALLTHROUGH */ 327 328 case 0x4d33105a: /* Promise (before TX2) need burst mode turned on */ 329 ATA_OUTB(sc->bmio, 0x1f, ATA_INB(sc->bmio, 0x1f) | 0x01); 330 break; 331 332 case 0x00041103: /* HighPoint */ 333 switch (pci_get_revid(dev)) { 334 case 0x00: /* HPT 366 */ 335 case 0x01: 336 /* turn off interrupt prediction */ 337 pci_write_config(dev, 0x51, 338 (pci_read_config(dev, 0x51, 1) & ~0x80), 1); 339 break; 340 341 case 0x02: /* HPT 368 */ 342 case 0x03: /* HPT 370 */ 343 case 0x04: 344 case 0x05: /* HPT 372 */ 345 /* turn off interrupt prediction */ 346 pci_write_config(dev, 0x51, 347 (pci_read_config(dev, 0x51, 1) & ~0x02), 1); 348 pci_write_config(dev, 0x55, 349 (pci_read_config(dev, 0x55, 1) & ~0x02), 1); 350 /* turn on interrupts */ 351 pci_write_config(dev, 0x5a, 352 (pci_read_config(dev, 0x5a, 1) & ~0x10), 1); 353 354 } 355 break; 356 357 case 0x05711106: /* VIA 82C586, '596, '686 default setup */ 358 /* prepare for ATA-66 on the 82C686a and rev 0x12 and newer 82C596's */ 359 if ((ata_find_dev(dev, 0x06861106, 0) && 360 !ata_find_dev(dev, 0x06861106, 0x40)) || 361 ata_find_dev(dev, 0x05961106, 0x12)) 362 pci_write_config(dev, 0x50, 0x030b030b, 4); 363 364 /* the '686b might need the data corruption fix */ 365 if (ata_find_dev(dev, 0x06861106, 0x40)) 366 ata_via686b(dev); 367 368 /* FALLTHROUGH */ 369 370 case 0x74091022: /* AMD 756 default setup */ 371 case 0x74111022: /* AMD 766 default setup */ 372 373 /* set prefetch, postwrite */ 374 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1); 375 376 /* set fifo configuration half'n'half */ 377 pci_write_config(dev, 0x43, 378 (pci_read_config(dev, 0x43, 1) & 0x90) | 0x2a, 1); 379 380 /* set status register read retry */ 381 pci_write_config(dev, 0x44, pci_read_config(dev, 0x44, 1) | 0x08, 1); 382 383 /* set DMA read & end-of-sector fifo flush */ 384 pci_write_config(dev, 0x46, 385 (pci_read_config(dev, 0x46, 1) & 0x0c) | 0xf0, 1); 386 387 /* set sector size */ 388 pci_write_config(dev, 0x60, DEV_BSIZE, 2); 389 pci_write_config(dev, 0x68, DEV_BSIZE, 2); 390 break; 391 392 case 0x10001042: /* RZ 100? known bad, no DMA */ 393 case 0x10011042: 394 case 0x06401095: /* CMD 640 known bad, no DMA */ 395 sc->bmio = NULL; 396 device_printf(dev, "Busmastering DMA disabled\n"); 397 } 398 399 if (sc->bmio) { 400 sc->bmaddr = rman_get_start(sc->bmio); 401 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 402 SYS_RES_IOPORT, rid, sc->bmio); 403 sc->bmio = NULL; 404 } 405 406 /* 407 * the Cypress chip is a mess, it contains two ATA functions, but 408 * both channels are visible on the first one. 409 * simply ignore the second function for now, as the right 410 * solution (ignoring the second channel on the first function) 411 * doesn't work with the crappy ATA interrupt setup on the alpha. 412 */ 413 if (pci_get_devid(dev) == 0xc6931080 && pci_get_function(dev) > 1) 414 return 0; 415 416 ata_pci_add_child(dev, 0); 417 418 if (ATA_MASTERDEV(dev) || pci_read_config(dev, 0x18, 4) & IOMASK) 419 ata_pci_add_child(dev, 1); 420 421 return bus_generic_attach(dev); 422 } 423 424 static int 425 ata_pci_intr(struct ata_softc *scp) 426 { 427 u_int8_t dmastat; 428 429 /* 430 * since we might share the IRQ with another device, and in some 431 * cases with our twin channel, we only want to process interrupts 432 * that we know this channel generated. 433 */ 434 switch (scp->chiptype) { 435 case 0x00041103: /* HighPoint HPT366/368/370/372 */ 436 if (((dmastat = ata_dmastatus(scp)) & 437 (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) != ATA_BMSTAT_INTERRUPT) 438 return 1; 439 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT); 440 DELAY(1); 441 return 0; 442 443 case 0x06481095: /* CMD 648 */ 444 case 0x06491095: /* CMD 649 */ 445 if (!(pci_read_config(device_get_parent(scp->dev), 0x71, 1) & 446 (scp->channel ? 0x08 : 0x04))) 447 return 1; 448 break; 449 450 case 0x4d33105a: /* Promise Ultra/Fasttrak 33 */ 451 case 0x4d38105a: /* Promise Ultra/Fasttrak 66 */ 452 case 0x4d30105a: /* Promise Ultra/Fasttrak 100 */ 453 case 0x0d30105a: /* Promise OEM ATA100 */ 454 if (!(ATA_INL(scp->r_bmio, (scp->channel ? 0x14 : 0x1c)) & 455 (scp->channel ? 0x00004000 : 0x00000400))) 456 return 1; 457 break; 458 459 case 0x4d68105a: /* Promise TX2 ATA100 */ 460 case 0x6268105a: /* Promise TX2v2 ATA100 */ 461 case 0x4d69105a: /* Promise ATA133 */ 462 ATA_OUTB(scp->r_bmio, ATA_BMDEVSPEC_0, 0x0b); 463 if (!(ATA_INB(scp->r_bmio, ATA_BMDEVSPEC_1) & 0x20)) 464 return 1; 465 break; 466 } 467 468 if (scp->flags & ATA_DMA_ACTIVE) { 469 if (!((dmastat = ata_dmastatus(scp)) & ATA_BMSTAT_INTERRUPT)) 470 return 1; 471 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT); 472 DELAY(1); 473 } 474 return 0; 475 } 476 477 static int 478 ata_pci_print_child(device_t dev, device_t child) 479 { 480 struct ata_softc *scp = device_get_softc(child); 481 int retval = 0; 482 483 retval += bus_print_child_header(dev, child); 484 retval += printf(": at 0x%lx", rman_get_start(scp->r_io)); 485 486 if (ATA_MASTERDEV(dev)) 487 retval += printf(" irq %d", 14 + scp->channel); 488 489 retval += bus_print_child_footer(dev, child); 490 491 return retval; 492 } 493 494 static struct resource * 495 ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid, 496 u_long start, u_long end, u_long count, u_int flags) 497 { 498 struct ata_pci_softc *sc = device_get_softc(dev); 499 struct resource *res = NULL; 500 int channel = ((struct ata_softc *)device_get_softc(child))->channel; 501 int myrid; 502 503 if (type == SYS_RES_IOPORT) { 504 switch (*rid) { 505 case ATA_IOADDR_RID: 506 if (ATA_MASTERDEV(dev)) { 507 myrid = 0; 508 start = (channel ? ATA_SECONDARY : ATA_PRIMARY); 509 end = start + ATA_IOSIZE - 1; 510 count = ATA_IOSIZE; 511 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 512 SYS_RES_IOPORT, &myrid, 513 start, end, count, flags); 514 } 515 else { 516 myrid = 0x10 + 8 * channel; 517 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 518 SYS_RES_IOPORT, &myrid, 519 start, end, count, flags); 520 } 521 break; 522 523 case ATA_ALTADDR_RID: 524 if (ATA_MASTERDEV(dev)) { 525 myrid = 0; 526 start = (channel ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET; 527 end = start + ATA_ALTIOSIZE - 1; 528 count = ATA_ALTIOSIZE; 529 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 530 SYS_RES_IOPORT, &myrid, 531 start, end, count, flags); 532 } 533 else { 534 myrid = 0x14 + 8 * channel; 535 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 536 SYS_RES_IOPORT, &myrid, 537 start, end, count, flags); 538 if (res) { 539 start = rman_get_start(res) + 2; 540 end = rman_get_start(res) + ATA_ALTIOSIZE - 1; 541 count = ATA_ALTIOSIZE; 542 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 543 SYS_RES_IOPORT, myrid, res); 544 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 545 SYS_RES_IOPORT, &myrid, 546 start, end, count, flags); 547 } 548 } 549 break; 550 551 case ATA_BMADDR_RID: 552 if (sc->bmaddr) { 553 myrid = 0x20; 554 start = (channel == 0 ? sc->bmaddr : sc->bmaddr + ATA_BMIOSIZE); 555 end = start + ATA_BMIOSIZE - 1; 556 count = ATA_BMIOSIZE; 557 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 558 SYS_RES_IOPORT, &myrid, 559 start, end, count, flags); 560 } 561 } 562 return res; 563 } 564 565 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) { 566 if (ATA_MASTERDEV(dev)) { 567 #ifdef __alpha__ 568 return alpha_platform_alloc_ide_intr(channel); 569 #else 570 int irq = (channel == 0 ? 14 : 15); 571 572 return BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 573 SYS_RES_IRQ, rid, irq, irq, 1, flags); 574 #endif 575 } 576 else { 577 /* primary and secondary channels share interrupt, keep track */ 578 if (!sc->irq) 579 sc->irq = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 580 SYS_RES_IRQ, rid, 0, ~0, 1, flags); 581 sc->irqcnt++; 582 return sc->irq; 583 } 584 } 585 return 0; 586 } 587 588 static int 589 ata_pci_release_resource(device_t dev, device_t child, int type, int rid, 590 struct resource *r) 591 { 592 struct ata_pci_softc *sc = device_get_softc(dev); 593 int channel = ((struct ata_softc *)device_get_softc(child))->channel; 594 595 if (type == SYS_RES_IOPORT) { 596 switch (rid) { 597 case ATA_IOADDR_RID: 598 if (ATA_MASTERDEV(dev)) 599 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 600 SYS_RES_IOPORT, 0x0, r); 601 else 602 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 603 SYS_RES_IOPORT, 0x10+8*channel, r); 604 break; 605 606 case ATA_ALTADDR_RID: 607 if (ATA_MASTERDEV(dev)) 608 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 609 SYS_RES_IOPORT, 0x0, r); 610 else 611 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 612 SYS_RES_IOPORT, 0x14+8*channel, r); 613 break; 614 615 case ATA_BMADDR_RID: 616 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 617 SYS_RES_IOPORT, 0x20, r); 618 default: 619 return ENOENT; 620 } 621 } 622 if (type == SYS_RES_IRQ) { 623 if (rid != ATA_IRQ_RID) 624 return ENOENT; 625 626 if (ATA_MASTERDEV(dev)) { 627 #ifdef __alpha__ 628 return alpha_platform_release_ide_intr(channel, r); 629 #else 630 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 631 SYS_RES_IRQ, rid, r); 632 #endif 633 } 634 else { 635 /* primary and secondary channels share interrupt, keep track */ 636 if (--sc->irqcnt) 637 return 0; 638 sc->irq = 0; 639 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 640 SYS_RES_IRQ, rid, r); 641 } 642 } 643 return EINVAL; 644 } 645 646 static int 647 ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq, 648 int flags, driver_intr_t *intr, void *arg, 649 void **cookiep) 650 { 651 if (ATA_MASTERDEV(dev)) { 652 #ifdef __alpha__ 653 return alpha_platform_setup_ide_intr(child, irq, intr, arg, cookiep); 654 #else 655 return BUS_SETUP_INTR(device_get_parent(dev), child, irq, 656 flags, intr, arg, cookiep); 657 #endif 658 } 659 else 660 return BUS_SETUP_INTR(device_get_parent(dev), dev, irq, 661 flags, intr, arg, cookiep); 662 } 663 664 static int 665 ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq, 666 void *cookie) 667 { 668 if (ATA_MASTERDEV(dev)) { 669 #ifdef __alpha__ 670 return alpha_platform_teardown_ide_intr(child, irq, cookie); 671 #else 672 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie); 673 #endif 674 } 675 else 676 return BUS_TEARDOWN_INTR(device_get_parent(dev), dev, irq, cookie); 677 } 678 679 static device_method_t ata_pci_methods[] = { 680 /* device interface */ 681 DEVMETHOD(device_probe, ata_pci_probe), 682 DEVMETHOD(device_attach, ata_pci_attach), 683 DEVMETHOD(device_shutdown, bus_generic_shutdown), 684 DEVMETHOD(device_suspend, bus_generic_suspend), 685 DEVMETHOD(device_resume, bus_generic_resume), 686 687 /* bus methods */ 688 DEVMETHOD(bus_print_child, ata_pci_print_child), 689 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource), 690 DEVMETHOD(bus_release_resource, ata_pci_release_resource), 691 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 692 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 693 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr), 694 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr), 695 { 0, 0 } 696 }; 697 698 static driver_t ata_pci_driver = { 699 "atapci", 700 ata_pci_methods, 701 sizeof(struct ata_pci_softc), 702 }; 703 704 static devclass_t ata_pci_devclass; 705 706 DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0); 707 708 static int 709 ata_pcisub_probe(device_t dev) 710 { 711 struct ata_softc *scp = device_get_softc(dev); 712 device_t *children; 713 int count, i; 714 715 /* find channel number on this controller */ 716 device_get_children(device_get_parent(dev), &children, &count); 717 for (i = 0; i < count; i++) { 718 if (children[i] == dev) 719 scp->channel = i; 720 } 721 free(children, M_TEMP); 722 scp->chiptype = pci_get_devid(device_get_parent(dev)); 723 scp->intr_func = ata_pci_intr; 724 return ata_probe(dev); 725 } 726 727 static device_method_t ata_pcisub_methods[] = { 728 /* device interface */ 729 DEVMETHOD(device_probe, ata_pcisub_probe), 730 DEVMETHOD(device_attach, ata_attach), 731 DEVMETHOD(device_detach, ata_detach), 732 DEVMETHOD(device_resume, ata_resume), 733 { 0, 0 } 734 }; 735 736 static driver_t ata_pcisub_driver = { 737 "ata", 738 ata_pcisub_methods, 739 sizeof(struct ata_softc), 740 }; 741 742 DRIVER_MODULE(ata, atapci, ata_pcisub_driver, ata_devclass, 0, 0); 743