1 /*- 2 * Copyright (c) 1998 - 2003 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/ata.h> 34 #include <sys/kernel.h> 35 #include <sys/endian.h> 36 #include <sys/malloc.h> 37 #include <sys/bus.h> 38 #include <pci/pcivar.h> 39 #include <machine/bus.h> 40 #include <sys/rman.h> 41 #include <dev/ata/ata-all.h> 42 #include <dev/ata/ata-pci.h> 43 44 /* prototypes */ 45 static void ata_dmasetupc_cb(void *, bus_dma_segment_t *, int, int); 46 static int ata_dmaalloc(struct ata_device *); 47 static void ata_dmafree(struct ata_device *); 48 static void ata_dmacreate(struct ata_channel *); 49 static void ata_dmadestroy(struct ata_channel *); 50 static void ata_dmasetupd_cb(void *, bus_dma_segment_t *, int, int); 51 static int ata_dmasetup(struct ata_device *, caddr_t, int32_t); 52 /* 53 static int ata_dmastart(struct ata_device *, caddr_t, int32_t, int); 54 static int ata_dmastop(struct ata_device *); 55 */ 56 static int ata_dmastatus(struct ata_channel *); 57 58 /* local vars */ 59 static MALLOC_DEFINE(M_ATADMA, "ATA DMA", "ATA driver DMA"); 60 61 /* misc defines */ 62 #define MAXSEGSZ PAGE_SIZE 63 #define MAXTABSZ PAGE_SIZE 64 #define MAXCTLDMASZ (2 * (MAXTABSZ + MAXPHYS)) 65 66 struct ata_dc_cb_args { 67 bus_addr_t maddr; 68 int error; 69 }; 70 71 int 72 ata_dmainit(struct ata_channel *ch) 73 { 74 if (!(ch->dma = 75 malloc(sizeof(struct ata_dma_funcs), M_ATADMA, M_NOWAIT | M_ZERO))) 76 return ENOMEM; 77 ch->dma->create = ata_dmacreate; 78 ch->dma->destroy = ata_dmadestroy; 79 ch->dma->alloc = ata_dmaalloc; 80 ch->dma->free = ata_dmafree; 81 ch->dma->setup = ata_dmasetup; 82 ch->dma->start = ata_dmastart; 83 ch->dma->stop = ata_dmastop; 84 ch->dma->status = ata_dmastatus; 85 ch->dma->alignment = 2; 86 return 0; 87 } 88 89 90 static void 91 ata_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 92 { 93 struct ata_dc_cb_args *cba = (struct ata_dc_cb_args *)xsc; 94 95 if (!(cba->error = error)) 96 cba->maddr = segs[0].ds_addr; 97 } 98 99 static int 100 ata_dmaalloc(struct ata_device *atadev) 101 { 102 struct ata_channel *ch; 103 struct ata_dc_cb_args ccba; 104 struct ata_dmastate *ds; 105 int error; 106 107 ch = atadev->channel; 108 ds = &atadev->dmastate; 109 if (!ds->cdmatag) { 110 if ((error = bus_dma_tag_create(ch->dmatag, 1, PAGE_SIZE, 111 BUS_SPACE_MAXADDR_32BIT, 112 BUS_SPACE_MAXADDR, NULL, NULL, 113 MAXTABSZ, 1, MAXTABSZ, 114 BUS_DMA_ALLOCNOW, &ds->cdmatag))) 115 return error; 116 } 117 if (!ds->ddmatag) { 118 if ((error = bus_dma_tag_create(ch->dmatag, ch->dma->alignment, 0, 119 BUS_SPACE_MAXADDR_32BIT, 120 BUS_SPACE_MAXADDR, NULL, NULL, 121 MAXPHYS, ATA_DMA_ENTRIES, MAXSEGSZ, 122 BUS_DMA_ALLOCNOW, &ds->ddmatag))) 123 return error; 124 } 125 if (!ds->mdmatab) { 126 if ((error = bus_dmamem_alloc(ds->cdmatag, (void **)&ds->dmatab, 0, 127 &ds->cdmamap))) 128 return error; 129 130 if ((error = bus_dmamap_load(ds->cdmatag, ds->cdmamap, ds->dmatab, 131 MAXTABSZ, ata_dmasetupc_cb, &ccba, 132 0)) != 0 || ccba.error != 0) { 133 bus_dmamem_free(ds->cdmatag, ds->dmatab, ds->cdmamap); 134 return error; 135 } 136 ds->mdmatab = ccba.maddr; 137 } 138 if (!ds->ddmamap) { 139 if ((error = bus_dmamap_create(ds->ddmatag, 0, &ds->ddmamap)) != 0) 140 return error; 141 } 142 return 0; 143 } 144 145 static void 146 ata_dmafree(struct ata_device *atadev) 147 { 148 struct ata_dmastate *ds; 149 150 ds = &atadev->dmastate; 151 if (ds->mdmatab) { 152 bus_dmamap_unload(ds->cdmatag, ds->cdmamap); 153 bus_dmamem_free(ds->cdmatag, ds->dmatab, ds->cdmamap); 154 ds->mdmatab = 0; 155 ds->cdmamap = NULL; 156 ds->dmatab = NULL; 157 } 158 if (ds->ddmamap) { 159 bus_dmamap_destroy(ds->ddmatag, ds->ddmamap); 160 ds->ddmamap = NULL; 161 } 162 if (ds->cdmatag) { 163 bus_dma_tag_destroy(ds->cdmatag); 164 ds->cdmatag = NULL; 165 } 166 if (ds->ddmatag) { 167 bus_dma_tag_destroy(ds->ddmatag); 168 ds->ddmatag = NULL; 169 } 170 } 171 172 static void 173 ata_dmacreate(struct ata_channel *ch) 174 { 175 176 if (!ch->dmatag) { 177 if (bus_dma_tag_create(NULL, 1, 0, 178 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, 179 NULL, NULL, MAXCTLDMASZ, ATA_DMA_ENTRIES, 180 BUS_SPACE_MAXSIZE_32BIT, 0, &ch->dmatag)) { 181 printf("DMA tag allocation failed, disabling DMA\n"); 182 } 183 } 184 } 185 186 static void 187 ata_dmadestroy(struct ata_channel *ch) 188 { 189 190 if (ch->dmatag) { 191 bus_dma_tag_destroy(ch->dmatag); 192 ch->dmatag = NULL; 193 } 194 } 195 196 struct ata_dmasetup_data_cb_args { 197 struct ata_dmaentry *dmatab; 198 int error; 199 }; 200 201 static void 202 ata_dmasetupd_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 203 { 204 struct ata_dmasetup_data_cb_args *cba = 205 (struct ata_dmasetup_data_cb_args *)xsc; 206 bus_size_t cnt; 207 u_int32_t lastcount; 208 int i, j; 209 210 cba->error = error; 211 if (error != 0) 212 return; 213 lastcount = j = 0; 214 for (i = 0; i < nsegs; i++) { 215 /* 216 * A maximum segment size was specified for bus_dma_tag_create, but 217 * some busdma code does not seem to honor this, so fix up if needed. 218 */ 219 for (cnt = 0; cnt < segs[i].ds_len; cnt += MAXSEGSZ, j++) { 220 cba->dmatab[j].base = htole32(segs[i].ds_addr + cnt); 221 lastcount = ulmin(segs[i].ds_len - cnt, MAXSEGSZ) & 0xffff; 222 cba->dmatab[j].count = htole32(lastcount); 223 } 224 } 225 cba->dmatab[j - 1].count = htole32(lastcount | ATA_DMA_EOT); 226 } 227 228 static int 229 ata_dmasetup(struct ata_device *atadev, caddr_t data, int32_t count) 230 { 231 struct ata_channel *ch = atadev->channel; 232 233 if (((uintptr_t)data & (ch->dma->alignment - 1)) || 234 (count & (ch->dma->alignment - 1))) { 235 ata_prtdev(atadev, "non aligned DMA transfer attempted\n"); 236 return -1; 237 } 238 239 if (!count) { 240 ata_prtdev(atadev, "zero length DMA transfer attempted\n"); 241 return -1; 242 } 243 return 0; 244 } 245 246 int 247 ata_dmastart(struct ata_device *atadev, caddr_t data, int32_t count, int dir) 248 { 249 struct ata_channel *ch = atadev->channel; 250 struct ata_dmastate *ds = &atadev->dmastate; 251 struct ata_dmasetup_data_cb_args cba; 252 253 if (ds->flags & ATA_DS_ACTIVE) 254 panic("ata_dmasetup: transfer active on this device!"); 255 256 cba.dmatab = ds->dmatab; 257 bus_dmamap_sync(ds->cdmatag, ds->cdmamap, BUS_DMASYNC_PREWRITE); 258 if (bus_dmamap_load(ds->ddmatag, ds->ddmamap, data, count, 259 ata_dmasetupd_cb, &cba, 0) || cba.error) 260 return -1; 261 262 bus_dmamap_sync(ds->cdmatag, ds->cdmamap, BUS_DMASYNC_POSTWRITE); 263 bus_dmamap_sync(ds->ddmatag, ds->ddmamap, dir ? BUS_DMASYNC_PREREAD : 264 BUS_DMASYNC_PREWRITE); 265 266 ch->flags |= ATA_DMA_ACTIVE; 267 ds->flags = dir ? (ATA_DS_ACTIVE | ATA_DS_READ) : ATA_DS_ACTIVE; 268 269 ATA_OUTL(ch->r_bmio, ATA_BMDTP_PORT, ds->mdmatab); 270 ATA_OUTB(ch->r_bmio, ATA_BMCMD_PORT, dir ? ATA_BMCMD_WRITE_READ : 0); 271 ATA_OUTB(ch->r_bmio, ATA_BMSTAT_PORT, 272 (ATA_INB(ch->r_bmio, ATA_BMSTAT_PORT) | 273 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR))); 274 ATA_OUTB(ch->r_bmio, ATA_BMCMD_PORT, 275 ATA_INB(ch->r_bmio, ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP); 276 return 0; 277 } 278 279 int 280 ata_dmastop(struct ata_device *atadev) 281 { 282 struct ata_channel *ch = atadev->channel; 283 struct ata_dmastate *ds = &atadev->dmastate; 284 int error; 285 286 error = ATA_INB(ch->r_bmio, ATA_BMSTAT_PORT); 287 ATA_OUTB(ch->r_bmio, ATA_BMCMD_PORT, 288 ATA_INB(ch->r_bmio, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 289 ATA_OUTB(ch->r_bmio, ATA_BMSTAT_PORT,ATA_BMSTAT_INTERRUPT|ATA_BMSTAT_ERROR); 290 291 bus_dmamap_sync(ds->ddmatag, ds->ddmamap, (ds->flags & ATA_DS_READ) != 0 ? 292 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 293 bus_dmamap_unload(ds->ddmatag, ds->ddmamap); 294 295 ch->flags &= ~ATA_DMA_ACTIVE; 296 ds->flags = 0; 297 return (error & ATA_BMSTAT_MASK); 298 } 299 300 static int 301 ata_dmastatus(struct ata_channel *ch) 302 { 303 return ATA_INB(ch->r_bmio, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 304 } 305