1 /*- 2 * Copyright (c) 1998,1999 S�ren Schmidt 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #include "pci.h" 32 #include "apm.h" 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/buf.h> 36 #include <sys/malloc.h> 37 #include <sys/bus.h> 38 #include <vm/vm.h> 39 #include <vm/pmap.h> 40 #if NPCI > 0 41 #include <pci/pcivar.h> 42 #endif 43 #if NAPM > 0 44 #include <machine/apm_bios.h> 45 #endif 46 #include <dev/ata/ata-all.h> 47 48 /* prototypes */ 49 static void hpt366_timing(struct ata_softc *, int32_t, int32_t); 50 51 /* misc defines */ 52 #define MIN(a,b) ((a)>(b)?(b):(a)) 53 #ifdef __alpha__ 54 #undef vtophys 55 #define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va) 56 #endif 57 58 #if NPCI > 0 59 60 int32_t 61 ata_dmainit(struct ata_softc *scp, int32_t device, 62 int32_t apiomode, int32_t wdmamode, int32_t udmamode) 63 { 64 int32_t type, devno, error; 65 void *dmatab; 66 67 if (!scp->bmaddr) 68 return -1; 69 #ifdef ATA_DMADEBUG 70 printf("ata%d: dmainit: ioaddr=0x%x altioaddr=0x%x, bmaddr=0x%x\n", 71 scp->lun, scp->ioaddr, scp->altioaddr, scp->bmaddr); 72 #endif 73 74 /* if simplex controller, only allow DMA on primary channel */ 75 if (scp->unit == 1) { 76 outb(scp->bmaddr + ATA_BMSTAT_PORT, inb(scp->bmaddr + ATA_BMSTAT_PORT) & 77 (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE)); 78 if (inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX) { 79 printf("ata%d: simplex device, DMA on primary channel only\n", 80 scp->lun); 81 return -1; 82 } 83 } 84 85 if (!(dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT))) 86 return -1; 87 88 if (((uintptr_t)dmatab >> PAGE_SHIFT) ^ 89 (((uintptr_t)dmatab + PAGE_SIZE - 1) >> PAGE_SHIFT)) { 90 printf("ata_dmainit: dmatab crosses page boundary, no DMA\n"); 91 free(dmatab, M_DEVBUF); 92 return -1; 93 } 94 scp->dmatab[(device == ATA_MASTER) ? 0 : 1] = dmatab; 95 96 switch (type = pci_get_devid(scp->dev)) { 97 98 case 0x71118086: /* Intel PIIX4 */ 99 if (udmamode >= 2) { 100 int32_t mask48, new48; 101 102 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 103 ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR); 104 if (bootverbose) 105 printf("ata%d: %s: %s setting up UDMA2 mode on PIIX4 chip\n", 106 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 107 (error) ? "failed" : "success"); 108 if (error) 109 break; 110 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 111 mask48 = (1 << devno) + (3 << (16 + (devno << 2))); 112 new48 = (1 << devno) + (2 << (16 + (devno << 2))); 113 pci_write_config(scp->dev, 0x48, 114 (pci_read_config(scp->dev, 0x48, 4) & 115 ~mask48) | new48, 4); 116 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 117 return 0; 118 } 119 /* FALLTHROUGH */ 120 121 case 0x70108086: /* Intel PIIX3 */ 122 if (wdmamode >= 2 && apiomode >= 4) { 123 int32_t mask40, new40, mask44, new44; 124 125 /* if SITRE not set doit for both channels */ 126 if (!((pci_read_config(scp->dev, 0x40, 4)>>(scp->unit<<8))&0x4000)){ 127 new40 = pci_read_config(scp->dev, 0x40, 4); 128 new44 = pci_read_config(scp->dev, 0x44, 4); 129 if (!(new40 & 0x00004000)) { 130 new44 &= ~0x0000000f; 131 new44 |= ((new40&0x00003000)>>10)|((new40&0x00000300)>>8); 132 } 133 if (!(new40 & 0x40000000)) { 134 new44 &= ~0x000000f0; 135 new44 |= ((new40&0x30000000)>>22)|((new40&0x03000000)>>20); 136 } 137 new40 |= 0x40004000; 138 pci_write_config(scp->dev, 0x40, new40, 4); 139 pci_write_config(scp->dev, 0x44, new44, 4); 140 } 141 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 142 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR); 143 if (bootverbose) 144 printf("ata%d: %s: %s setting up WDMA2 mode on PIIX4 chip\n", 145 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 146 (error) ? "failed" : "success"); 147 if (error) 148 break; 149 if (device == ATA_MASTER) { 150 mask40 = 0x0000330f; 151 new40 = 0x00002307; 152 mask44 = 0; 153 new44 = 0; 154 } else { 155 mask40 = 0x000000f0; 156 new40 = 0x00000070; 157 mask44 = 0x0000000f; 158 new44 = 0x0000000b; 159 } 160 if (scp->unit) { 161 mask40 <<= 16; 162 new40 <<= 16; 163 mask44 <<= 4; 164 new44 <<= 4; 165 } 166 pci_write_config(scp->dev, 0x40, 167 (pci_read_config(scp->dev, 0x40, 4) & ~mask40) | 168 new40, 4); 169 pci_write_config(scp->dev, 0x44, 170 (pci_read_config(scp->dev, 0x44, 4) & ~mask44) | 171 new44, 4); 172 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 173 return 0; 174 } 175 break; 176 177 case 0x12308086: /* Intel PIIX */ 178 /* probably not worth the trouble */ 179 break; 180 181 case 0x522910b9: /* AcerLabs Aladdin IV/V */ 182 /* the Aladdin has to be setup specially for ATAPI devices */ 183 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 184 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) { 185 int8_t word53 = pci_read_config(scp->dev, 0x53, 1); 186 187 /* set atapi fifo, this should always work */ 188 pci_write_config(scp->dev, 0x53, (word53 & ~0x01) | 0x02, 1); 189 190 /* if both master & slave are atapi devices dont allow DMA */ 191 if (scp->devices & ATA_ATAPI_MASTER && 192 scp->devices & ATA_ATAPI_SLAVE) { 193 printf("ata%d: Aladdin: two atapi devices on this channel, " 194 "DMA disabled\n", scp->lun); 195 break; 196 } 197 /* if needed set atapi fifo & dma */ 198 if ((udmamode >=2) || (wdmamode >= 2 && apiomode >= 4)) { 199 pci_write_config(scp->dev, 0x53, word53 | 0x03, 1); 200 scp->flags |= ATA_ATAPI_DMA_RO; 201 if (device == ATA_MASTER) 202 outb(scp->bmaddr + ATA_BMSTAT_PORT, 203 inb(scp->bmaddr + ATA_BMSTAT_PORT) | 204 ATA_BMSTAT_DMA_MASTER); 205 else 206 outb(scp->bmaddr + ATA_BMSTAT_PORT, 207 inb(scp->bmaddr + ATA_BMSTAT_PORT) | 208 ATA_BMSTAT_DMA_SLAVE); 209 } 210 } 211 if (udmamode >=2) { 212 int32_t word54 = pci_read_config(scp->dev, 0x54, 4); 213 214 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 215 ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR); 216 if (bootverbose) 217 printf("ata%d: %s: %s setting up UDMA2 mode on Aladdin chip\n", 218 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 219 (error) ? "failed" : "success"); 220 if (error) 221 break; 222 word54 |= 0x5555; 223 word54 |= (0x0a << (16 + (scp->unit << 3) + (device << 2))); 224 pci_write_config(scp->dev, 0x54, word54, 4); 225 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 226 return 0; 227 228 } 229 else if (wdmamode >= 2 && apiomode >= 4) { 230 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 231 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR); 232 if (bootverbose) 233 printf("ata%d: %s: %s setting up WDMA2 mode on Aladdin chip\n", 234 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 235 (error) ? "failed" : "success"); 236 if (error) 237 break; 238 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 239 return 0; 240 } 241 break; 242 243 case 0x4d33105a: /* Promise Ultra33 / FastTrak33 controllers */ 244 case 0x4d38105a: /* Promise Ultra66 / FastTrak66 controllers */ 245 /* the Promise can only do DMA on ATA disks not on ATAPI devices */ 246 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 247 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 248 break; 249 250 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 251 if (udmamode >=2) { 252 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 253 ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR); 254 if (bootverbose) 255 printf("ata%d: %s: %s setting up UDMA2 mode on Promise chip\n", 256 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 257 (error) ? "failed" : "success"); 258 if (error) 259 break; 260 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4); 261 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 262 return 0; 263 } 264 else if (wdmamode >= 2 && apiomode >= 4) { 265 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 266 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR); 267 if (bootverbose) 268 printf("ata%d: %s: %s setting up WDMA2 mode on Promise chip\n", 269 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 270 (error) ? "failed" : "success"); 271 if (error) 272 break; 273 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004367f3, 4); 274 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 275 return 0; 276 } 277 else { 278 if (bootverbose) 279 printf("ata%d: %s: setting PIO mode on Promise chip\n", 280 scp->lun, (device == ATA_MASTER) ? "master" : "slave"); 281 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004fe924, 4); 282 } 283 break; 284 285 case 0x00041103: /* HighPoint HPT366 IDE controller */ 286 /* punt on ATAPI devices for now */ 287 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 288 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 289 break; 290 291 devno = (device == ATA_MASTER) ? 0 : 1; 292 if (udmamode >=4 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) { 293 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 294 ATA_UDMA4, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR); 295 if (bootverbose) 296 printf("ata%d: %s: %s setting up UDMA4 mode on HPT366 chip\n", 297 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 298 (error) ? "failed" : "success"); 299 if (error) 300 break; 301 hpt366_timing(scp, device, ATA_MODE_UDMA4); 302 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 303 return 0; 304 } 305 else if (udmamode >=3) { 306 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 307 ATA_UDMA3, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR); 308 if (bootverbose) 309 printf("ata%d: %s: %s setting up UDMA3 mode on HPT366 chip\n", 310 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 311 (error) ? "failed" : "success"); 312 if (error) 313 break; 314 hpt366_timing(scp, device, ATA_MODE_UDMA3); 315 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA3; 316 return 0; 317 } 318 else if (udmamode >=2) { 319 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 320 ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR); 321 if (bootverbose) 322 printf("ata%d: %s: %s setting up UDMA2 mode on HPT366 chip\n", 323 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 324 (error) ? "failed" : "success"); 325 if (error) 326 break; 327 hpt366_timing(scp, device, ATA_MODE_UDMA2); 328 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 329 return 0; 330 } 331 else if (wdmamode >= 2 && apiomode >= 4) { 332 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 333 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR); 334 if (bootverbose) 335 printf("ata%d: %s: %s setting up WDMA2 mode on HPT366 chip\n", 336 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 337 (error) ? "failed" : "success"); 338 if (error) 339 break; 340 hpt366_timing(scp, device, ATA_MODE_WDMA2); 341 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 342 return 0; 343 } 344 else { 345 if (bootverbose) 346 printf("ata%d: %s: setting PIO mode on HPT366 chip\n", 347 scp->lun, (device == ATA_MASTER) ? "master" : "slave"); 348 hpt366_timing(scp, device, ATA_MODE_PIO); 349 } 350 break; 351 352 default: /* unknown controller chip */ 353 /* better not try generic DMA on ATAPI devices it almost never works */ 354 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 355 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 356 break; 357 358 /* well, we have no support for this, but try anyways */ 359 if (((wdmamode >= 2 && apiomode >= 4) || udmamode >= 2) && 360 (inb(scp->bmaddr + ATA_BMSTAT_PORT) & 361 ((device == ATA_MASTER) ? 362 ATA_BMSTAT_DMA_SLAVE : ATA_BMSTAT_DMA_MASTER))) { 363 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 364 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR); 365 if (bootverbose) 366 printf("ata%d: %s: %s setting up WDMA2 mode on generic chip\n", 367 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 368 (error) ? "failed" : "success"); 369 if (error) 370 break; 371 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 372 return 0; 373 } 374 } 375 free(dmatab, M_DEVBUF); 376 return -1; 377 } 378 379 int32_t 380 ata_dmasetup(struct ata_softc *scp, int32_t device, 381 int8_t *data, int32_t count, int32_t flags) 382 { 383 struct ata_dmaentry *dmatab; 384 u_int32_t dma_count, dma_base; 385 int32_t i = 0; 386 387 #ifdef ATA_DMADEBUG 388 printf("ata%d: dmasetup\n", scp->lun); 389 #endif 390 if (((uintptr_t)data & 1) || (count & 1)) 391 return -1; 392 393 if (!count) { 394 #ifdef ATA_DMADEBUG 395 printf("ata%d: zero length DMA transfer attempt on %s\n", 396 scp->lun, ((device == ATA_MASTER) ? "master" : "slave")); 397 #endif 398 return -1; 399 } 400 401 dmatab = scp->dmatab[(device == ATA_MASTER) ? 0 : 1]; 402 dma_base = vtophys(data); 403 dma_count = MIN(count, (PAGE_SIZE - ((uintptr_t)data & PAGE_MASK))); 404 data += dma_count; 405 count -= dma_count; 406 407 while (count) { 408 dmatab[i].base = dma_base; 409 dmatab[i].count = (dma_count & 0xffff); 410 i++; 411 if (i >= ATA_DMA_ENTRIES) { 412 printf("ata%d: too many segments in DMA table for %s\n", 413 scp->lun, (device ? "slave" : "master")); 414 return -1; 415 } 416 dma_base = vtophys(data); 417 dma_count = MIN(count, PAGE_SIZE); 418 data += MIN(count, PAGE_SIZE); 419 count -= MIN(count, PAGE_SIZE); 420 } 421 #ifdef ATA_DMADEBUG 422 printf("ata_dmasetup: base=%08x count%08x\n", dma_base, dma_count); 423 #endif 424 dmatab[i].base = dma_base; 425 dmatab[i].count = (dma_count & 0xffff) | ATA_DMA_EOT; 426 427 outl(scp->bmaddr + ATA_BMDTP_PORT, vtophys(dmatab)); 428 #ifdef ATA_DMADEBUG 429 printf("dmatab=%08x %08x\n", 430 vtophys(dmatab), inl(scp->bmaddr+ATA_BMDTP_PORT)); 431 #endif 432 outb(scp->bmaddr + ATA_BMCMD_PORT, flags ? ATA_BMCMD_WRITE_READ:0); 433 outb(scp->bmaddr + ATA_BMSTAT_PORT, (inb(scp->bmaddr + ATA_BMSTAT_PORT) | 434 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR))); 435 return 0; 436 } 437 438 void 439 ata_dmastart(struct ata_softc *scp) 440 { 441 #ifdef ATA_DMADEBUG 442 printf("ata%d: dmastart\n", scp->lun); 443 #endif 444 scp->flags |= ATA_DMA_ACTIVE; 445 outb(scp->bmaddr + ATA_BMCMD_PORT, 446 inb(scp->bmaddr + ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP); 447 } 448 449 int32_t 450 ata_dmadone(struct ata_softc *scp) 451 { 452 #ifdef ATA_DMADEBUG 453 printf("ata%d: dmadone\n", scp->lun); 454 #endif 455 outb(scp->bmaddr + ATA_BMCMD_PORT, 456 inb(scp->bmaddr + ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 457 scp->flags &= ~ATA_DMA_ACTIVE; 458 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 459 } 460 461 int32_t 462 ata_dmastatus(struct ata_softc *scp) 463 { 464 #ifdef ATA_DMADEBUG 465 printf("ata%d: dmastatus\n", scp->lun); 466 #endif 467 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 468 } 469 470 static void 471 hpt366_timing(struct ata_softc *scp, int32_t device, int32_t mode) 472 { 473 u_int32_t timing; 474 475 switch (pci_read_config(scp->dev, (device == ATA_MASTER) ? 0x41 : 0x45, 1)){ 476 case 0x85: /* 25Mhz */ 477 switch (mode) { 478 case ATA_MODE_PIO: timing = 0xc0ca8521; break; 479 case ATA_MODE_WDMA2: timing = 0xa0ca8521; break; 480 case ATA_MODE_UDMA2: 481 case ATA_MODE_UDMA3: timing = 0x90cf8521; break; 482 case ATA_MODE_UDMA4: timing = 0x90c98521; break; 483 default: timing = 0x01208585; 484 } 485 break; 486 default: 487 case 0xa7: /* 33MHz */ 488 switch (mode) { 489 case ATA_MODE_PIO: timing = 0xc0c8a731; break; 490 case ATA_MODE_WDMA2: timing = 0xa0c8a731; break; 491 case ATA_MODE_UDMA2: timing = 0x90caa731; break; 492 case ATA_MODE_UDMA3: timing = 0x90cfa731; break; 493 case ATA_MODE_UDMA4: timing = 0x90c9a731; break; 494 default: timing = 0x0120a7a7; 495 } 496 break; 497 case 0xd9: /* 40Mhz */ 498 switch (mode) { 499 case ATA_MODE_PIO: timing = 0xc008d963; break; 500 case ATA_MODE_WDMA2: timing = 0xa008d943; break; 501 case ATA_MODE_UDMA2: timing = 0x900bd943; break; 502 case ATA_MODE_UDMA3: timing = 0x900ad943; break; 503 case ATA_MODE_UDMA4: timing = 0x900fd943; break; 504 default: timing = 0x0120d9d9; 505 } 506 } 507 pci_write_config(scp->dev, 0x40 + (device==ATA_MASTER ? 0 : 4), timing, 4); 508 } 509 510 #else /* NPCI > 0 */ 511 512 int32_t 513 ata_dmainit(struct ata_softc *scp, int32_t device, 514 int32_t piomode, int32_t wdmamode, int32_t udmamode) 515 { 516 return -1; 517 } 518 519 int32_t 520 ata_dmasetup(struct ata_softc *scp, int32_t device, 521 int8_t *data, int32_t count, int32_t flags) 522 { 523 return -1; 524 } 525 526 void 527 ata_dmastart(struct ata_softc *scp) 528 { 529 } 530 531 int32_t 532 ata_dmadone(struct ata_softc *scp) 533 { 534 return -1; 535 } 536 537 int32_t 538 ata_dmastatus(struct ata_softc *scp) 539 { 540 return -1; 541 } 542 543 #endif /* NPCI > 0 */ 544