1 /*- 2 * Copyright (c) 1998 - 2005 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include "opt_ata.h" 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/ata.h> 36 #include <sys/kernel.h> 37 #include <sys/module.h> 38 #include <sys/endian.h> 39 #include <sys/ctype.h> 40 #include <sys/conf.h> 41 #include <sys/bus.h> 42 #include <sys/bio.h> 43 #include <sys/malloc.h> 44 #include <sys/sysctl.h> 45 #include <sys/sema.h> 46 #include <sys/taskqueue.h> 47 #include <vm/uma.h> 48 #include <machine/stdarg.h> 49 #include <machine/resource.h> 50 #include <machine/bus.h> 51 #include <sys/rman.h> 52 #ifdef __alpha__ 53 #include <machine/md_var.h> 54 #endif 55 #include <dev/ata/ata-all.h> 56 #include <dev/ata/ata-commands.h> 57 #include <ata_if.h> 58 59 /* device structure */ 60 static d_ioctl_t ata_ioctl; 61 static struct cdevsw ata_cdevsw = { 62 .d_version = D_VERSION, 63 .d_flags = D_NEEDGIANT, /* we need this as newbus isn't safe */ 64 .d_ioctl = ata_ioctl, 65 .d_name = "ata", 66 }; 67 68 /* prototypes */ 69 static void ata_interrupt(void *); 70 static void ata_boot_attach(void); 71 device_t ata_add_child(device_t parent, struct ata_device *atadev, int unit); 72 static int ata_identify(device_t dev); 73 74 /* global vars */ 75 MALLOC_DEFINE(M_ATA, "ATA generic", "ATA driver generic layer"); 76 int (*ata_ioctl_func)(struct ata_cmd *iocmd) = NULL; 77 devclass_t ata_devclass; 78 uma_zone_t ata_request_zone; 79 uma_zone_t ata_composite_zone; 80 int ata_wc = 1; 81 82 /* local vars */ 83 static struct intr_config_hook *ata_delayed_attach = NULL; 84 static int ata_dma = 1; 85 static int atapi_dma = 1; 86 87 /* sysctl vars */ 88 SYSCTL_NODE(_hw, OID_AUTO, ata, CTLFLAG_RD, 0, "ATA driver parameters"); 89 TUNABLE_INT("hw.ata.ata_dma", &ata_dma); 90 SYSCTL_INT(_hw_ata, OID_AUTO, ata_dma, CTLFLAG_RDTUN, &ata_dma, 0, 91 "ATA disk DMA mode control"); 92 TUNABLE_INT("hw.ata.atapi_dma", &atapi_dma); 93 SYSCTL_INT(_hw_ata, OID_AUTO, atapi_dma, CTLFLAG_RDTUN, &atapi_dma, 0, 94 "ATAPI device DMA mode control"); 95 TUNABLE_INT("hw.ata.wc", &ata_wc); 96 SYSCTL_INT(_hw_ata, OID_AUTO, wc, CTLFLAG_RDTUN, &ata_wc, 0, 97 "ATA disk write caching"); 98 99 /* 100 * newbus device interface related functions 101 */ 102 int 103 ata_probe(device_t dev) 104 { 105 return 0; 106 } 107 108 int 109 ata_attach(device_t dev) 110 { 111 struct ata_channel *ch = device_get_softc(dev); 112 int error, rid; 113 114 /* check that we have a virgin channel to attach */ 115 if (ch->r_irq) 116 return EEXIST; 117 118 /* initialize the softc basics */ 119 ch->dev = dev; 120 ch->state = ATA_IDLE; 121 bzero(&ch->state_mtx, sizeof(struct mtx)); 122 mtx_init(&ch->state_mtx, "ATA state lock", NULL, MTX_DEF); 123 bzero(&ch->queue_mtx, sizeof(struct mtx)); 124 mtx_init(&ch->queue_mtx, "ATA queue lock", NULL, MTX_DEF); 125 TAILQ_INIT(&ch->ata_queue); 126 127 /* reset the controller HW, the channel and device(s) */ 128 while (ATA_LOCKING(dev, ATA_LF_LOCK) != ch->unit) 129 tsleep(&error, PRIBIO, "ataatch", 1); 130 ch->hw.reset(ch); 131 ATA_LOCKING(dev, ATA_LF_UNLOCK); 132 133 /* setup interrupt delivery */ 134 rid = ATA_IRQ_RID; 135 ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 136 RF_SHAREABLE | RF_ACTIVE); 137 if (!ch->r_irq) { 138 device_printf(dev, "unable to allocate interrupt\n"); 139 return ENXIO; 140 } 141 if ((error = bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, 142 ata_interrupt, ch, &ch->ih))) { 143 device_printf(dev, "unable to setup interrupt\n"); 144 return error; 145 } 146 147 /* do not attach devices if we are in early boot */ 148 if (ata_delayed_attach) 149 return 0; 150 151 /* probe and attach devices on this channel */ 152 ata_identify(dev); 153 return 0; 154 } 155 156 int 157 ata_detach(device_t dev) 158 { 159 struct ata_channel *ch = device_get_softc(dev); 160 device_t *children; 161 int nchildren, i; 162 163 /* check that we have a vaild channel to detach */ 164 if (!ch->r_irq) 165 return ENXIO; 166 167 /* detach & delete all children */ 168 if (!device_get_children(dev, &children, &nchildren)) { 169 for (i = 0; i < nchildren; i++) 170 if (children[i]) 171 device_delete_child(dev, children[i]); 172 free(children, M_TEMP); 173 } 174 175 /* release resources */ 176 bus_teardown_intr(dev, ch->r_irq, ch->ih); 177 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 178 ch->r_irq = NULL; 179 mtx_destroy(&ch->state_mtx); 180 mtx_destroy(&ch->queue_mtx); 181 return 0; 182 } 183 184 int 185 ata_reinit(device_t dev) 186 { 187 struct ata_channel *ch = device_get_softc(dev); 188 device_t *children; 189 int nchildren, i; 190 191 if (!ch || !ch->r_irq) 192 return ENXIO; 193 194 if (bootverbose) 195 device_printf(dev, "reiniting channel ..\n"); 196 197 /* poll for locking the channel */ 198 while (ATA_LOCKING(dev, ATA_LF_LOCK) != ch->unit) 199 tsleep(&dev, PRIBIO, "atarini", 1); 200 201 /* grap the channel lock */ 202 mtx_lock(&ch->state_mtx); 203 ch->state = ATA_STALL_QUEUE; 204 mtx_unlock(&ch->state_mtx); 205 206 /* reset the controller HW, the channel and device(s) */ 207 ch->hw.reset(ch); 208 209 /* reinit the children and delete any that fails */ 210 if (!device_get_children(dev, &children, &nchildren)) { 211 mtx_lock(&Giant); /* newbus suckage it needs Giant */ 212 for (i = 0; i < nchildren; i++) { 213 if (children[i] && device_is_attached(children[i])) 214 if (ATA_REINIT(children[i])) { 215 if (ch->running->dev == children[i]) { 216 device_printf(ch->running->dev, 217 "FAILURE - device detached\n"); 218 ch->running->dev = NULL; 219 ch->running = NULL; 220 } 221 device_delete_child(dev, children[i]); 222 } 223 } 224 free(children, M_TEMP); 225 mtx_unlock(&Giant); /* newbus suckage dealt with, release Giant */ 226 } 227 228 /* catch running request if any */ 229 ata_catch_inflight(ch); 230 231 /* we're done release the channel for new work */ 232 mtx_lock(&ch->state_mtx); 233 ch->state = ATA_IDLE; 234 mtx_unlock(&ch->state_mtx); 235 ATA_LOCKING(dev, ATA_LF_UNLOCK); 236 237 if (bootverbose) 238 device_printf(dev, "reinit done ..\n"); 239 240 /* kick off requests on the queue */ 241 ata_start(dev); 242 return 0; 243 } 244 245 int 246 ata_suspend(device_t dev) 247 { 248 struct ata_channel *ch; 249 250 if (!dev || !(ch = device_get_softc(dev))) 251 return ENXIO; 252 253 /* wait for the channel to be IDLE before when enter suspend mode */ 254 while (1) { 255 mtx_lock(&ch->state_mtx); 256 if (ch->state == ATA_IDLE) { 257 ch->state = ATA_ACTIVE; 258 mtx_unlock(&ch->state_mtx); 259 break; 260 } 261 mtx_unlock(&ch->state_mtx); 262 tsleep(ch, PRIBIO, "atasusp", hz/10); 263 } 264 ATA_LOCKING(dev, ATA_LF_UNLOCK); 265 return 0; 266 } 267 268 int 269 ata_resume(device_t dev) 270 { 271 struct ata_channel *ch; 272 int error; 273 274 if (!dev || !(ch = device_get_softc(dev))) 275 return ENXIO; 276 277 /* reinit the devices, we dont know what mode/state they have */ 278 error = ata_reinit(dev); 279 280 /* kick off requests on the queue */ 281 ata_start(dev); 282 return error; 283 } 284 285 static void 286 ata_interrupt(void *data) 287 { 288 struct ata_channel *ch = (struct ata_channel *)data; 289 struct ata_request *request; 290 291 mtx_lock(&ch->state_mtx); 292 do { 293 /* do we have a running request */ 294 if (ch->state & ATA_TIMEOUT || !(request = ch->running)) 295 break; 296 297 ATA_DEBUG_RQ(request, "interrupt"); 298 299 /* ignore interrupt if device is busy */ 300 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) { 301 DELAY(100); 302 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) 303 break; 304 } 305 306 /* check for the right state */ 307 if (ch->state == ATA_ACTIVE || ch->state == ATA_STALL_QUEUE) { 308 request->flags |= ATA_R_INTR_SEEN; 309 } 310 else { 311 device_printf(request->dev, 312 "interrupt state=%d unexpected\n", ch->state); 313 break; 314 } 315 316 /* 317 * we have the HW locks, so start the tranaction for this request 318 * if it finishes immediately we dont need to wait for interrupt 319 */ 320 if (ch->hw.end_transaction(request) == ATA_OP_FINISHED) { 321 ch->running = NULL; 322 if (ch->state == ATA_ACTIVE) 323 ch->state = ATA_IDLE; 324 mtx_unlock(&ch->state_mtx); 325 ATA_LOCKING(ch->dev, ATA_LF_UNLOCK); 326 ata_finish(request); 327 return; 328 } 329 else { 330 request->flags &= ~ATA_R_INTR_SEEN; 331 } 332 } while (0); 333 mtx_unlock(&ch->state_mtx); 334 } 335 336 /* 337 * device related interfaces 338 */ 339 static int 340 ata_ioctl(struct cdev *dev, u_long cmd, caddr_t addr, 341 int32_t flag, struct thread *td) 342 { 343 struct ata_cmd *iocmd = (struct ata_cmd *)addr; 344 device_t *children, device = NULL; 345 struct ata_request *request; 346 caddr_t buf; 347 int nchildren, i; 348 int error = ENOTTY; 349 350 if (cmd != IOCATA) 351 return ENOTSUP; 352 if (iocmd->cmd == ATAGMAXCHANNEL) { 353 iocmd->u.maxchan = devclass_get_maxunit(ata_devclass); 354 return 0; 355 } 356 if (iocmd->channel < 0 || 357 iocmd->channel >= devclass_get_maxunit(ata_devclass)) { 358 return ENXIO; 359 } 360 if (!(device = devclass_get_device(ata_devclass, iocmd->channel))) 361 return ENXIO; 362 363 switch (iocmd->cmd) { 364 case ATAGPARM: 365 if (!device_get_children(device, &children, &nchildren)) { 366 struct ata_channel *ch; 367 368 if (!(ch = device_get_softc(device))) 369 return ENXIO; 370 iocmd->u.param.type[0] = 371 ch->devices & (ATA_ATA_MASTER | ATA_ATAPI_MASTER); 372 iocmd->u.param.type[1] = 373 ch->devices & (ATA_ATA_SLAVE | ATA_ATAPI_SLAVE); 374 for (i = 0; i < nchildren; i++) { 375 if (children[i] && device_is_attached(children[i])) { 376 struct ata_device *atadev = device_get_softc(children[i]); 377 378 if (atadev->unit == ATA_MASTER) { 379 strcpy(iocmd->u.param.name[0], 380 device_get_nameunit(children[i])); 381 bcopy(&atadev->param, &iocmd->u.param.params[0], 382 sizeof(struct ata_params)); 383 } 384 if (atadev->unit == ATA_SLAVE) { 385 strcpy(iocmd->u.param.name[1], 386 device_get_nameunit(children[i])); 387 bcopy(&atadev->param, &iocmd->u.param.params[1], 388 sizeof(struct ata_params)); 389 } 390 } 391 } 392 free(children, M_TEMP); 393 error = 0; 394 } 395 else 396 error = ENXIO; 397 break; 398 399 case ATAGMODE: 400 if (!device_get_children(device, &children, &nchildren)) { 401 for (i = 0; i < nchildren; i++) { 402 if (children[i] && device_is_attached(children[i])) { 403 struct ata_device *atadev = device_get_softc(children[i]); 404 405 atadev = device_get_softc(children[i]); 406 if (atadev->unit == ATA_MASTER) 407 iocmd->u.mode.mode[0] = atadev->mode; 408 if (atadev->unit == ATA_SLAVE) 409 iocmd->u.mode.mode[1] = atadev->mode; 410 } 411 free(children, M_TEMP); 412 } 413 error = 0; 414 } 415 else 416 error = ENXIO; 417 break; 418 419 case ATASMODE: 420 if (!device_get_children(device, &children, &nchildren)) { 421 for (i = 0; i < nchildren; i++) { 422 if (children[i] && device_is_attached(children[i])) { 423 struct ata_device *atadev = device_get_softc(children[i]); 424 425 if (atadev->unit == ATA_MASTER) { 426 atadev->mode = iocmd->u.mode.mode[0]; 427 ATA_SETMODE(device, children[i]); 428 iocmd->u.mode.mode[0] = atadev->mode; 429 } 430 if (atadev->unit == ATA_SLAVE) { 431 atadev->mode = iocmd->u.mode.mode[1]; 432 ATA_SETMODE(device, children[i]); 433 iocmd->u.mode.mode[1] = atadev->mode; 434 } 435 } 436 } 437 free(children, M_TEMP); 438 error = 0; 439 } 440 else 441 error = ENXIO; 442 break; 443 444 case ATAREQUEST: 445 if (!device_get_children(device, &children, &nchildren)) { 446 for (i = 0; i < nchildren; i++) { 447 if (children[i] && device_is_attached(children[i])) { 448 struct ata_device *atadev = device_get_softc(children[i]); 449 450 if (ATA_DEV(atadev->unit) == iocmd->device) { 451 if (!(buf = malloc(iocmd->u.request.count, 452 M_ATA, M_NOWAIT))) { 453 error = ENOMEM; 454 break; 455 } 456 if (!(request = ata_alloc_request())) { 457 error = ENOMEM; 458 free(buf, M_ATA); 459 break; 460 } 461 if (iocmd->u.request.flags & ATA_CMD_WRITE) { 462 error = copyin(iocmd->u.request.data, buf, 463 iocmd->u.request.count); 464 if (error) { 465 free(buf, M_ATA); 466 ata_free_request(request); 467 break; 468 } 469 } 470 request->dev = atadev->dev; 471 if (iocmd->u.request.flags & ATA_CMD_ATAPI) { 472 request->flags = ATA_R_ATAPI; 473 bcopy(iocmd->u.request.u.atapi.ccb, 474 request->u.atapi.ccb, 16); 475 } 476 else { 477 request->u.ata.command = 478 iocmd->u.request.u.ata.command; 479 request->u.ata.feature = 480 iocmd->u.request.u.ata.feature; 481 request->u.ata.lba = iocmd->u.request.u.ata.lba; 482 request->u.ata.count = iocmd->u.request.u.ata.count; 483 } 484 request->timeout = iocmd->u.request.timeout; 485 request->data = buf; 486 request->bytecount = iocmd->u.request.count; 487 request->transfersize = request->bytecount; 488 if (iocmd->u.request.flags & ATA_CMD_CONTROL) 489 request->flags |= ATA_R_CONTROL; 490 if (iocmd->u.request.flags & ATA_CMD_READ) 491 request->flags |= ATA_R_READ; 492 if (iocmd->u.request.flags & ATA_CMD_WRITE) 493 request->flags |= ATA_R_WRITE; 494 ata_queue_request(request); 495 if (!(request->flags & ATA_R_ATAPI)) { 496 iocmd->u.request.u.ata.command = 497 request->u.ata.command; 498 iocmd->u.request.u.ata.feature = 499 request->u.ata.feature; 500 iocmd->u.request.u.ata.lba = request->u.ata.lba; 501 iocmd->u.request.u.ata.count = request->u.ata.count; 502 } 503 iocmd->u.request.error = request->result; 504 if (iocmd->u.request.flags & ATA_CMD_READ) 505 error = copyout(buf, iocmd->u.request.data, 506 iocmd->u.request.count); 507 else 508 error = 0; 509 free(buf, M_ATA); 510 ata_free_request(request); 511 break; 512 } 513 } 514 } 515 free(children, M_TEMP); 516 } 517 else 518 error = ENXIO; 519 break; 520 521 case ATAREINIT: 522 error = ata_reinit(device); 523 ata_start(device); 524 break; 525 526 case ATAATTACH: 527 /* SOS should enable channel HW on controller XXX */ 528 error = ata_attach(device); 529 break; 530 531 case ATADETACH: 532 error = ata_detach(device); 533 /* SOS should disable channel HW on controller XXX */ 534 break; 535 536 default: 537 if (ata_ioctl_func) 538 error = ata_ioctl_func(iocmd); 539 } 540 return error; 541 } 542 543 static void 544 ata_boot_attach(void) 545 { 546 struct ata_channel *ch; 547 int ctlr; 548 549 /* release the hook that got us here, only needed during boot */ 550 if (ata_delayed_attach) { 551 config_intrhook_disestablish(ata_delayed_attach); 552 free(ata_delayed_attach, M_TEMP); 553 ata_delayed_attach = NULL; 554 } 555 556 /* kick of probe and attach on all channels */ 557 for (ctlr = 0; ctlr < devclass_get_maxunit(ata_devclass); ctlr++) { 558 if ((ch = devclass_get_softc(ata_devclass, ctlr))) { 559 ata_identify(ch->dev); 560 } 561 } 562 } 563 564 /* 565 * misc support functions 566 */ 567 device_t 568 ata_add_child(device_t parent, struct ata_device *atadev, int unit) 569 { 570 struct ata_channel *ch = device_get_softc(parent); 571 device_t child; 572 573 if ((child = device_add_child(parent, NULL, unit))) { 574 char buffer[64]; 575 576 device_set_softc(child, atadev); 577 sprintf(buffer, "%.40s/%.8s", 578 atadev->param.model, atadev->param.revision); 579 device_set_desc_copy(child, buffer); 580 device_quiet(child); 581 atadev->dev = child; 582 atadev->max_iosize = DEV_BSIZE; 583 atadev->mode = ATA_PIO_MAX; 584 if (atadev->param.config & ATA_PROTO_ATAPI) { 585 if (atapi_dma && ch->dma && 586 (atadev->param.config & ATA_DRQ_MASK) != ATA_DRQ_INTR && 587 ata_umode(&atadev->param) >= ATA_UDMA2) 588 atadev->mode = ATA_DMA_MAX; 589 } 590 else { 591 if (ata_dma && ch->dma) 592 atadev->mode = ATA_DMA_MAX; 593 } 594 } 595 return child; 596 } 597 598 static int 599 ata_identify(device_t dev) 600 { 601 struct ata_channel *ch = device_get_softc(dev); 602 struct ata_device *master, *slave; 603 int master_res = EIO, slave_res = EIO, master_unit = -1, slave_unit = -1; 604 605 if (!(master = malloc(sizeof(struct ata_device), 606 M_ATA, M_NOWAIT | M_ZERO))) { 607 device_printf(dev, "out of memory\n"); 608 return ENOMEM; 609 } 610 master->unit = ATA_MASTER; 611 if (!(slave = malloc(sizeof(struct ata_device), 612 M_ATA, M_NOWAIT | M_ZERO))) { 613 free(master, M_ATA); 614 device_printf(dev, "out of memory\n"); 615 return ENOMEM; 616 } 617 slave->unit = ATA_SLAVE; 618 619 /* wait for the channel to be IDLE then grab it before touching HW */ 620 while (ATA_LOCKING(dev, ATA_LF_LOCK) != ch->unit) 621 tsleep(ch, PRIBIO, "ataidnt1", 1); 622 while (1) { 623 mtx_lock(&ch->state_mtx); 624 if (ch->state == ATA_IDLE) { 625 ch->state = ATA_ACTIVE; 626 mtx_unlock(&ch->state_mtx); 627 break; 628 } 629 mtx_unlock(&ch->state_mtx); 630 tsleep(ch, PRIBIO, "ataidnt2", 1); 631 } 632 633 if (ch->devices & ATA_ATA_SLAVE) { 634 slave_res = ata_getparam(dev, slave, ATA_ATA_IDENTIFY); 635 #ifdef ATA_STATIC_ID 636 slave_unit = (device_get_unit(dev) << 1) + 1; 637 #endif 638 } 639 else if (ch->devices & ATA_ATAPI_SLAVE) 640 slave_res = ata_getparam(dev, slave, ATA_ATAPI_IDENTIFY); 641 642 if (ch->devices & ATA_ATA_MASTER) { 643 master_res = ata_getparam(dev, master, ATA_ATA_IDENTIFY); 644 #ifdef ATA_STATIC_ID 645 master_unit = (device_get_unit(dev) << 1); 646 #endif 647 } 648 else if (ch->devices & ATA_ATAPI_MASTER) 649 master_res = ata_getparam(dev, master, ATA_ATAPI_IDENTIFY); 650 651 if (master_res || !ata_add_child(dev, master, master_unit)) 652 free(master, M_ATA); 653 654 if (slave_res || !ata_add_child(dev, slave, slave_unit)) 655 free(slave, M_ATA); 656 657 mtx_lock(&ch->state_mtx); 658 ch->state = ATA_IDLE; 659 mtx_unlock(&ch->state_mtx); 660 ATA_LOCKING(dev, ATA_LF_UNLOCK); 661 662 bus_generic_probe(dev); 663 bus_generic_attach(dev); 664 return 0; 665 } 666 667 void 668 ata_default_registers(struct ata_channel *ch) 669 { 670 /* fill in the defaults from whats setup already */ 671 ch->r_io[ATA_ERROR].res = ch->r_io[ATA_FEATURE].res; 672 ch->r_io[ATA_ERROR].offset = ch->r_io[ATA_FEATURE].offset; 673 ch->r_io[ATA_IREASON].res = ch->r_io[ATA_COUNT].res; 674 ch->r_io[ATA_IREASON].offset = ch->r_io[ATA_COUNT].offset; 675 ch->r_io[ATA_STATUS].res = ch->r_io[ATA_COMMAND].res; 676 ch->r_io[ATA_STATUS].offset = ch->r_io[ATA_COMMAND].offset; 677 ch->r_io[ATA_ALTSTAT].res = ch->r_io[ATA_CONTROL].res; 678 ch->r_io[ATA_ALTSTAT].offset = ch->r_io[ATA_CONTROL].offset; 679 } 680 681 void 682 ata_udelay(int interval) 683 { 684 /* for now just use DELAY, the timer/sleep subsytems are not there yet */ 685 if (1 || interval < (1000000/hz) || ata_delayed_attach) 686 DELAY(interval); 687 else 688 tsleep(&interval, PRIBIO, "ataslp", interval/(1000000/hz)); 689 } 690 691 char * 692 ata_mode2str(int mode) 693 { 694 switch (mode) { 695 case ATA_PIO0: return "PIO0"; 696 case ATA_PIO1: return "PIO1"; 697 case ATA_PIO2: return "PIO2"; 698 case ATA_PIO3: return "PIO3"; 699 case ATA_PIO4: return "PIO4"; 700 case ATA_WDMA0: return "WDMA0"; 701 case ATA_WDMA1: return "WDMA1"; 702 case ATA_WDMA2: return "WDMA2"; 703 case ATA_UDMA0: return "UDMA16"; 704 case ATA_UDMA1: return "UDMA25"; 705 case ATA_UDMA2: return "UDMA33"; 706 case ATA_UDMA3: return "UDMA40"; 707 case ATA_UDMA4: return "UDMA66"; 708 case ATA_UDMA5: return "UDMA100"; 709 case ATA_UDMA6: return "UDMA133"; 710 case ATA_SA150: return "SATA150"; 711 default: 712 if (mode & ATA_DMA_MASK) 713 return "BIOSDMA"; 714 else 715 return "BIOSPIO"; 716 } 717 } 718 719 int 720 ata_pmode(struct ata_params *ap) 721 { 722 if (ap->atavalid & ATA_FLAG_64_70) { 723 if (ap->apiomodes & 0x02) 724 return ATA_PIO4; 725 if (ap->apiomodes & 0x01) 726 return ATA_PIO3; 727 } 728 if (ap->mwdmamodes & 0x04) 729 return ATA_PIO4; 730 if (ap->mwdmamodes & 0x02) 731 return ATA_PIO3; 732 if (ap->mwdmamodes & 0x01) 733 return ATA_PIO2; 734 if ((ap->retired_piomode & ATA_RETIRED_PIO_MASK) == 0x200) 735 return ATA_PIO2; 736 if ((ap->retired_piomode & ATA_RETIRED_PIO_MASK) == 0x100) 737 return ATA_PIO1; 738 if ((ap->retired_piomode & ATA_RETIRED_PIO_MASK) == 0x000) 739 return ATA_PIO0; 740 return ATA_PIO0; 741 } 742 743 int 744 ata_wmode(struct ata_params *ap) 745 { 746 if (ap->mwdmamodes & 0x04) 747 return ATA_WDMA2; 748 if (ap->mwdmamodes & 0x02) 749 return ATA_WDMA1; 750 if (ap->mwdmamodes & 0x01) 751 return ATA_WDMA0; 752 return -1; 753 } 754 755 int 756 ata_umode(struct ata_params *ap) 757 { 758 if (ap->atavalid & ATA_FLAG_88) { 759 if (ap->udmamodes & 0x40) 760 return ATA_UDMA6; 761 if (ap->udmamodes & 0x20) 762 return ATA_UDMA5; 763 if (ap->udmamodes & 0x10) 764 return ATA_UDMA4; 765 if (ap->udmamodes & 0x08) 766 return ATA_UDMA3; 767 if (ap->udmamodes & 0x04) 768 return ATA_UDMA2; 769 if (ap->udmamodes & 0x02) 770 return ATA_UDMA1; 771 if (ap->udmamodes & 0x01) 772 return ATA_UDMA0; 773 } 774 return -1; 775 } 776 777 int 778 ata_limit_mode(struct ata_device *atadev, int mode, int maxmode) 779 { 780 if (maxmode && mode > maxmode) 781 mode = maxmode; 782 783 if (mode >= ATA_UDMA0 && ata_umode(&atadev->param) > 0) 784 return min(mode, ata_umode(&atadev->param)); 785 786 if (mode >= ATA_WDMA0 && ata_wmode(&atadev->param) > 0) 787 return min(mode, ata_wmode(&atadev->param)); 788 789 if (mode > ata_pmode(&atadev->param)) 790 return min(mode, ata_pmode(&atadev->param)); 791 792 return mode; 793 } 794 795 /* 796 * module handeling 797 */ 798 static int 799 ata_module_event_handler(module_t mod, int what, void *arg) 800 { 801 static struct cdev *atacdev; 802 803 switch (what) { 804 case MOD_LOAD: 805 /* register controlling device */ 806 atacdev = make_dev(&ata_cdevsw, 0, UID_ROOT, GID_OPERATOR, 0600, "ata"); 807 808 if (cold) { 809 /* register boot attach to be run when interrupts are enabled */ 810 if (!(ata_delayed_attach = (struct intr_config_hook *) 811 malloc(sizeof(struct intr_config_hook), 812 M_TEMP, M_NOWAIT | M_ZERO))) { 813 printf("ata: malloc of delayed attach hook failed\n"); 814 return EIO; 815 } 816 ata_delayed_attach->ich_func = (void*)ata_boot_attach; 817 if (config_intrhook_establish(ata_delayed_attach) != 0) { 818 printf("ata: config_intrhook_establish failed\n"); 819 free(ata_delayed_attach, M_TEMP); 820 } 821 } 822 return 0; 823 824 case MOD_UNLOAD: 825 /* deregister controlling device */ 826 destroy_dev(atacdev); 827 return 0; 828 829 default: 830 return EOPNOTSUPP; 831 } 832 } 833 834 static moduledata_t ata_moduledata = { "ata", ata_module_event_handler, NULL }; 835 DECLARE_MODULE(ata, ata_moduledata, SI_SUB_CONFIGURE, SI_ORDER_SECOND); 836 MODULE_VERSION(ata, 1); 837 838 static void 839 ata_init(void) 840 { 841 ata_request_zone = uma_zcreate("ata_request", sizeof(struct ata_request), 842 NULL, NULL, NULL, NULL, 0, 0); 843 ata_composite_zone = uma_zcreate("ata_composite", 844 sizeof(struct ata_composite), 845 NULL, NULL, NULL, NULL, 0, 0); 846 } 847 SYSINIT(ata_register, SI_SUB_DRIVERS, SI_ORDER_SECOND, ata_init, NULL); 848 849 static void 850 ata_uninit(void) 851 { 852 uma_zdestroy(ata_composite_zone); 853 uma_zdestroy(ata_request_zone); 854 } 855 SYSUNINIT(ata_unregister, SI_SUB_DRIVERS, SI_ORDER_SECOND, ata_uninit, NULL); 856