1 /*- 2 * Copyright (c) 2007 Rui Paulo <rpaulo@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 16 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 17 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 18 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 19 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 20 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 22 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 23 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 24 * POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 * 28 */ 29 30 #define ASMC_MAXFANS 2 31 32 struct asmc_softc { 33 device_t sc_dev; 34 struct mtx sc_mtx; 35 int sc_nfan; 36 int16_t sms_rest_x; 37 int16_t sms_rest_y; 38 int16_t sms_rest_z; 39 struct sysctl_oid *sc_fan_tree[ASMC_MAXFANS+1]; 40 struct sysctl_oid *sc_temp_tree; 41 struct sysctl_oid *sc_sms_tree; 42 struct sysctl_oid *sc_light_tree; 43 struct asmc_model *sc_model; 44 int sc_rid; 45 struct resource *sc_res; 46 void *sc_cookie; 47 int sc_sms_intrtype; 48 struct taskqueue *sc_sms_tq; 49 struct task sc_sms_task; 50 }; 51 52 /* 53 * The Sudden Motion Sensor is able to generate an interrupt when 54 * there are certain critical conditions (free fall, high acceleration and 55 * shocks). 56 * The following IRQ is used. 57 */ 58 #define ASMC_IRQ 6 59 60 /* 61 * Data port. 62 */ 63 #define ASMC_DATAPORT 0x300 64 #define ASMC_STATUS_MASK 0x0f 65 66 /* 67 * Command port. 68 */ 69 #define ASMC_CMDPORT 0x304 70 #define ASMC_CMDREAD 0x10 71 #define ASMC_CMDWRITE 0x11 72 73 /* 74 * Interrupt port. 75 */ 76 #define ASMC_INTPORT 0x31f 77 78 79 /* Number of keys */ 80 #define ASMC_NKEYS "#KEY" /* RO; 4 bytes */ 81 82 /* 83 * Fan control via SMC. 84 */ 85 #define ASMC_KEY_FANCOUNT "FNum" /* RO; 1 byte */ 86 #define ASMC_KEY_FANMANUAL "FS! " /* RW; 2 bytes */ 87 #define ASMC_KEY_FANSPEED "F%dAc" /* RO; 2 bytes */ 88 #define ASMC_KEY_FANMINSPEED "F%dMn" /* RO; 2 bytes */ 89 #define ASMC_KEY_FANMAXSPEED "F%dMx" /* RO; 2 bytes */ 90 #define ASMC_KEY_FANSAFESPEED "F%dSf" /* RO; 2 bytes */ 91 #define ASMC_KEY_FANTARGETSPEED "F%dTg" /* RW; 2 bytes */ 92 93 /* 94 * Sudden Motion Sensor (SMS). 95 */ 96 #define ASMC_SMS_INIT1 0xe0 97 #define ASMC_SMS_INIT2 0xf8 98 #define ASMC_KEY_SMS "MOCN" /* RW; 2 bytes */ 99 #define ASMC_KEY_SMS_X "MO_X" /* RO; 2 bytes */ 100 #define ASMC_KEY_SMS_Y "MO_Y" /* RO; 2 bytes */ 101 #define ASMC_KEY_SMS_Z "MO_Z" /* RO; 2 bytes */ 102 #define ASMC_KEY_SMS_LOW "MOLT" /* RW; 2 bytes */ 103 #define ASMC_KEY_SMS_HIGH "MOHT" /* RW; 2 bytes */ 104 #define ASMC_KEY_SMS_LOW_INT "MOLD" /* RW; 1 byte */ 105 #define ASMC_KEY_SMS_HIGH_INT "MOHD" /* RW; 1 byte */ 106 #define ASMC_KEY_SMS_FLAG "MSDW" /* RW; 1 byte */ 107 #define ASMC_SMS_INTFF 0x60 /* Free fall Interrupt */ 108 #define ASMC_SMS_INTHA 0x6f /* High Acceleration Interrupt */ 109 #define ASMC_SMS_INTSH 0x80 /* Shock Interrupt */ 110 111 /* 112 * Keyboard backlight. 113 */ 114 #define ASMC_KEY_LIGHTLEFT "ALV0" /* RO; 6 bytes */ 115 #define ASMC_KEY_LIGHTRIGHT "ALV1" /* RO; 6 bytes */ 116 #define ASMC_KEY_LIGHTVALUE "LKSB" /* WO; 2 bytes */ 117 118 /* 119 * Clamshell. 120 */ 121 #define ASMC_KEY_CLAMSHELL "MSLD" /* RO; 1 byte */ 122 123 /* 124 * Interrupt keys. 125 */ 126 #define ASMC_KEY_INTOK "NTOK" /* WO; 1 byte */ 127 128 /* 129 * Temperatures. 130 * 131 * First for MacBook, second for MacBook Pro, then for Intel Mac Mini. 132 * 133 */ 134 #define ASMC_MB_TEMPS { "TB0T", "TN0P", "TN1P", "Th0H", "Th1H", \ 135 "TM0P", NULL } 136 #define ASMC_MB_TEMPNAMES { "enclosure", "northbridge1", \ 137 "northbridge2", "heatsink1", \ 138 "heatsink2", "memory", } 139 #define ASMC_MB_TEMPDESCS { "Enclosure Bottomside", \ 140 "Northbridge Point 1", \ 141 "Northbridge Point 2", "Heatsink 1", \ 142 "Heatsink 2", "Memory Bank A", } 143 144 #define ASMC_MBP_TEMPS { "TB0T", "Th0H", "Th1H", "Tm0P", \ 145 "TG0H", "TG0P", "TG0T", NULL } 146 147 #define ASMC_MBP_TEMPNAMES { "enclosure", "heatsink1", \ 148 "heatsink2", "memory", "graphics", \ 149 "graphicssink", "unknown", } 150 151 #define ASMC_MBP_TEMPDESCS { "Enclosure Bottomside", \ 152 "Heatsink 1", "Heatsink 2", \ 153 "Memory Controller", \ 154 "Graphics Chip", "Graphics Heatsink", \ 155 "Unknown", } 156 157 #define ASMC_MM_TEMPS { "TN0P", "TN1P", NULL } 158 #define ASMC_MM_TEMPNAMES { "northbridge1", "northbridge2" } 159 #define ASMC_MM_TEMPDESCS { "Northbridge Point 1", \ 160 "Northbridge Point 2" } 161