1 /* 2 ***************************************************************************************** 3 ** O.S : FreeBSD 4 ** FILE NAME : arcmsr.c 5 ** BY : Erich Chen 6 ** Description: SCSI RAID Device Driver for 7 ** ARECA (ARC11XX/ARC12XX/ARC13XX/ARC16XX) SATA/SAS RAID HOST Adapter 8 ** ARCMSR RAID Host adapter 9 ** [RAID controller:INTEL 331(PCI-X) 341(PCI-EXPRESS) chip set] 10 ****************************************************************************************** 11 ************************************************************************ 12 ** 13 ** Copyright (c) 2004-2006 ARECA Co. Ltd. 14 ** Erich Chen, Taipei Taiwan All rights reserved. 15 ** 16 ** Redistribution and use in source and binary forms, with or without 17 ** modification, are permitted provided that the following conditions 18 ** are met: 19 ** 1. Redistributions of source code must retain the above copyright 20 ** notice, this list of conditions and the following disclaimer. 21 ** 2. Redistributions in binary form must reproduce the above copyright 22 ** notice, this list of conditions and the following disclaimer in the 23 ** documentation and/or other materials provided with the distribution. 24 ** 3. The name of the author may not be used to endorse or promote products 25 ** derived from this software without specific prior written permission. 26 ** 27 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 28 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 29 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 30 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 31 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, BUT 32 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 33 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY 34 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 35 **(INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF 36 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 37 ************************************************************************** 38 ** History 39 ** 40 ** REV# DATE NAME DESCRIPTION 41 ** 1.00.00.00 3/31/2004 Erich Chen First release 42 ** 1.20.00.02 11/29/2004 Erich Chen bug fix with arcmsr_bus_reset when PHY error 43 ** 1.20.00.03 4/19/2005 Erich Chen add SATA 24 Ports adapter type support 44 ** clean unused function 45 ** 1.20.00.12 9/12/2005 Erich Chen bug fix with abort command handling, 46 ** firmware version check 47 ** and firmware update notify for hardware bug fix 48 ** handling if none zero high part physical address 49 ** of srb resource 50 ** 1.20.00.13 8/18/2006 Erich Chen remove pending srb and report busy 51 ** add iop message xfer 52 ** with scsi pass-through command 53 ** add new device id of sas raid adapters 54 ** code fit for SPARC64 & PPC 55 ** 1.20.00.14 02/05/2007 Erich Chen bug fix for incorrect ccb_h.status report 56 ** and cause g_vfs_done() read write error 57 58 ****************************************************************************************** 59 * $FreeBSD$ 60 */ 61 #include <sys/param.h> 62 #include <sys/systm.h> 63 #include <sys/malloc.h> 64 #include <sys/kernel.h> 65 #include <sys/bus.h> 66 #include <sys/queue.h> 67 #include <sys/stat.h> 68 #include <sys/devicestat.h> 69 #include <sys/kthread.h> 70 #include <sys/module.h> 71 #include <sys/proc.h> 72 #include <sys/lock.h> 73 #include <sys/sysctl.h> 74 #include <sys/poll.h> 75 #include <sys/ioccom.h> 76 #include <vm/vm.h> 77 #include <vm/vm_param.h> 78 #include <vm/pmap.h> 79 80 #include <isa/rtc.h> 81 82 #include <machine/bus.h> 83 #include <machine/resource.h> 84 #include <machine/atomic.h> 85 #include <sys/conf.h> 86 #include <sys/rman.h> 87 88 #include <cam/cam.h> 89 #include <cam/cam_ccb.h> 90 #include <cam/cam_sim.h> 91 #include <cam/cam_xpt_sim.h> 92 #include <cam/cam_debug.h> 93 #include <cam/scsi/scsi_all.h> 94 #include <cam/scsi/scsi_message.h> 95 /* 96 ************************************************************************** 97 ************************************************************************** 98 */ 99 #if __FreeBSD_version >= 500005 100 #include <sys/selinfo.h> 101 #include <sys/mutex.h> 102 #include <sys/endian.h> 103 #include <dev/pci/pcivar.h> 104 #include <dev/pci/pcireg.h> 105 #define ARCMSR_LOCK_INIT(l, s) mtx_init(l, s, NULL, MTX_DEF|MTX_RECURSE) 106 #define ARCMSR_LOCK_ACQUIRE(l) mtx_lock(l) 107 #define ARCMSR_LOCK_RELEASE(l) mtx_unlock(l) 108 #define ARCMSR_LOCK_TRY(l) mtx_trylock(l) 109 #define arcmsr_htole32(x) htole32(x) 110 typedef struct mtx arcmsr_lock_t; 111 #else 112 #include <sys/select.h> 113 #include <pci/pcivar.h> 114 #include <pci/pcireg.h> 115 #define ARCMSR_LOCK_INIT(l, s) simple_lock_init(l) 116 #define ARCMSR_LOCK_ACQUIRE(l) simple_lock(l) 117 #define ARCMSR_LOCK_RELEASE(l) simple_unlock(l) 118 #define ARCMSR_LOCK_TRY(l) simple_lock_try(l) 119 #define arcmsr_htole32(x) (x) 120 typedef struct simplelock arcmsr_lock_t; 121 #endif 122 #include <dev/arcmsr/arcmsr.h> 123 #define ARCMSR_SRBS_POOL_SIZE ((sizeof(struct CommandControlBlock) * ARCMSR_MAX_FREESRB_NUM)+0x20) 124 /* 125 ************************************************************************** 126 ************************************************************************** 127 */ 128 #define CHIP_REG_READ32(r) bus_space_read_4(acb->btag, acb->bhandle, offsetof(struct MessageUnit,r)) 129 #define CHIP_REG_WRITE32(r,d) bus_space_write_4(acb->btag, acb->bhandle, offsetof(struct MessageUnit,r), d) 130 /* 131 ************************************************************************** 132 ************************************************************************** 133 */ 134 static struct CommandControlBlock * arcmsr_get_freesrb(struct AdapterControlBlock *acb); 135 static u_int8_t arcmsr_seek_cmd2abort(union ccb * abortccb); 136 static u_int8_t arcmsr_wait_msgint_ready(struct AdapterControlBlock *acb); 137 static u_int32_t arcmsr_probe(device_t dev); 138 static u_int32_t arcmsr_attach(device_t dev); 139 static u_int32_t arcmsr_detach(device_t dev); 140 static u_int32_t arcmsr_iop_ioctlcmd(struct AdapterControlBlock *acb, u_int32_t ioctl_cmd, caddr_t arg); 141 static void arcmsr_iop_parking(struct AdapterControlBlock *acb); 142 static void arcmsr_shutdown(device_t dev); 143 static void arcmsr_interrupt(void *arg); 144 static void arcmsr_polling_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb); 145 static void arcmsr_free_resource(struct AdapterControlBlock *acb); 146 static void arcmsr_bus_reset(struct AdapterControlBlock *acb); 147 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb); 148 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb); 149 static void arcmsr_iop_init(struct AdapterControlBlock *acb); 150 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb); 151 static void arcmsr_post_Qbuffer(struct AdapterControlBlock *acb); 152 static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb); 153 static void arcmsr_srb_complete(struct CommandControlBlock *srb, int stand_flag); 154 static void arcmsr_iop_reset(struct AdapterControlBlock *acb); 155 static void arcmsr_report_sense_info(struct CommandControlBlock *srb); 156 static void arcmsr_build_srb(struct CommandControlBlock *srb, bus_dma_segment_t * dm_segs, u_int32_t nseg); 157 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, union ccb * pccb); 158 static int arcmsr_resume(device_t dev); 159 static int arcmsr_suspend(device_t dev); 160 /* 161 ************************************************************************** 162 ************************************************************************** 163 */ 164 static void UDELAY(u_int32_t us) { DELAY(us); } 165 /* 166 ************************************************************************** 167 ************************************************************************** 168 */ 169 static bus_dmamap_callback_t arcmsr_map_freesrb; 170 static bus_dmamap_callback_t arcmsr_executesrb; 171 /* 172 ************************************************************************** 173 ************************************************************************** 174 */ 175 static d_open_t arcmsr_open; 176 static d_close_t arcmsr_close; 177 static d_ioctl_t arcmsr_ioctl; 178 179 static device_method_t arcmsr_methods[]={ 180 DEVMETHOD(device_probe, arcmsr_probe), 181 DEVMETHOD(device_attach, arcmsr_attach), 182 DEVMETHOD(device_detach, arcmsr_detach), 183 DEVMETHOD(device_shutdown, arcmsr_shutdown), 184 DEVMETHOD(device_suspend, arcmsr_suspend), 185 DEVMETHOD(device_resume, arcmsr_resume), 186 187 DEVMETHOD(bus_print_child, bus_generic_print_child), 188 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 189 { 0, 0 } 190 }; 191 192 static driver_t arcmsr_driver={ 193 "arcmsr", arcmsr_methods, sizeof(struct AdapterControlBlock) 194 }; 195 196 static devclass_t arcmsr_devclass; 197 DRIVER_MODULE(arcmsr, pci, arcmsr_driver, arcmsr_devclass, 0, 0); 198 MODULE_DEPEND(arcmsr, pci, 1, 1, 1); 199 MODULE_DEPEND(arcmsr, cam, 1, 1, 1); 200 #ifndef BUS_DMA_COHERENT 201 #define BUS_DMA_COHERENT 0x04 /* hint: map memory in a coherent way */ 202 #endif 203 #if __FreeBSD_version >= 501000 204 #ifndef D_NEEDGIANT 205 #define D_NEEDGIANT 0x00400000 /* driver want Giant */ 206 #endif 207 #ifndef D_VERSION 208 #define D_VERSION 0x20011966 209 #endif 210 static struct cdevsw arcmsr_cdevsw={ 211 #if __FreeBSD_version > 502010 212 .d_version = D_VERSION, 213 #endif 214 .d_flags = D_NEEDGIANT, 215 .d_open = arcmsr_open, /* open */ 216 .d_close = arcmsr_close, /* close */ 217 .d_ioctl = arcmsr_ioctl, /* ioctl */ 218 .d_name = "arcmsr", /* name */ 219 }; 220 #else 221 #define ARCMSR_CDEV_MAJOR 180 222 223 static struct cdevsw arcmsr_cdevsw = { 224 arcmsr_open, /* open */ 225 arcmsr_close, /* close */ 226 noread, /* read */ 227 nowrite, /* write */ 228 arcmsr_ioctl, /* ioctl */ 229 nopoll, /* poll */ 230 nommap, /* mmap */ 231 nostrategy, /* strategy */ 232 "arcmsr", /* name */ 233 ARCMSR_CDEV_MAJOR, /* major */ 234 nodump, /* dump */ 235 nopsize, /* psize */ 236 0 /* flags */ 237 }; 238 #endif 239 240 #if __FreeBSD_version < 500005 241 static int arcmsr_open(dev_t dev, int flags, int fmt, struct proc *proc) 242 #else 243 #if __FreeBSD_version < 503000 244 static int arcmsr_open(dev_t dev, int flags, int fmt, struct thread *proc) 245 #else 246 static int arcmsr_open(struct cdev *dev, int flags, int fmt, d_thread_t *proc) 247 #endif 248 #endif 249 { 250 #if __FreeBSD_version < 503000 251 struct AdapterControlBlock *acb=dev->si_drv1; 252 #else 253 int unit = minor(dev); 254 struct AdapterControlBlock *acb = devclass_get_softc(arcmsr_devclass, unit); 255 #endif 256 if(acb==NULL) { 257 return ENXIO; 258 } 259 return 0; 260 } 261 /* 262 ************************************************************************** 263 ************************************************************************** 264 */ 265 #if __FreeBSD_version < 500005 266 static int arcmsr_close(dev_t dev, int flags, int fmt, struct proc *proc) 267 #else 268 #if __FreeBSD_version < 503000 269 static int arcmsr_close(dev_t dev, int flags, int fmt, struct thread *proc) 270 #else 271 static int arcmsr_close(struct cdev *dev, int flags, int fmt, d_thread_t *proc) 272 #endif 273 #endif 274 { 275 #if __FreeBSD_version < 503000 276 struct AdapterControlBlock *acb=dev->si_drv1; 277 #else 278 int unit = minor(dev); 279 struct AdapterControlBlock *acb = devclass_get_softc(arcmsr_devclass, unit); 280 #endif 281 if(acb==NULL) { 282 return ENXIO; 283 } 284 return 0; 285 } 286 /* 287 ************************************************************************** 288 ************************************************************************** 289 */ 290 #if __FreeBSD_version < 500005 291 static int arcmsr_ioctl(dev_t dev, u_long ioctl_cmd, caddr_t arg, int flags, struct proc *proc) 292 #else 293 #if __FreeBSD_version < 503000 294 static int arcmsr_ioctl(dev_t dev, u_long ioctl_cmd, caddr_t arg, int flags, struct thread *proc) 295 #else 296 static int arcmsr_ioctl(struct cdev *dev, u_long ioctl_cmd, caddr_t arg, int flags, d_thread_t *proc) 297 #endif 298 #endif 299 { 300 #if __FreeBSD_version < 503000 301 struct AdapterControlBlock *acb=dev->si_drv1; 302 #else 303 int unit = minor(dev); 304 struct AdapterControlBlock *acb = devclass_get_softc(arcmsr_devclass, unit); 305 #endif 306 307 if(acb==NULL) { 308 return ENXIO; 309 } 310 return(arcmsr_iop_ioctlcmd(acb, ioctl_cmd, arg)); 311 } 312 /* 313 ******************************************************************************* 314 ******************************************************************************* 315 */ 316 static int arcmsr_suspend(device_t dev) 317 { 318 struct AdapterControlBlock *acb = device_get_softc(dev); 319 u_int32_t intmask_org; 320 321 /* disable all outbound interrupt */ 322 intmask_org=CHIP_REG_READ32(outbound_intmask); 323 CHIP_REG_WRITE32(outbound_intmask, (intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE)); 324 /* flush controller */ 325 arcmsr_iop_parking(acb); 326 return(0); 327 } 328 /* 329 ******************************************************************************* 330 ******************************************************************************* 331 */ 332 static int arcmsr_resume(device_t dev) 333 { 334 struct AdapterControlBlock *acb = device_get_softc(dev); 335 336 arcmsr_iop_init(acb); 337 return(0); 338 } 339 /* 340 ********************************************************************************* 341 ********************************************************************************* 342 */ 343 static void arcmsr_async(void *cb_arg, u_int32_t code, struct cam_path *path, void *arg) 344 { 345 struct AdapterControlBlock *acb; 346 u_int8_t target_id, target_lun; 347 struct cam_sim * sim; 348 349 sim=(struct cam_sim *) cb_arg; 350 acb =(struct AdapterControlBlock *) cam_sim_softc(sim); 351 switch (code) { 352 case AC_LOST_DEVICE: 353 target_id=xpt_path_target_id(path); 354 target_lun=xpt_path_lun_id(path); 355 if((target_id > ARCMSR_MAX_TARGETID) || (target_lun > ARCMSR_MAX_TARGETLUN)) { 356 break; 357 } 358 printf("%s:scsi id%d lun%d device lost \n" 359 , device_get_name(acb->pci_dev), target_id, target_lun); 360 break; 361 default: 362 break; 363 } 364 } 365 /* 366 ************************************************************************ 367 ************************************************************************ 368 */ 369 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) 370 { 371 CHIP_REG_WRITE32(inbound_msgaddr0, ARCMSR_INBOUND_MESG0_FLUSH_CACHE); 372 if(arcmsr_wait_msgint_ready(acb)) { 373 printf("arcmsr%d: wait 'flush adapter cache' timeout \n" 374 , acb->pci_unit); 375 } 376 return; 377 } 378 /* 379 ********************************************************************** 380 ********************************************************************** 381 */ 382 static u_int8_t arcmsr_wait_msgint_ready(struct AdapterControlBlock *acb) 383 { 384 u_int32_t Index; 385 u_int8_t Retries=0x00; 386 387 do { 388 for(Index=0; Index < 100; Index++) { 389 if(CHIP_REG_READ32(outbound_intstatus) & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { 390 /*clear interrupt*/ 391 CHIP_REG_WRITE32(outbound_intstatus, ARCMSR_MU_OUTBOUND_MESSAGE0_INT); 392 return 0x00; 393 } 394 /* one us delay */ 395 UDELAY(10000); 396 }/*max 1 seconds*/ 397 }while(Retries++ < 20);/*max 20 sec*/ 398 return 0xff; 399 } 400 /* 401 ********************************************************************** 402 ********************************************************************** 403 */ 404 static void arcmsr_srb_complete(struct CommandControlBlock *srb, int stand_flag) 405 { 406 struct AdapterControlBlock *acb=srb->acb; 407 union ccb * pccb=srb->pccb; 408 409 if((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 410 bus_dmasync_op_t op; 411 412 if((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 413 op = BUS_DMASYNC_POSTREAD; 414 } else { 415 op = BUS_DMASYNC_POSTWRITE; 416 } 417 bus_dmamap_sync(acb->dm_segs_dmat, srb->dm_segs_dmamap, op); 418 bus_dmamap_unload(acb->dm_segs_dmat, srb->dm_segs_dmamap); 419 } 420 ARCMSR_LOCK_ACQUIRE(&acb->workingQ_done_lock); 421 if(stand_flag==1) { 422 atomic_subtract_int(&acb->srboutstandingcount, 1); 423 if((acb->acb_flags & ACB_F_CAM_DEV_QFRZN) && ( 424 acb->srboutstandingcount < ARCMSR_RELEASE_SIMQ_LEVEL)) { 425 acb->acb_flags &= ~ACB_F_CAM_DEV_QFRZN; 426 pccb->ccb_h.status |= CAM_RELEASE_SIMQ; 427 } 428 } 429 srb->startdone=ARCMSR_SRB_DONE; 430 srb->srb_flags=0; 431 acb->srbworkingQ[acb->workingsrb_doneindex]=srb; 432 acb->workingsrb_doneindex++; 433 acb->workingsrb_doneindex %= ARCMSR_MAX_FREESRB_NUM; 434 ARCMSR_LOCK_RELEASE(&acb->workingQ_done_lock); 435 xpt_done(pccb); 436 return; 437 } 438 /* 439 ********************************************************************** 440 ********************************************************************** 441 */ 442 static void arcmsr_report_sense_info(struct CommandControlBlock *srb) 443 { 444 union ccb * pccb=srb->pccb; 445 446 pccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 447 pccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 448 if(&pccb->csio.sense_data) { 449 memset(&pccb->csio.sense_data, 0, sizeof(pccb->csio.sense_data)); 450 memcpy(&pccb->csio.sense_data, srb->arcmsr_cdb.SenseData, 451 get_min(sizeof(struct SENSE_DATA), sizeof(pccb->csio.sense_data))); 452 ((u_int8_t *)&pccb->csio.sense_data)[0] = (0x1 << 7 | 0x70); /* Valid,ErrorCode */ 453 pccb->ccb_h.status |= CAM_AUTOSNS_VALID; 454 } 455 return; 456 } 457 /* 458 ********************************************************************* 459 ** 460 ********************************************************************* 461 */ 462 static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb) 463 { 464 CHIP_REG_WRITE32(inbound_msgaddr0, ARCMSR_INBOUND_MESG0_ABORT_CMD); 465 if(arcmsr_wait_msgint_ready(acb)) { 466 printf("arcmsr%d: wait 'abort all outstanding command' timeout \n" 467 , acb->pci_unit); 468 } 469 return; 470 } 471 /* 472 **************************************************************************** 473 **************************************************************************** 474 */ 475 static void arcmsr_iop_reset(struct AdapterControlBlock *acb) 476 { 477 struct CommandControlBlock *srb; 478 u_int32_t intmask_org, mask; 479 u_int32_t i=0; 480 481 if(acb->srboutstandingcount!=0) 482 { 483 /* talk to iop 331 outstanding command aborted*/ 484 arcmsr_abort_allcmd(acb); 485 UDELAY(3000*1000);/*wait for 3 sec for all command aborted*/ 486 /* disable all outbound interrupt */ 487 intmask_org=CHIP_REG_READ32(outbound_intmask); 488 CHIP_REG_WRITE32(outbound_intmask 489 , intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE); 490 /*clear all outbound posted Q*/ 491 for(i=0;i<ARCMSR_MAX_OUTSTANDING_CMD;i++) { 492 CHIP_REG_READ32(outbound_queueport); 493 } 494 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++) { 495 srb=acb->psrb_pool[i]; 496 if(srb->startdone==ARCMSR_SRB_START) { 497 srb->startdone=ARCMSR_SRB_ABORTED; 498 srb->pccb->ccb_h.status |= CAM_REQ_ABORTED; 499 arcmsr_srb_complete(srb, 1); 500 } 501 } 502 /* enable all outbound interrupt */ 503 mask=~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE 504 |ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE); 505 CHIP_REG_WRITE32(outbound_intmask, intmask_org & mask); 506 /* post abort all outstanding command message to RAID controller */ 507 } 508 atomic_set_int(&acb->srboutstandingcount, 0); 509 acb->workingsrb_doneindex=0; 510 acb->workingsrb_startindex=0; 511 return; 512 } 513 /* 514 ********************************************************************** 515 ********************************************************************** 516 */ 517 static void arcmsr_build_srb(struct CommandControlBlock *srb, bus_dma_segment_t *dm_segs, u_int32_t nseg) 518 { 519 struct ARCMSR_CDB * arcmsr_cdb= &srb->arcmsr_cdb; 520 u_int8_t * psge=(u_int8_t *)&arcmsr_cdb->u; 521 u_int32_t address_lo, address_hi; 522 union ccb * pccb=srb->pccb; 523 struct ccb_scsiio * pcsio= &pccb->csio; 524 u_int32_t arccdbsize=0x30; 525 526 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB)); 527 arcmsr_cdb->Bus=0; 528 arcmsr_cdb->TargetID=pccb->ccb_h.target_id; 529 arcmsr_cdb->LUN=pccb->ccb_h.target_lun; 530 arcmsr_cdb->Function=1; 531 arcmsr_cdb->CdbLength=(u_int8_t)pcsio->cdb_len; 532 arcmsr_cdb->Context=(unsigned long)arcmsr_cdb; 533 bcopy(pcsio->cdb_io.cdb_bytes, arcmsr_cdb->Cdb, pcsio->cdb_len); 534 if(nseg != 0) { 535 struct AdapterControlBlock *acb=srb->acb; 536 bus_dmasync_op_t op; 537 u_int32_t length, i, cdb_sgcount=0; 538 539 if((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 540 op=BUS_DMASYNC_PREREAD; 541 } else { 542 op=BUS_DMASYNC_PREWRITE; 543 arcmsr_cdb->Flags|=ARCMSR_CDB_FLAG_WRITE; 544 srb->srb_flags|=SRB_FLAG_WRITE; 545 } 546 bus_dmamap_sync(acb->dm_segs_dmat, srb->dm_segs_dmamap, op); 547 for(i=0;i<nseg;i++) { 548 /* Get the physical address of the current data pointer */ 549 length=arcmsr_htole32(dm_segs[i].ds_len); 550 address_lo=arcmsr_htole32(dma_addr_lo32(dm_segs[i].ds_addr)); 551 address_hi=arcmsr_htole32(dma_addr_hi32(dm_segs[i].ds_addr)); 552 if(address_hi==0) { 553 struct SG32ENTRY * pdma_sg=(struct SG32ENTRY *)psge; 554 pdma_sg->address=address_lo; 555 pdma_sg->length=length; 556 psge += sizeof(struct SG32ENTRY); 557 arccdbsize += sizeof(struct SG32ENTRY); 558 } else { 559 u_int32_t sg64s_size=0, tmplength=length; 560 561 while(1) { 562 u_int64_t span4G, length0; 563 struct SG64ENTRY * pdma_sg=(struct SG64ENTRY *)psge; 564 565 span4G=(u_int64_t)address_lo + tmplength; 566 pdma_sg->addresshigh=address_hi; 567 pdma_sg->address=address_lo; 568 if(span4G > 0x100000000) { 569 /*see if cross 4G boundary*/ 570 length0=0x100000000-address_lo; 571 pdma_sg->length=(u_int32_t)length0|IS_SG64_ADDR; 572 address_hi=address_hi+1; 573 address_lo=0; 574 tmplength=tmplength-(u_int32_t)length0; 575 sg64s_size += sizeof(struct SG64ENTRY); 576 psge += sizeof(struct SG64ENTRY); 577 cdb_sgcount++; 578 } else { 579 pdma_sg->length=tmplength|IS_SG64_ADDR; 580 sg64s_size += sizeof(struct SG64ENTRY); 581 psge += sizeof(struct SG64ENTRY); 582 break; 583 } 584 } 585 arccdbsize += sg64s_size; 586 } 587 cdb_sgcount++; 588 } 589 arcmsr_cdb->sgcount=(u_int8_t)cdb_sgcount; 590 arcmsr_cdb->DataLength=pcsio->dxfer_len; 591 if( arccdbsize > 256) { 592 arcmsr_cdb->Flags|=ARCMSR_CDB_FLAG_SGL_BSIZE; 593 } 594 } 595 return; 596 } 597 /* 598 ************************************************************************** 599 ************************************************************************** 600 */ 601 static void arcmsr_post_srb(struct AdapterControlBlock *acb, struct CommandControlBlock *srb) 602 { 603 u_int32_t cdb_shifted_phyaddr=(u_int32_t) srb->cdb_shifted_phyaddr; 604 struct ARCMSR_CDB * arcmsr_cdb=(struct ARCMSR_CDB *)&srb->arcmsr_cdb; 605 606 bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, 607 (srb->srb_flags & SRB_FLAG_WRITE) ? BUS_DMASYNC_POSTWRITE:BUS_DMASYNC_POSTREAD); 608 atomic_add_int(&acb->srboutstandingcount, 1); 609 srb->startdone=ARCMSR_SRB_START; 610 if(arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) { 611 CHIP_REG_WRITE32(inbound_queueport, cdb_shifted_phyaddr|ARCMSR_SRBPOST_FLAG_SGL_BSIZE); 612 } else { 613 CHIP_REG_WRITE32(inbound_queueport, cdb_shifted_phyaddr); 614 } 615 return; 616 } 617 /* 618 ********************************************************************** 619 ********************************************************************** 620 */ 621 static void arcmsr_post_Qbuffer(struct AdapterControlBlock *acb) 622 { 623 u_int8_t * pQbuffer; 624 struct QBUFFER * pwbuffer=(struct QBUFFER *)&acb->pmu->message_wbuffer; 625 u_int8_t * iop_data=(u_int8_t *)pwbuffer->data; 626 u_int32_t allxfer_len=0; 627 628 if(acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { 629 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 630 while((acb->wqbuf_firstindex!=acb->wqbuf_lastindex) && (allxfer_len<124)) { 631 pQbuffer= &acb->wqbuffer[acb->wqbuf_firstindex]; 632 memcpy(iop_data, pQbuffer, 1); 633 acb->wqbuf_firstindex++; 634 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 635 /*if last index number set it to 0 */ 636 iop_data++; 637 allxfer_len++; 638 } 639 pwbuffer->data_len=allxfer_len; 640 /* 641 ** push inbound doorbell and wait reply at hwinterrupt routine for next Qbuffer post 642 */ 643 CHIP_REG_WRITE32(inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK); 644 } 645 return; 646 } 647 /* 648 ************************************************************************ 649 ************************************************************************ 650 */ 651 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb) 652 { 653 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 654 CHIP_REG_WRITE32(inbound_msgaddr0, ARCMSR_INBOUND_MESG0_STOP_BGRB); 655 if(arcmsr_wait_msgint_ready(acb)) { 656 printf("arcmsr%d: wait 'stop adapter rebulid' timeout \n" 657 , acb->pci_unit); 658 } 659 return; 660 } 661 /* 662 ************************************************************************ 663 ************************************************************************ 664 */ 665 static void arcmsr_poll(struct cam_sim * psim) 666 { 667 arcmsr_interrupt(cam_sim_softc(psim)); 668 return; 669 } 670 /* 671 ********************************************************************** 672 ********************************************************************** 673 */ 674 static void arcmsr_interrupt(void *arg) 675 { 676 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)arg; 677 struct CommandControlBlock *srb; 678 u_int32_t flag_srb, outbound_intstatus, outbound_doorbell; 679 680 /* 681 ********************************************* 682 ** check outbound intstatus 683 ********************************************* 684 */ 685 outbound_intstatus=CHIP_REG_READ32(outbound_intstatus) & acb->outbound_int_enable; 686 CHIP_REG_WRITE32(outbound_intstatus, outbound_intstatus);/*clear interrupt*/ 687 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) { 688 /* 689 ********************************************* 690 ** DOORBELL 691 ********************************************* 692 */ 693 outbound_doorbell=CHIP_REG_READ32(outbound_doorbell); 694 CHIP_REG_WRITE32(outbound_doorbell, outbound_doorbell);/*clear interrupt */ 695 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) { 696 struct QBUFFER * prbuffer=(struct QBUFFER *)&acb->pmu->message_rbuffer; 697 u_int8_t * iop_data=(u_int8_t *)prbuffer->data; 698 u_int8_t * pQbuffer; 699 u_int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex; 700 701 /*check this iop data if overflow my rqbuffer*/ 702 rqbuf_lastindex=acb->rqbuf_lastindex; 703 rqbuf_firstindex=acb->rqbuf_firstindex; 704 iop_len=prbuffer->data_len; 705 my_empty_len=(rqbuf_firstindex-rqbuf_lastindex-1)&(ARCMSR_MAX_QBUFFER-1); 706 if(my_empty_len>=iop_len) { 707 while(iop_len > 0) { 708 pQbuffer= &acb->rqbuffer[acb->rqbuf_lastindex]; 709 memcpy(pQbuffer, iop_data, 1); 710 acb->rqbuf_lastindex++; 711 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 712 /*if last index number set it to 0 */ 713 iop_data++; 714 iop_len--; 715 } 716 CHIP_REG_WRITE32(inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 717 /*signature, let IOP331 know data has been readed */ 718 } else { 719 acb->acb_flags|=ACB_F_IOPDATA_OVERFLOW; 720 } 721 } 722 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) { 723 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED; 724 /* 725 ********************************************* 726 ********************************************* 727 */ 728 if(acb->wqbuf_firstindex!=acb->wqbuf_lastindex) { 729 u_int8_t * pQbuffer; 730 struct QBUFFER * pwbuffer=(struct QBUFFER *)&acb->pmu->message_wbuffer; 731 u_int8_t * iop_data=(u_int8_t *)pwbuffer->data; 732 u_int32_t allxfer_len=0; 733 734 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 735 while((acb->wqbuf_firstindex!=acb->wqbuf_lastindex) && (allxfer_len<124)) { 736 pQbuffer= &acb->wqbuffer[acb->wqbuf_firstindex]; 737 memcpy(iop_data, pQbuffer, 1); 738 acb->wqbuf_firstindex++; 739 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 740 /*if last index number set it to 0 */ 741 iop_data++; 742 allxfer_len++; 743 } 744 pwbuffer->data_len=allxfer_len; 745 /* 746 ** push inbound doorbell tell iop driver data write ok 747 ** and wait reply on next hwinterrupt for next Qbuffer post 748 */ 749 CHIP_REG_WRITE32(inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK); 750 } 751 if(acb->wqbuf_firstindex==acb->wqbuf_lastindex) { 752 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED; 753 } 754 } 755 } 756 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) { 757 int target, lun; 758 /* 759 ***************************************************************************** 760 ** areca cdb command done 761 ***************************************************************************** 762 */ 763 bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 764 while(1) { 765 if((flag_srb=CHIP_REG_READ32(outbound_queueport)) == 0xFFFFFFFF) { 766 break;/*chip FIFO no srb for completion already*/ 767 } 768 /* check if command done with no error*/ 769 srb=(struct CommandControlBlock *)(acb->vir2phy_offset+(flag_srb << 5)); 770 /*frame must be 32 bytes aligned*/ 771 if((srb->acb!=acb) || (srb->startdone!=ARCMSR_SRB_START)) { 772 if(srb->startdone==ARCMSR_SRB_ABORTED) { 773 printf("arcmsr%d: srb='%p' isr got aborted command \n" 774 , acb->pci_unit, srb); 775 srb->pccb->ccb_h.status |= CAM_REQ_ABORTED; 776 arcmsr_srb_complete(srb, 1); 777 continue; 778 } 779 printf("arcmsr%d: isr get an illegal srb command done" 780 "acb='%p' srb='%p' srbacb='%p' startdone=0x%x" 781 "srboutstandingcount=%d \n", 782 acb->pci_unit, acb, srb, srb->acb, 783 srb->startdone, acb->srboutstandingcount); 784 continue; 785 } 786 target=srb->pccb->ccb_h.target_id; 787 lun=srb->pccb->ccb_h.target_lun; 788 if((flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR)==0) { 789 if(acb->devstate[target][lun]==ARECA_RAID_GONE) { 790 acb->devstate[target][lun]=ARECA_RAID_GOOD; 791 } 792 srb->pccb->ccb_h.status |= CAM_REQ_CMP; 793 arcmsr_srb_complete(srb, 1); 794 } else { 795 switch(srb->arcmsr_cdb.DeviceStatus) { 796 case ARCMSR_DEV_SELECT_TIMEOUT: { 797 acb->devstate[target][lun]=ARECA_RAID_GONE; 798 srb->pccb->ccb_h.status |= CAM_SEL_TIMEOUT; 799 arcmsr_srb_complete(srb, 1); 800 } 801 break; 802 case ARCMSR_DEV_ABORTED: 803 case ARCMSR_DEV_INIT_FAIL: { 804 acb->devstate[target][lun]=ARECA_RAID_GONE; 805 srb->pccb->ccb_h.status |= CAM_DEV_NOT_THERE; 806 arcmsr_srb_complete(srb, 1); 807 } 808 break; 809 case SCSISTAT_CHECK_CONDITION: { 810 acb->devstate[target][lun]=ARECA_RAID_GOOD; 811 arcmsr_report_sense_info(srb); 812 arcmsr_srb_complete(srb, 1); 813 } 814 break; 815 default: 816 printf("arcmsr%d: scsi id=%d lun=%d" 817 "isr get command error done," 818 "but got unknow DeviceStatus=0x%x \n" 819 , acb->pci_unit, target, lun 820 ,srb->arcmsr_cdb.DeviceStatus); 821 acb->devstate[target][lun]=ARECA_RAID_GONE; 822 srb->pccb->ccb_h.status |= CAM_UNCOR_PARITY; 823 /*unknow error or crc error just for retry*/ 824 arcmsr_srb_complete(srb, 1); 825 break; 826 } 827 } 828 } /*drain reply FIFO*/ 829 } 830 return; 831 } 832 /* 833 ******************************************************************************* 834 ** 835 ******************************************************************************* 836 */ 837 static void arcmsr_iop_parking(struct AdapterControlBlock *acb) 838 { 839 if(acb!=NULL) { 840 /* stop adapter background rebuild */ 841 if(acb->acb_flags & ACB_F_MSG_START_BGRB) { 842 arcmsr_stop_adapter_bgrb(acb); 843 arcmsr_flush_adapter_cache(acb); 844 } 845 } 846 } 847 /* 848 *********************************************************************** 849 ** 850 ************************************************************************ 851 */ 852 u_int32_t arcmsr_iop_ioctlcmd(struct AdapterControlBlock *acb, u_int32_t ioctl_cmd, caddr_t arg) 853 { 854 struct CMD_MESSAGE_FIELD * pcmdmessagefld; 855 u_int32_t retvalue=EINVAL; 856 857 pcmdmessagefld=(struct CMD_MESSAGE_FIELD *) arg; 858 if(memcmp(pcmdmessagefld->cmdmessage.Signature, "ARCMSR", 6)!=0) { 859 return retvalue; 860 } 861 ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock); 862 switch(ioctl_cmd) { 863 case ARCMSR_MESSAGE_READ_RQBUFFER: { 864 u_int8_t * pQbuffer; 865 u_int8_t * ptmpQbuffer=pcmdmessagefld->messagedatabuffer; 866 u_int32_t allxfer_len=0; 867 868 while((acb->rqbuf_firstindex!=acb->rqbuf_lastindex) && (allxfer_len<1031)) { 869 /*copy READ QBUFFER to srb*/ 870 pQbuffer= &acb->rqbuffer[acb->rqbuf_firstindex]; 871 memcpy(ptmpQbuffer, pQbuffer, 1); 872 acb->rqbuf_firstindex++; 873 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 874 /*if last index number set it to 0 */ 875 ptmpQbuffer++; 876 allxfer_len++; 877 } 878 if(acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 879 struct QBUFFER * prbuffer=(struct QBUFFER *)&acb->pmu->message_rbuffer; 880 u_int8_t * iop_data=(u_int8_t *)prbuffer->data; 881 u_int32_t iop_len; 882 883 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 884 iop_len=(u_int32_t)prbuffer->data_len; 885 /*this iop data does no chance to make me overflow again here, so just do it*/ 886 while(iop_len>0) { 887 pQbuffer= &acb->rqbuffer[acb->rqbuf_lastindex]; 888 memcpy(pQbuffer, iop_data, 1); 889 acb->rqbuf_lastindex++; 890 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 891 /*if last index number set it to 0 */ 892 iop_data++; 893 iop_len--; 894 } 895 CHIP_REG_WRITE32(inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 896 /*signature, let IOP331 know data has been readed */ 897 } 898 pcmdmessagefld->cmdmessage.Length=allxfer_len; 899 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_OK; 900 retvalue=ARCMSR_MESSAGE_SUCCESS; 901 } 902 break; 903 case ARCMSR_MESSAGE_WRITE_WQBUFFER: { 904 u_int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex; 905 u_int8_t * pQbuffer; 906 u_int8_t * ptmpuserbuffer=pcmdmessagefld->messagedatabuffer; 907 908 user_len=pcmdmessagefld->cmdmessage.Length; 909 /*check if data xfer length of this request will overflow my array qbuffer */ 910 wqbuf_lastindex=acb->wqbuf_lastindex; 911 wqbuf_firstindex=acb->wqbuf_firstindex; 912 if(wqbuf_lastindex!=wqbuf_firstindex) { 913 arcmsr_post_Qbuffer(acb); 914 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_ERROR; 915 } else { 916 my_empty_len=(wqbuf_firstindex-wqbuf_lastindex-1)&(ARCMSR_MAX_QBUFFER-1); 917 if(my_empty_len>=user_len) { 918 while(user_len>0) { 919 /*copy srb data to wqbuffer*/ 920 pQbuffer= &acb->wqbuffer[acb->wqbuf_lastindex]; 921 memcpy(pQbuffer, ptmpuserbuffer, 1); 922 acb->wqbuf_lastindex++; 923 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 924 /*if last index number set it to 0 */ 925 ptmpuserbuffer++; 926 user_len--; 927 } 928 /*post fist Qbuffer*/ 929 if(acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { 930 acb->acb_flags &=~ACB_F_MESSAGE_WQBUFFER_CLEARED; 931 arcmsr_post_Qbuffer(acb); 932 } 933 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_OK; 934 } else { 935 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_ERROR; 936 } 937 } 938 retvalue=ARCMSR_MESSAGE_SUCCESS; 939 } 940 break; 941 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { 942 u_int8_t * pQbuffer=acb->rqbuffer; 943 944 if(acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 945 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 946 CHIP_REG_WRITE32(inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 947 /*signature, let IOP331 know data has been readed */ 948 } 949 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; 950 acb->rqbuf_firstindex=0; 951 acb->rqbuf_lastindex=0; 952 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 953 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_OK; 954 retvalue=ARCMSR_MESSAGE_SUCCESS; 955 } 956 break; 957 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: 958 { 959 u_int8_t * pQbuffer=acb->wqbuffer; 960 961 if(acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 962 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 963 CHIP_REG_WRITE32(inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 964 /*signature, let IOP331 know data has been readed */ 965 } 966 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED|ACB_F_MESSAGE_WQBUFFER_READED); 967 acb->wqbuf_firstindex=0; 968 acb->wqbuf_lastindex=0; 969 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 970 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_OK; 971 retvalue=ARCMSR_MESSAGE_SUCCESS; 972 } 973 break; 974 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { 975 u_int8_t * pQbuffer; 976 977 if(acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 978 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 979 CHIP_REG_WRITE32(inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 980 /*signature, let IOP331 know data has been readed */ 981 } 982 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED 983 |ACB_F_MESSAGE_RQBUFFER_CLEARED 984 |ACB_F_MESSAGE_WQBUFFER_READED); 985 acb->rqbuf_firstindex=0; 986 acb->rqbuf_lastindex=0; 987 acb->wqbuf_firstindex=0; 988 acb->wqbuf_lastindex=0; 989 pQbuffer=acb->rqbuffer; 990 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 991 pQbuffer=acb->wqbuffer; 992 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 993 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_OK; 994 retvalue=ARCMSR_MESSAGE_SUCCESS; 995 } 996 break; 997 case ARCMSR_MESSAGE_REQUEST_RETURNCODE_3F: { 998 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_3F; 999 retvalue=ARCMSR_MESSAGE_SUCCESS; 1000 } 1001 break; 1002 case ARCMSR_MESSAGE_SAY_HELLO: { 1003 u_int8_t * hello_string="Hello! I am ARCMSR"; 1004 u_int8_t * puserbuffer=(u_int8_t *)pcmdmessagefld->messagedatabuffer; 1005 1006 if(memcpy(puserbuffer, hello_string, (int16_t)strlen(hello_string))) { 1007 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_ERROR; 1008 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock); 1009 return ENOIOCTL; 1010 } 1011 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_OK; 1012 retvalue=ARCMSR_MESSAGE_SUCCESS; 1013 } 1014 break; 1015 case ARCMSR_MESSAGE_SAY_GOODBYE: { 1016 arcmsr_iop_parking(acb); 1017 retvalue=ARCMSR_MESSAGE_SUCCESS; 1018 } 1019 break; 1020 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: { 1021 arcmsr_flush_adapter_cache(acb); 1022 retvalue=ARCMSR_MESSAGE_SUCCESS; 1023 } 1024 break; 1025 } 1026 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock); 1027 return retvalue; 1028 } 1029 /* 1030 ************************************************************************** 1031 ************************************************************************** 1032 */ 1033 struct CommandControlBlock * arcmsr_get_freesrb(struct AdapterControlBlock *acb) 1034 { 1035 struct CommandControlBlock *srb=NULL; 1036 u_int32_t workingsrb_startindex, workingsrb_doneindex; 1037 1038 ARCMSR_LOCK_ACQUIRE(&acb->workingQ_start_lock); 1039 workingsrb_doneindex=acb->workingsrb_doneindex; 1040 workingsrb_startindex=acb->workingsrb_startindex; 1041 srb=acb->srbworkingQ[workingsrb_startindex]; 1042 workingsrb_startindex++; 1043 workingsrb_startindex %= ARCMSR_MAX_FREESRB_NUM; 1044 if(workingsrb_doneindex!=workingsrb_startindex) { 1045 acb->workingsrb_startindex=workingsrb_startindex; 1046 } else { 1047 srb=NULL; 1048 } 1049 ARCMSR_LOCK_RELEASE(&acb->workingQ_start_lock); 1050 return(srb); 1051 } 1052 /* 1053 ************************************************************************** 1054 ************************************************************************** 1055 */ 1056 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, union ccb * pccb) 1057 { 1058 struct CMD_MESSAGE_FIELD * pcmdmessagefld; 1059 int retvalue = 0, transfer_len = 0; 1060 char *buffer; 1061 uint32_t controlcode = (uint32_t ) pccb->csio.cdb_io.cdb_bytes[5] << 24 | 1062 (uint32_t ) pccb->csio.cdb_io.cdb_bytes[6] << 16 | 1063 (uint32_t ) pccb->csio.cdb_io.cdb_bytes[7] << 8 | 1064 (uint32_t ) pccb->csio.cdb_io.cdb_bytes[8]; 1065 /* 4 bytes: Areca io control code */ 1066 if((pccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) { 1067 buffer = pccb->csio.data_ptr; 1068 transfer_len = pccb->csio.dxfer_len; 1069 } else { 1070 retvalue = ARCMSR_MESSAGE_FAIL; 1071 goto message_out; 1072 } 1073 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) { 1074 retvalue = ARCMSR_MESSAGE_FAIL; 1075 goto message_out; 1076 } 1077 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer; 1078 switch(controlcode) { 1079 case ARCMSR_MESSAGE_READ_RQBUFFER: { 1080 u_int8_t *pQbuffer; 1081 u_int8_t *ptmpQbuffer=pcmdmessagefld->messagedatabuffer; 1082 int32_t allxfer_len = 0; 1083 1084 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex) 1085 && (allxfer_len < 1031)) { 1086 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex]; 1087 memcpy(ptmpQbuffer, pQbuffer, 1); 1088 acb->rqbuf_firstindex++; 1089 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 1090 ptmpQbuffer++; 1091 allxfer_len++; 1092 } 1093 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1094 struct QBUFFER *prbuffer = (struct QBUFFER *) &acb->pmu->message_rbuffer; 1095 u_int8_t *iop_data = (u_int8_t *)prbuffer->data; 1096 int32_t iop_len; 1097 1098 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1099 iop_len =(u_int32_t)prbuffer->data_len; 1100 while (iop_len > 0) { 1101 pQbuffer= &acb->rqbuffer[acb->rqbuf_lastindex]; 1102 memcpy(pQbuffer, iop_data, 1); 1103 acb->rqbuf_lastindex++; 1104 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1105 iop_data++; 1106 iop_len--; 1107 } 1108 CHIP_REG_WRITE32(inbound_doorbell, 1109 ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 1110 } 1111 pcmdmessagefld->cmdmessage.Length = allxfer_len; 1112 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; 1113 retvalue=ARCMSR_MESSAGE_SUCCESS; 1114 } 1115 break; 1116 case ARCMSR_MESSAGE_WRITE_WQBUFFER: { 1117 int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex; 1118 u_int8_t *pQbuffer; 1119 u_int8_t *ptmpuserbuffer=pcmdmessagefld->messagedatabuffer; 1120 1121 user_len = pcmdmessagefld->cmdmessage.Length; 1122 wqbuf_lastindex = acb->wqbuf_lastindex; 1123 wqbuf_firstindex = acb->wqbuf_firstindex; 1124 if (wqbuf_lastindex != wqbuf_firstindex) { 1125 arcmsr_post_Qbuffer(acb); 1126 /* has error report sensedata */ 1127 if(&pccb->csio.sense_data) { 1128 ((u_int8_t *)&pccb->csio.sense_data)[0] = (0x1 << 7 | 0x70); 1129 /* Valid,ErrorCode */ 1130 ((u_int8_t *)&pccb->csio.sense_data)[2] = 0x05; 1131 /* FileMark,EndOfMedia,IncorrectLength,Reserved,SenseKey */ 1132 ((u_int8_t *)&pccb->csio.sense_data)[7] = 0x0A; 1133 /* AdditionalSenseLength */ 1134 ((u_int8_t *)&pccb->csio.sense_data)[12] = 0x20; 1135 /* AdditionalSenseCode */ 1136 } 1137 retvalue = ARCMSR_MESSAGE_FAIL; 1138 } else { 1139 my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1) 1140 &(ARCMSR_MAX_QBUFFER - 1); 1141 if (my_empty_len >= user_len) { 1142 while (user_len > 0) { 1143 pQbuffer = &acb->wqbuffer[acb->wqbuf_lastindex]; 1144 memcpy(pQbuffer, ptmpuserbuffer, 1); 1145 acb->wqbuf_lastindex++; 1146 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1147 ptmpuserbuffer++; 1148 user_len--; 1149 } 1150 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { 1151 acb->acb_flags &= 1152 ~ACB_F_MESSAGE_WQBUFFER_CLEARED; 1153 arcmsr_post_Qbuffer(acb); 1154 } 1155 } else { 1156 /* has error report sensedata */ 1157 if(&pccb->csio.sense_data) { 1158 ((u_int8_t *)&pccb->csio.sense_data)[0] = (0x1 << 7 | 0x70); 1159 /* Valid,ErrorCode */ 1160 ((u_int8_t *)&pccb->csio.sense_data)[2] = 0x05; 1161 /* FileMark,EndOfMedia,IncorrectLength,Reserved,SenseKey */ 1162 ((u_int8_t *)&pccb->csio.sense_data)[7] = 0x0A; 1163 /* AdditionalSenseLength */ 1164 ((u_int8_t *)&pccb->csio.sense_data)[12] = 0x20; 1165 /* AdditionalSenseCode */ 1166 } 1167 retvalue = ARCMSR_MESSAGE_FAIL; 1168 } 1169 } 1170 } 1171 break; 1172 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { 1173 u_int8_t *pQbuffer = acb->rqbuffer; 1174 1175 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1176 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1177 CHIP_REG_WRITE32(inbound_doorbell 1178 , ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 1179 } 1180 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; 1181 acb->rqbuf_firstindex = 0; 1182 acb->rqbuf_lastindex = 0; 1183 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1184 pcmdmessagefld->cmdmessage.ReturnCode = 1185 ARCMSR_MESSAGE_RETURNCODE_OK; 1186 } 1187 break; 1188 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: { 1189 u_int8_t *pQbuffer = acb->wqbuffer; 1190 1191 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1192 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1193 CHIP_REG_WRITE32(inbound_doorbell 1194 , ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 1195 } 1196 acb->acb_flags |= 1197 (ACB_F_MESSAGE_WQBUFFER_CLEARED | 1198 ACB_F_MESSAGE_WQBUFFER_READED); 1199 acb->wqbuf_firstindex = 0; 1200 acb->wqbuf_lastindex = 0; 1201 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1202 pcmdmessagefld->cmdmessage.ReturnCode = 1203 ARCMSR_MESSAGE_RETURNCODE_OK; 1204 } 1205 break; 1206 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { 1207 u_int8_t *pQbuffer; 1208 1209 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1210 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1211 CHIP_REG_WRITE32(inbound_doorbell 1212 , ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 1213 } 1214 acb->acb_flags |= 1215 (ACB_F_MESSAGE_WQBUFFER_CLEARED 1216 | ACB_F_MESSAGE_RQBUFFER_CLEARED 1217 | ACB_F_MESSAGE_WQBUFFER_READED); 1218 acb->rqbuf_firstindex = 0; 1219 acb->rqbuf_lastindex = 0; 1220 acb->wqbuf_firstindex = 0; 1221 acb->wqbuf_lastindex = 0; 1222 pQbuffer = acb->rqbuffer; 1223 memset(pQbuffer, 0, sizeof (struct QBUFFER)); 1224 pQbuffer = acb->wqbuffer; 1225 memset(pQbuffer, 0, sizeof (struct QBUFFER)); 1226 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; 1227 } 1228 break; 1229 case ARCMSR_MESSAGE_REQUEST_RETURNCODE_3F: { 1230 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_3F; 1231 } 1232 break; 1233 case ARCMSR_MESSAGE_SAY_HELLO: { 1234 int8_t * hello_string = "Hello! I am ARCMSR"; 1235 1236 memcpy(pcmdmessagefld->messagedatabuffer, hello_string 1237 , (int16_t)strlen(hello_string)); 1238 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; 1239 } 1240 break; 1241 case ARCMSR_MESSAGE_SAY_GOODBYE: 1242 arcmsr_iop_parking(acb); 1243 break; 1244 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: 1245 arcmsr_flush_adapter_cache(acb); 1246 break; 1247 default: 1248 retvalue = ARCMSR_MESSAGE_FAIL; 1249 } 1250 message_out: 1251 return retvalue; 1252 } 1253 /* 1254 ********************************************************************* 1255 ********************************************************************* 1256 */ 1257 static void arcmsr_executesrb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 1258 { 1259 struct CommandControlBlock *srb=(struct CommandControlBlock *)arg; 1260 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)srb->acb; 1261 union ccb * pccb; 1262 int target, lun; 1263 1264 pccb=srb->pccb; 1265 target=pccb->ccb_h.target_id; 1266 lun=pccb->ccb_h.target_lun; 1267 if(error != 0) { 1268 if(error != EFBIG) { 1269 printf("arcmsr%d: unexpected error %x returned from 'bus_dmamap_load' \n" 1270 , acb->pci_unit, error); 1271 } 1272 if((pccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) { 1273 xpt_freeze_devq(pccb->ccb_h.path, /*count*/1); 1274 pccb->ccb_h.status |= (CAM_REQ_TOO_BIG|CAM_DEV_QFRZN); 1275 } 1276 arcmsr_srb_complete(srb, 0); 1277 return; 1278 } 1279 if(nseg > ARCMSR_MAX_SG_ENTRIES) { 1280 pccb->ccb_h.status |= CAM_REQ_TOO_BIG; 1281 arcmsr_srb_complete(srb, 0); 1282 return; 1283 } 1284 if(acb->acb_flags & ACB_F_BUS_RESET) { 1285 printf("arcmsr%d: bus reset and return busy \n", acb->pci_unit); 1286 pccb->ccb_h.status |= CAM_SCSI_BUS_RESET; 1287 arcmsr_srb_complete(srb, 0); 1288 return; 1289 } 1290 if(acb->devstate[target][lun]==ARECA_RAID_GONE) { 1291 u_int8_t block_cmd; 1292 1293 block_cmd=pccb->csio.cdb_io.cdb_bytes[0] & 0x0f; 1294 if(block_cmd==0x08 || block_cmd==0x0a) { 1295 printf("arcmsr%d:block 'read/write' command" 1296 "with gone raid volume Cmd=%2x, TargetId=%d, Lun=%d \n" 1297 , acb->pci_unit, block_cmd, target, lun); 1298 pccb->ccb_h.status |= CAM_DEV_NOT_THERE; 1299 arcmsr_srb_complete(srb, 0); 1300 return; 1301 } 1302 } 1303 if((pccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) { 1304 if(nseg != 0) { 1305 bus_dmamap_unload(acb->dm_segs_dmat, srb->dm_segs_dmamap); 1306 } 1307 arcmsr_srb_complete(srb, 0); 1308 return; 1309 } 1310 pccb->ccb_h.status |= CAM_SIM_QUEUED; 1311 if(acb->srboutstandingcount >= ARCMSR_MAX_OUTSTANDING_CMD) { 1312 pccb->ccb_h.status &= ~CAM_STATUS_MASK; 1313 pccb->ccb_h.status |= (CAM_REQUEUE_REQ|CAM_DEV_QFRZN); 1314 acb->acb_flags |= ACB_F_CAM_DEV_QFRZN; 1315 arcmsr_srb_complete(srb, 0); 1316 return; 1317 } 1318 arcmsr_build_srb(srb, dm_segs, nseg); 1319 arcmsr_post_srb(acb, srb); 1320 return; 1321 } 1322 /* 1323 ***************************************************************************************** 1324 ***************************************************************************************** 1325 */ 1326 static u_int8_t arcmsr_seek_cmd2abort(union ccb * abortccb) 1327 { 1328 struct CommandControlBlock *srb; 1329 struct AdapterControlBlock *acb=(struct AdapterControlBlock *) abortccb->ccb_h.arcmsr_ccbacb_ptr; 1330 u_int32_t intmask_org, mask; 1331 int i=0; 1332 1333 acb->num_aborts++; 1334 /* 1335 *************************************************************************** 1336 ** It is the upper layer do abort command this lock just prior to calling us. 1337 ** First determine if we currently own this command. 1338 ** Start by searching the device queue. If not found 1339 ** at all, and the system wanted us to just abort the 1340 ** command return success. 1341 *************************************************************************** 1342 */ 1343 if(acb->srboutstandingcount!=0) { 1344 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++) { 1345 srb=acb->psrb_pool[i]; 1346 if(srb->startdone==ARCMSR_SRB_START) { 1347 if(srb->pccb==abortccb) { 1348 srb->startdone=ARCMSR_SRB_ABORTED; 1349 printf("arcmsr%d:scsi id=%d lun=%d abort srb '%p'" 1350 "outstanding command \n" 1351 , acb->pci_unit, abortccb->ccb_h.target_id 1352 , abortccb->ccb_h.target_lun, srb); 1353 goto abort_outstanding_cmd; 1354 } 1355 } 1356 } 1357 } 1358 return(FALSE); 1359 abort_outstanding_cmd: 1360 /* do not talk to iop 331 abort command */ 1361 UDELAY(3000*1000);/*wait for 3 sec for all command done*/ 1362 /* disable all outbound interrupt */ 1363 intmask_org=CHIP_REG_READ32(outbound_intmask); 1364 CHIP_REG_WRITE32(outbound_intmask, intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE); 1365 arcmsr_polling_srbdone(acb, srb); 1366 /* enable all outbound interrupt */ 1367 mask=~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE|ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE); 1368 CHIP_REG_WRITE32(outbound_intmask, intmask_org & mask); 1369 return (TRUE); 1370 } 1371 /* 1372 **************************************************************************** 1373 **************************************************************************** 1374 */ 1375 static void arcmsr_bus_reset(struct AdapterControlBlock *acb) 1376 { 1377 int retry=0; 1378 1379 acb->num_resets++; 1380 acb->acb_flags |=ACB_F_BUS_RESET; 1381 while(acb->srboutstandingcount!=0 && retry < 400) { 1382 arcmsr_interrupt((void *)acb); 1383 UDELAY(25000); 1384 retry++; 1385 } 1386 arcmsr_iop_reset(acb); 1387 acb->acb_flags &= ~ACB_F_BUS_RESET; 1388 return; 1389 } 1390 /* 1391 ************************************************************************** 1392 ************************************************************************** 1393 */ 1394 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb, 1395 union ccb * pccb) 1396 { 1397 pccb->ccb_h.status |= CAM_REQ_CMP; 1398 switch (pccb->csio.cdb_io.cdb_bytes[0]) { 1399 case INQUIRY: { 1400 unsigned char inqdata[36]; 1401 char *buffer=pccb->csio.data_ptr;; 1402 1403 if (pccb->ccb_h.target_lun) { 1404 pccb->ccb_h.status |= CAM_SEL_TIMEOUT; 1405 xpt_done(pccb); 1406 return; 1407 } 1408 inqdata[0] = T_PROCESSOR; 1409 /* Periph Qualifier & Periph Dev Type */ 1410 inqdata[1] = 0; 1411 /* rem media bit & Dev Type Modifier */ 1412 inqdata[2] = 0; 1413 /* ISO, ECMA, & ANSI versions */ 1414 inqdata[4] = 31; 1415 /* length of additional data */ 1416 strncpy(&inqdata[8], "Areca ", 8); 1417 /* Vendor Identification */ 1418 strncpy(&inqdata[16], "RAID controller ", 16); 1419 /* Product Identification */ 1420 strncpy(&inqdata[32], "R001", 4); /* Product Revision */ 1421 memcpy(buffer, inqdata, sizeof(inqdata)); 1422 xpt_done(pccb); 1423 } 1424 break; 1425 case WRITE_BUFFER: 1426 case READ_BUFFER: { 1427 if (arcmsr_iop_message_xfer(acb, pccb)) { 1428 pccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1429 pccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1430 } 1431 xpt_done(pccb); 1432 } 1433 break; 1434 default: 1435 xpt_done(pccb); 1436 } 1437 } 1438 /* 1439 ********************************************************************* 1440 ********************************************************************* 1441 */ 1442 static void arcmsr_action(struct cam_sim * psim, union ccb * pccb) 1443 { 1444 struct AdapterControlBlock * acb; 1445 1446 acb=(struct AdapterControlBlock *) cam_sim_softc(psim); 1447 if(acb==NULL) { 1448 pccb->ccb_h.status |= CAM_REQ_INVALID; 1449 xpt_done(pccb); 1450 return; 1451 } 1452 switch (pccb->ccb_h.func_code) { 1453 case XPT_SCSI_IO: { 1454 struct CommandControlBlock *srb; 1455 int target=pccb->ccb_h.target_id; 1456 1457 if(target == 16) { 1458 /* virtual device for iop message transfer */ 1459 arcmsr_handle_virtual_command(acb, pccb); 1460 return; 1461 } 1462 if((srb=arcmsr_get_freesrb(acb)) == NULL) { 1463 pccb->ccb_h.status |= CAM_RESRC_UNAVAIL; 1464 xpt_done(pccb); 1465 return; 1466 } 1467 pccb->ccb_h.arcmsr_ccbsrb_ptr=srb; 1468 pccb->ccb_h.arcmsr_ccbacb_ptr=acb; 1469 srb->pccb=pccb; 1470 if((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1471 if(!(pccb->ccb_h.flags & CAM_SCATTER_VALID)) { 1472 /* Single buffer */ 1473 if(!(pccb->ccb_h.flags & CAM_DATA_PHYS)) { 1474 /* Buffer is virtual */ 1475 u_int32_t error, s; 1476 1477 s=splsoftvm(); 1478 error = bus_dmamap_load(acb->dm_segs_dmat 1479 , srb->dm_segs_dmamap 1480 , pccb->csio.data_ptr 1481 , pccb->csio.dxfer_len 1482 , arcmsr_executesrb, srb, /*flags*/0); 1483 if(error == EINPROGRESS) { 1484 xpt_freeze_simq(acb->psim, 1); 1485 pccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1486 } 1487 splx(s); 1488 } else { 1489 /* Buffer is physical */ 1490 panic("arcmsr: CAM_DATA_PHYS not supported"); 1491 } 1492 } else { 1493 /* Scatter/gather list */ 1494 struct bus_dma_segment *segs; 1495 1496 if((pccb->ccb_h.flags & CAM_SG_LIST_PHYS) == 0 1497 || (pccb->ccb_h.flags & CAM_DATA_PHYS) != 0) { 1498 pccb->ccb_h.status |= CAM_PROVIDE_FAIL; 1499 xpt_done(pccb); 1500 free(srb, M_DEVBUF); 1501 return; 1502 } 1503 segs=(struct bus_dma_segment *)pccb->csio.data_ptr; 1504 arcmsr_executesrb(srb, segs, pccb->csio.sglist_cnt, 0); 1505 } 1506 } else { 1507 arcmsr_executesrb(srb, NULL, 0, 0); 1508 } 1509 break; 1510 } 1511 case XPT_TARGET_IO: { 1512 /* target mode not yet support vendor specific commands. */ 1513 pccb->ccb_h.status |= CAM_REQ_CMP; 1514 xpt_done(pccb); 1515 break; 1516 } 1517 case XPT_PATH_INQ: { 1518 struct ccb_pathinq *cpi= &pccb->cpi; 1519 1520 cpi->version_num=1; 1521 cpi->hba_inquiry=PI_SDTR_ABLE | PI_TAG_ABLE; 1522 cpi->target_sprt=0; 1523 cpi->hba_misc=0; 1524 cpi->hba_eng_cnt=0; 1525 cpi->max_target=ARCMSR_MAX_TARGETID; /* 0-16 */ 1526 cpi->max_lun=ARCMSR_MAX_TARGETLUN; /* 0-7 */ 1527 cpi->initiator_id=ARCMSR_SCSI_INITIATOR_ID; /* 255 */ 1528 cpi->bus_id=cam_sim_bus(psim); 1529 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1530 strncpy(cpi->hba_vid, "ARCMSR", HBA_IDLEN); 1531 strncpy(cpi->dev_name, cam_sim_name(psim), DEV_IDLEN); 1532 cpi->unit_number=cam_sim_unit(psim); 1533 cpi->transport = XPORT_SPI; 1534 cpi->transport_version = 2; 1535 cpi->protocol = PROTO_SCSI; 1536 cpi->protocol_version = SCSI_REV_2; 1537 cpi->ccb_h.status |= CAM_REQ_CMP; 1538 xpt_done(pccb); 1539 break; 1540 } 1541 case XPT_ABORT: { 1542 union ccb *pabort_ccb; 1543 1544 pabort_ccb=pccb->cab.abort_ccb; 1545 switch (pabort_ccb->ccb_h.func_code) { 1546 case XPT_ACCEPT_TARGET_IO: 1547 case XPT_IMMED_NOTIFY: 1548 case XPT_CONT_TARGET_IO: 1549 if(arcmsr_seek_cmd2abort(pabort_ccb)==TRUE) { 1550 pabort_ccb->ccb_h.status |= CAM_REQ_ABORTED; 1551 xpt_done(pabort_ccb); 1552 pccb->ccb_h.status |= CAM_REQ_CMP; 1553 } else { 1554 xpt_print_path(pabort_ccb->ccb_h.path); 1555 printf("Not found\n"); 1556 pccb->ccb_h.status |= CAM_PATH_INVALID; 1557 } 1558 break; 1559 case XPT_SCSI_IO: 1560 pccb->ccb_h.status |= CAM_UA_ABORT; 1561 break; 1562 default: 1563 pccb->ccb_h.status |= CAM_REQ_INVALID; 1564 break; 1565 } 1566 xpt_done(pccb); 1567 break; 1568 } 1569 case XPT_RESET_BUS: 1570 case XPT_RESET_DEV: { 1571 u_int32_t i; 1572 1573 arcmsr_bus_reset(acb); 1574 for (i=0; i < 500; i++) { 1575 DELAY(1000); 1576 } 1577 pccb->ccb_h.status |= CAM_REQ_CMP; 1578 xpt_done(pccb); 1579 break; 1580 } 1581 case XPT_TERM_IO: { 1582 pccb->ccb_h.status |= CAM_REQ_INVALID; 1583 xpt_done(pccb); 1584 break; 1585 } 1586 case XPT_GET_TRAN_SETTINGS: { 1587 struct ccb_trans_settings *cts; 1588 struct ccb_trans_settings_scsi *scsi; 1589 struct ccb_trans_settings_spi *spi; 1590 1591 if(pccb->ccb_h.target_id == 16) { 1592 pccb->ccb_h.status |= CAM_FUNC_NOTAVAIL; 1593 xpt_done(pccb); 1594 break; 1595 } 1596 1597 cts= &pccb->cts; 1598 scsi = &cts->proto_specific.scsi; 1599 spi = &cts->xport_specific.spi; 1600 1601 cts->protocol = PROTO_SCSI; 1602 cts->protocol_version = SCSI_REV_2; 1603 cts->transport = XPORT_SPI; 1604 cts->transport_version = 2; 1605 spi->flags = CTS_SPI_FLAGS_DISC_ENB; 1606 spi->sync_period=3; 1607 spi->sync_offset=32; 1608 spi->bus_width=MSG_EXT_WDTR_BUS_16_BIT; 1609 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB; 1610 spi->valid = CTS_SPI_VALID_SYNC_RATE 1611 | CTS_SPI_VALID_SYNC_OFFSET 1612 | CTS_SPI_VALID_BUS_WIDTH; 1613 scsi->valid = CTS_SCSI_VALID_TQ; 1614 1615 pccb->ccb_h.status |= CAM_REQ_CMP; 1616 xpt_done(pccb); 1617 break; 1618 } 1619 case XPT_SET_TRAN_SETTINGS: { 1620 pccb->ccb_h.status |= CAM_FUNC_NOTAVAIL; 1621 xpt_done(pccb); 1622 break; 1623 } 1624 case XPT_CALC_GEOMETRY: { 1625 struct ccb_calc_geometry *ccg; 1626 u_int32_t size_mb; 1627 u_int32_t secs_per_cylinder; 1628 1629 if(pccb->ccb_h.target_id == 16) { 1630 pccb->ccb_h.status |= CAM_FUNC_NOTAVAIL; 1631 xpt_done(pccb); 1632 break; 1633 } 1634 ccg= &pccb->ccg; 1635 if (ccg->block_size == 0) { 1636 pccb->ccb_h.status = CAM_REQ_INVALID; 1637 xpt_done(pccb); 1638 break; 1639 } 1640 if(((1024L * 1024L)/ccg->block_size) < 0) { 1641 pccb->ccb_h.status = CAM_REQ_INVALID; 1642 xpt_done(pccb); 1643 break; 1644 } 1645 size_mb=ccg->volume_size/((1024L * 1024L)/ccg->block_size); 1646 if(size_mb > 1024 ) { 1647 ccg->heads=255; 1648 ccg->secs_per_track=63; 1649 } else { 1650 ccg->heads=64; 1651 ccg->secs_per_track=32; 1652 } 1653 secs_per_cylinder=ccg->heads * ccg->secs_per_track; 1654 ccg->cylinders=ccg->volume_size / secs_per_cylinder; 1655 pccb->ccb_h.status |= CAM_REQ_CMP; 1656 xpt_done(pccb); 1657 break; 1658 } 1659 default: 1660 pccb->ccb_h.status |= CAM_REQ_INVALID; 1661 xpt_done(pccb); 1662 break; 1663 } 1664 return; 1665 } 1666 /* 1667 ********************************************************************** 1668 ********************************************************************** 1669 */ 1670 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb) 1671 { 1672 acb->acb_flags |= ACB_F_MSG_START_BGRB; 1673 CHIP_REG_WRITE32(inbound_msgaddr0, ARCMSR_INBOUND_MESG0_START_BGRB); 1674 if(arcmsr_wait_msgint_ready(acb)) { 1675 printf("arcmsr%d: wait 'start adapter background rebulid' timeout \n", acb->pci_unit); 1676 } 1677 return; 1678 } 1679 /* 1680 ********************************************************************** 1681 ********************************************************************** 1682 */ 1683 static void arcmsr_polling_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb) 1684 { 1685 struct CommandControlBlock *srb; 1686 uint32_t flag_srb, outbound_intstatus, poll_srb_done=0, poll_count=0; 1687 int id, lun; 1688 1689 polling_srb_retry: 1690 poll_count++; 1691 outbound_intstatus=CHIP_REG_READ32(outbound_intstatus) & acb->outbound_int_enable; 1692 CHIP_REG_WRITE32(outbound_intstatus, outbound_intstatus);/*clear interrupt*/ 1693 while(1) { 1694 if((flag_srb=CHIP_REG_READ32(outbound_queueport))==0xFFFFFFFF) { 1695 if(poll_srb_done) { 1696 break;/*chip FIFO no ccb for completion already*/ 1697 } else { 1698 UDELAY(25000); 1699 if(poll_count > 100) { 1700 break; 1701 } 1702 goto polling_srb_retry; 1703 } 1704 } 1705 /* check ifcommand done with no error*/ 1706 srb=(struct CommandControlBlock *)(acb->vir2phy_offset+(flag_srb << 5)); 1707 /*frame must be 32 bytes aligned*/ 1708 if((srb->acb!=acb) || (srb->startdone!=ARCMSR_SRB_START)) { 1709 if((srb->startdone==ARCMSR_SRB_ABORTED) && (srb==poll_srb)) { 1710 printf("arcmsr%d: scsi id=%d lun=%d srb='%p'" 1711 "poll command abort successfully \n" 1712 , acb->pci_unit 1713 , srb->pccb->ccb_h.target_id 1714 , srb->pccb->ccb_h.target_lun, srb); 1715 srb->pccb->ccb_h.status |= CAM_REQ_ABORTED; 1716 arcmsr_srb_complete(srb, 1); 1717 poll_srb_done=1; 1718 continue; 1719 } 1720 printf("arcmsr%d: polling get an illegal srb command done srb='%p'" 1721 "srboutstandingcount=%d \n" 1722 , acb->pci_unit 1723 , srb, acb->srboutstandingcount); 1724 continue; 1725 } 1726 id=srb->pccb->ccb_h.target_id; 1727 lun=srb->pccb->ccb_h.target_lun; 1728 if((flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR)==0) { 1729 if(acb->devstate[id][lun]==ARECA_RAID_GONE) { 1730 acb->devstate[id][lun]=ARECA_RAID_GOOD; 1731 } 1732 srb->pccb->ccb_h.status |= CAM_REQ_CMP; 1733 arcmsr_srb_complete(srb, 1); 1734 } else { 1735 switch(srb->arcmsr_cdb.DeviceStatus) { 1736 case ARCMSR_DEV_SELECT_TIMEOUT: { 1737 acb->devstate[id][lun]=ARECA_RAID_GONE; 1738 srb->pccb->ccb_h.status |= CAM_SEL_TIMEOUT; 1739 arcmsr_srb_complete(srb, 1); 1740 } 1741 break; 1742 case ARCMSR_DEV_ABORTED: 1743 case ARCMSR_DEV_INIT_FAIL: { 1744 acb->devstate[id][lun]=ARECA_RAID_GONE; 1745 srb->pccb->ccb_h.status |= CAM_DEV_NOT_THERE; 1746 arcmsr_srb_complete(srb, 1); 1747 } 1748 break; 1749 case SCSISTAT_CHECK_CONDITION: { 1750 acb->devstate[id][lun]=ARECA_RAID_GOOD; 1751 arcmsr_report_sense_info(srb); 1752 arcmsr_srb_complete(srb, 1); 1753 } 1754 break; 1755 default: 1756 printf("arcmsr%d: scsi id=%d lun=%d" 1757 "polling and getting command error done" 1758 ", but got unknow DeviceStatus=0x%x \n" 1759 , acb->pci_unit, id, lun, srb->arcmsr_cdb.DeviceStatus); 1760 acb->devstate[id][lun]=ARECA_RAID_GONE; 1761 srb->pccb->ccb_h.status |= CAM_UNCOR_PARITY; 1762 /*unknow error or crc error just for retry*/ 1763 arcmsr_srb_complete(srb, 1); 1764 break; 1765 } 1766 } 1767 } /*drain reply FIFO*/ 1768 return; 1769 } 1770 /* 1771 ********************************************************************** 1772 ** get firmware miscellaneous data 1773 ********************************************************************** 1774 */ 1775 static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) 1776 { 1777 char *acb_firm_model=acb->firm_model; 1778 char *acb_firm_version=acb->firm_version; 1779 size_t iop_firm_model=offsetof(struct MessageUnit,message_rwbuffer[15]); /*firm_model,15,60-67*/ 1780 size_t iop_firm_version=offsetof(struct MessageUnit,message_rwbuffer[17]); /*firm_version,17,68-83*/ 1781 int i; 1782 1783 CHIP_REG_WRITE32(inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); 1784 if(arcmsr_wait_msgint_ready(acb)) { 1785 printf("arcmsr%d: wait 'get adapter firmware miscellaneous data' timeout \n" 1786 , acb->pci_unit); 1787 } 1788 i=0; 1789 while(i<8) { 1790 *acb_firm_model=bus_space_read_1(acb->btag, acb->bhandle, iop_firm_model+i); 1791 /* 8 bytes firm_model, 15, 60-67*/ 1792 acb_firm_model++; 1793 i++; 1794 } 1795 i=0; 1796 while(i<16) { 1797 *acb_firm_version=bus_space_read_1(acb->btag, acb->bhandle, iop_firm_version+i); 1798 /* 16 bytes firm_version, 17, 68-83*/ 1799 acb_firm_version++; 1800 i++; 1801 } 1802 printf("ARECA RAID ADAPTER%d: %s \n", acb->pci_unit, ARCMSR_DRIVER_VERSION); 1803 printf("ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n", acb->pci_unit, acb->firm_version); 1804 acb->firm_request_len=CHIP_REG_READ32(message_rwbuffer[1]); /*firm_request_len, 1, 04-07*/ 1805 acb->firm_numbers_queue=CHIP_REG_READ32(message_rwbuffer[2]); /*firm_numbers_queue, 2, 08-11*/ 1806 acb->firm_sdram_size=CHIP_REG_READ32(message_rwbuffer[3]); /*firm_sdram_size, 3, 12-15*/ 1807 acb->firm_ide_channels=CHIP_REG_READ32(message_rwbuffer[4]); /*firm_ide_channels, 4, 16-19*/ 1808 return; 1809 } 1810 /* 1811 ********************************************************************** 1812 ** start background rebulid 1813 ********************************************************************** 1814 */ 1815 static void arcmsr_iop_init(struct AdapterControlBlock *acb) 1816 { 1817 u_int32_t intmask_org, mask, outbound_doorbell, firmware_state=0; 1818 1819 do { 1820 firmware_state=CHIP_REG_READ32(outbound_msgaddr1); 1821 } while((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK)==0); 1822 intmask_org=CHIP_REG_READ32(outbound_intmask)|ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE; 1823 CHIP_REG_WRITE32(outbound_intmask, intmask_org); 1824 intmask_org=CHIP_REG_READ32(outbound_intmask)|ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE; 1825 arcmsr_get_firmware_spec(acb); 1826 arcmsr_start_adapter_bgrb(acb); 1827 /* clear Qbuffer if door bell ringed */ 1828 outbound_doorbell=CHIP_REG_READ32(outbound_doorbell); 1829 CHIP_REG_WRITE32(outbound_doorbell, outbound_doorbell);/*clear interrupt */ 1830 CHIP_REG_WRITE32(inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 1831 /* enable outbound Post Queue, outbound message0, outbell doorbell Interrupt */ 1832 mask=~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE|ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE); 1833 CHIP_REG_WRITE32(outbound_intmask, intmask_org & mask); 1834 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff; 1835 acb->acb_flags |=ACB_F_IOP_INITED; 1836 return; 1837 } 1838 /* 1839 ********************************************************************** 1840 ********************************************************************** 1841 */ 1842 static void arcmsr_map_freesrb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 1843 { 1844 struct AdapterControlBlock *acb=arg; 1845 struct CommandControlBlock *srb_tmp; 1846 u_int8_t * dma_memptr; 1847 u_int32_t i, srb_phyaddr_hi32; 1848 unsigned long srb_phyaddr=(unsigned long)segs->ds_addr; 1849 1850 dma_memptr=acb->uncacheptr; 1851 srb_phyaddr=segs->ds_addr; /* We suppose bus_addr_t high part always 0 here*/ 1852 if(((unsigned long)dma_memptr & 0x1F)!=0) { 1853 dma_memptr=dma_memptr+(0x20-((unsigned long)dma_memptr & 0x1F)); 1854 srb_phyaddr=srb_phyaddr+(0x20-((unsigned long)srb_phyaddr & 0x1F)); 1855 } 1856 srb_tmp=(struct CommandControlBlock *)dma_memptr; 1857 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++) { 1858 /*srb address must 32 (0x20) boundary*/ 1859 if(((unsigned long)srb_tmp & 0x1F)==0) { 1860 if(bus_dmamap_create(acb->dm_segs_dmat, /*flags*/0, &srb_tmp->dm_segs_dmamap)!=0) { 1861 acb->acb_flags |= ACB_F_MAPFREESRB_FAILD; 1862 printf("arcmsr%d: srb dmamap bus_dmamap_create error\n", acb->pci_unit); 1863 return; 1864 } 1865 srb_tmp->cdb_shifted_phyaddr=srb_phyaddr >> 5; 1866 srb_tmp->acb=acb; 1867 acb->srbworkingQ[i]=acb->psrb_pool[i]=srb_tmp; 1868 srb_phyaddr=srb_phyaddr+sizeof(struct CommandControlBlock); 1869 } else { 1870 acb->acb_flags |= ACB_F_MAPFREESRB_FAILD; 1871 printf("arcmsr%d: dma_memptr=%p i=%d" 1872 "this srb cross 32 bytes boundary ignored srb_tmp=%p \n" 1873 , acb->pci_unit, dma_memptr, i, srb_tmp); 1874 return; 1875 } 1876 srb_tmp++; 1877 } 1878 acb->vir2phy_offset=(unsigned long)srb_tmp-(unsigned long)srb_phyaddr; 1879 /* 1880 ******************************************************************** 1881 ** here we need to tell iop 331 our freesrb.HighPart 1882 ** if freesrb.HighPart is not zero 1883 ******************************************************************** 1884 */ 1885 srb_phyaddr_hi32=(uint32_t) ((srb_phyaddr>>16)>>16); 1886 if(srb_phyaddr_hi32!=0) { 1887 CHIP_REG_WRITE32(message_rwbuffer[0], ARCMSR_SIGNATURE_SET_CONFIG); 1888 CHIP_REG_WRITE32(message_rwbuffer[1], srb_phyaddr_hi32); 1889 CHIP_REG_WRITE32(inbound_msgaddr0, ARCMSR_INBOUND_MESG0_SET_CONFIG); 1890 if(arcmsr_wait_msgint_ready(acb)) { 1891 printf("arcmsr%d: 'set srb high part physical address' timeout \n", acb->pci_unit); 1892 } 1893 } 1894 return; 1895 } 1896 /* 1897 ************************************************************************ 1898 ** 1899 ** 1900 ************************************************************************ 1901 */ 1902 static void arcmsr_free_resource(struct AdapterControlBlock *acb) 1903 { 1904 /* remove the control device */ 1905 if(acb->ioctl_dev != NULL) { 1906 destroy_dev(acb->ioctl_dev); 1907 } 1908 bus_dmamap_unload(acb->srb_dmat, acb->srb_dmamap); 1909 bus_dmamap_destroy(acb->srb_dmat, acb->srb_dmamap); 1910 bus_dma_tag_destroy(acb->srb_dmat); 1911 bus_dma_tag_destroy(acb->dm_segs_dmat); 1912 bus_dma_tag_destroy(acb->parent_dmat); 1913 return; 1914 } 1915 /* 1916 ************************************************************************ 1917 ************************************************************************ 1918 */ 1919 static u_int32_t arcmsr_initialize(device_t dev) 1920 { 1921 struct AdapterControlBlock *acb=device_get_softc(dev); 1922 u_int32_t intmask_org, rid=PCIR_BAR(0); 1923 vm_offset_t mem_base; 1924 u_int16_t pci_command; 1925 int i, j; 1926 1927 #if __FreeBSD_version >= 502010 1928 if(bus_dma_tag_create( /*parent*/ NULL, 1929 /*alignemnt*/ 1, 1930 /*boundary*/ 0, 1931 /*lowaddr*/ BUS_SPACE_MAXADDR, 1932 /*highaddr*/ BUS_SPACE_MAXADDR, 1933 /*filter*/ NULL, 1934 /*filterarg*/ NULL, 1935 /*maxsize*/ BUS_SPACE_MAXSIZE_32BIT, 1936 /*nsegments*/ BUS_SPACE_UNRESTRICTED, 1937 /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, 1938 /*flags*/ 0, 1939 /*lockfunc*/ NULL, 1940 /*lockarg*/ NULL, 1941 &acb->parent_dmat) != 0) 1942 #else 1943 if(bus_dma_tag_create( /*parent*/ NULL, 1944 /*alignemnt*/ 1, 1945 /*boundary*/ 0, 1946 /*lowaddr*/ BUS_SPACE_MAXADDR, 1947 /*highaddr*/ BUS_SPACE_MAXADDR, 1948 /*filter*/ NULL, 1949 /*filterarg*/ NULL, 1950 /*maxsize*/ BUS_SPACE_MAXSIZE_32BIT, 1951 /*nsegments*/ BUS_SPACE_UNRESTRICTED, 1952 /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, 1953 /*flags*/ 0, 1954 &acb->parent_dmat) != 0) 1955 #endif 1956 { 1957 printf("arcmsr%d: parent_dmat bus_dma_tag_create failure!\n", acb->pci_unit); 1958 return ENOMEM; 1959 } 1960 /* Create a single tag describing a region large enough to hold all of the s/g lists we will need. */ 1961 #if __FreeBSD_version >= 502010 1962 if(bus_dma_tag_create( /*parent_dmat*/ acb->parent_dmat, 1963 /*alignment*/ 1, 1964 /*boundary*/ 0, 1965 /*lowaddr*/ BUS_SPACE_MAXADDR, 1966 /*highaddr*/ BUS_SPACE_MAXADDR, 1967 /*filter*/ NULL, 1968 /*filterarg*/ NULL, 1969 /*maxsize*/ MAXBSIZE, 1970 /*nsegments*/ ARCMSR_MAX_SG_ENTRIES, 1971 /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, 1972 /*flags*/ 0, 1973 /*lockfunc*/ busdma_lock_mutex, 1974 /*lockarg*/ &Giant, 1975 &acb->dm_segs_dmat) != 0) 1976 #else 1977 if(bus_dma_tag_create( /*parent_dmat*/ acb->parent_dmat, 1978 /*alignment*/ 1, 1979 /*boundary*/ 0, 1980 /*lowaddr*/ BUS_SPACE_MAXADDR, 1981 /*highaddr*/ BUS_SPACE_MAXADDR, 1982 /*filter*/ NULL, 1983 /*filterarg*/ NULL, 1984 /*maxsize*/ MAXBSIZE, 1985 /*nsegments*/ ARCMSR_MAX_SG_ENTRIES, 1986 /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, 1987 /*flags*/ 0, 1988 &acb->dm_segs_dmat) != 0) 1989 #endif 1990 { 1991 bus_dma_tag_destroy(acb->parent_dmat); 1992 printf("arcmsr%d: dm_segs_dmat bus_dma_tag_create failure!\n", acb->pci_unit); 1993 return ENOMEM; 1994 } 1995 /* DMA tag for our srb structures.... Allocate the freesrb memory */ 1996 #if __FreeBSD_version >= 502010 1997 if(bus_dma_tag_create( /*parent_dmat*/ acb->parent_dmat, 1998 /*alignment*/ 1, 1999 /*boundary*/ 0, 2000 /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, 2001 /*highaddr*/ BUS_SPACE_MAXADDR, 2002 /*filter*/ NULL, 2003 /*filterarg*/ NULL, 2004 /*maxsize*/ ARCMSR_SRBS_POOL_SIZE, 2005 /*nsegments*/ 1, 2006 /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, 2007 /*flags*/ 0, 2008 /*lockfunc*/ NULL, 2009 /*lockarg*/ NULL, 2010 &acb->srb_dmat) != 0) 2011 #else 2012 if(bus_dma_tag_create( /*parent_dmat*/ acb->parent_dmat, 2013 /*alignment*/ 1, 2014 /*boundary*/ 0, 2015 /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, 2016 /*highaddr*/ BUS_SPACE_MAXADDR, 2017 /*filter*/ NULL, 2018 /*filterarg*/ NULL, 2019 /*maxsize*/ ARCMSR_SRBS_POOL_SIZE, 2020 /*nsegments*/ 1, 2021 /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, 2022 /*flags*/ 0, 2023 &acb->srb_dmat) != 0) 2024 #endif 2025 { 2026 bus_dma_tag_destroy(acb->dm_segs_dmat); 2027 bus_dma_tag_destroy(acb->parent_dmat); 2028 printf("arcmsr%d: srb_dmat bus_dma_tag_create failure!\n", acb->pci_unit); 2029 return ENXIO; 2030 } 2031 /* Allocation for our srbs */ 2032 if(bus_dmamem_alloc(acb->srb_dmat, (void **)&acb->uncacheptr 2033 , BUS_DMA_WAITOK | BUS_DMA_COHERENT, &acb->srb_dmamap) != 0) { 2034 bus_dma_tag_destroy(acb->srb_dmat); 2035 bus_dma_tag_destroy(acb->dm_segs_dmat); 2036 bus_dma_tag_destroy(acb->parent_dmat); 2037 printf("arcmsr%d: srb_dmat bus_dmamem_alloc failure!\n", acb->pci_unit); 2038 return ENXIO; 2039 } 2040 /* And permanently map them */ 2041 if(bus_dmamap_load(acb->srb_dmat, acb->srb_dmamap, acb->uncacheptr 2042 , ARCMSR_SRBS_POOL_SIZE, arcmsr_map_freesrb, acb, /*flags*/0)) { 2043 bus_dma_tag_destroy(acb->srb_dmat); 2044 bus_dma_tag_destroy(acb->dm_segs_dmat); 2045 bus_dma_tag_destroy(acb->parent_dmat); 2046 printf("arcmsr%d: srb_dmat bus_dmamap_load failure!\n", acb->pci_unit); 2047 return ENXIO; 2048 } 2049 pci_command=pci_read_config(dev, PCIR_COMMAND, 2); 2050 pci_command |= PCIM_CMD_BUSMASTEREN; 2051 pci_command |= PCIM_CMD_PERRESPEN; 2052 pci_command |= PCIM_CMD_MWRICEN; 2053 /* Enable Busmaster/Mem */ 2054 pci_command |= PCIM_CMD_MEMEN; 2055 pci_write_config(dev, PCIR_COMMAND, pci_command, 2); 2056 acb->sys_res_arcmsr=bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 0ul, ~0ul, 0x1000, RF_ACTIVE); 2057 if(acb->sys_res_arcmsr == NULL) { 2058 arcmsr_free_resource(acb); 2059 printf("arcmsr%d: bus_alloc_resource failure!\n", acb->pci_unit); 2060 return ENOMEM; 2061 } 2062 if(rman_get_start(acb->sys_res_arcmsr) <= 0) { 2063 arcmsr_free_resource(acb); 2064 printf("arcmsr%d: rman_get_start failure!\n", acb->pci_unit); 2065 return ENXIO; 2066 } 2067 mem_base=(vm_offset_t) rman_get_virtual(acb->sys_res_arcmsr); 2068 if(mem_base==0) { 2069 arcmsr_free_resource(acb); 2070 printf("arcmsr%d: rman_get_virtual failure!\n", acb->pci_unit); 2071 return ENXIO; 2072 } 2073 if(acb->acb_flags & ACB_F_MAPFREESRB_FAILD) { 2074 arcmsr_free_resource(acb); 2075 printf("arcmsr%d: map free srb failure!\n", acb->pci_unit); 2076 return ENXIO; 2077 } 2078 acb->btag=rman_get_bustag(acb->sys_res_arcmsr); 2079 acb->bhandle=rman_get_bushandle(acb->sys_res_arcmsr); 2080 acb->pmu=(struct MessageUnit *)mem_base; 2081 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED 2082 |ACB_F_MESSAGE_RQBUFFER_CLEARED 2083 |ACB_F_MESSAGE_WQBUFFER_READED); 2084 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; 2085 /* 2086 ******************************************************************** 2087 ** init raid volume state 2088 ******************************************************************** 2089 */ 2090 for(i=0;i<ARCMSR_MAX_TARGETID;i++) { 2091 for(j=0;j<ARCMSR_MAX_TARGETLUN;j++) { 2092 acb->devstate[i][j]=ARECA_RAID_GOOD; 2093 } 2094 } 2095 /* disable iop all outbound interrupt */ 2096 intmask_org=CHIP_REG_READ32(outbound_intmask); 2097 CHIP_REG_WRITE32(outbound_intmask, intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE); 2098 arcmsr_iop_init(acb); 2099 return(0); 2100 } 2101 /* 2102 ************************************************************************ 2103 ************************************************************************ 2104 */ 2105 static u_int32_t arcmsr_attach(device_t dev) 2106 { 2107 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)device_get_softc(dev); 2108 u_int32_t unit=device_get_unit(dev); 2109 struct ccb_setasync csa; 2110 struct cam_devq *devq; /* Device Queue to use for this SIM */ 2111 struct resource *irqres; 2112 int rid; 2113 2114 if(acb == NULL) { 2115 printf("arcmsr%d: cannot allocate softc\n", unit); 2116 return (ENOMEM); 2117 } 2118 bzero(acb, sizeof(struct AdapterControlBlock)); 2119 if(arcmsr_initialize(dev)) { 2120 printf("arcmsr%d: initialize failure!\n", unit); 2121 return ENXIO; 2122 } 2123 /* After setting up the adapter, map our interrupt */ 2124 rid=0; 2125 irqres=bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, RF_SHAREABLE | RF_ACTIVE); 2126 if(irqres == NULL || 2127 bus_setup_intr(dev, irqres, INTR_TYPE_CAM|INTR_ENTROPY|INTR_MPSAFE 2128 , NULL, arcmsr_interrupt, acb, &acb->ih)) { 2129 arcmsr_free_resource(acb); 2130 printf("arcmsr%d: unable to register interrupt handler!\n", unit); 2131 return ENXIO; 2132 } 2133 acb->irqres=irqres; 2134 acb->pci_dev=dev; 2135 acb->pci_unit=unit; 2136 /* 2137 * Now let the CAM generic SCSI layer find the SCSI devices on 2138 * the bus * start queue to reset to the idle loop. * 2139 * Create device queue of SIM(s) * (MAX_START_JOB - 1) : 2140 * max_sim_transactions 2141 */ 2142 devq=cam_simq_alloc(ARCMSR_MAX_START_JOB); 2143 if(devq == NULL) { 2144 arcmsr_free_resource(acb); 2145 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres); 2146 printf("arcmsr%d: cam_simq_alloc failure!\n", unit); 2147 return ENXIO; 2148 } 2149 acb->psim=cam_sim_alloc(arcmsr_action, arcmsr_poll 2150 , "arcmsr", acb, unit, 1, ARCMSR_MAX_OUTSTANDING_CMD, devq); 2151 if(acb->psim == NULL) { 2152 arcmsr_free_resource(acb); 2153 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres); 2154 cam_simq_free(devq); 2155 printf("arcmsr%d: cam_sim_alloc failure!\n", unit); 2156 return ENXIO; 2157 } 2158 if(xpt_bus_register(acb->psim, 0) != CAM_SUCCESS) { 2159 arcmsr_free_resource(acb); 2160 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres); 2161 cam_sim_free(acb->psim, /*free_devq*/TRUE); 2162 printf("arcmsr%d: xpt_bus_register failure!\n", unit); 2163 return ENXIO; 2164 } 2165 if(xpt_create_path(&acb->ppath, /* periph */ NULL 2166 , cam_sim_path(acb->psim) 2167 , CAM_TARGET_WILDCARD 2168 , CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 2169 arcmsr_free_resource(acb); 2170 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres); 2171 xpt_bus_deregister(cam_sim_path(acb->psim)); 2172 cam_sim_free(acb->psim, /* free_simq */ TRUE); 2173 printf("arcmsr%d: xpt_create_path failure!\n", unit); 2174 return ENXIO; 2175 } 2176 ARCMSR_LOCK_INIT(&acb->workingQ_done_lock, "arcmsr done working Q lock"); 2177 ARCMSR_LOCK_INIT(&acb->workingQ_start_lock, "arcmsr start working Q lock"); 2178 ARCMSR_LOCK_INIT(&acb->qbuffer_lock, "arcmsr Q buffer lock"); 2179 /* 2180 **************************************************** 2181 */ 2182 xpt_setup_ccb(&csa.ccb_h, acb->ppath, /*priority*/5); 2183 csa.ccb_h.func_code=XPT_SASYNC_CB; 2184 csa.event_enable=AC_FOUND_DEVICE|AC_LOST_DEVICE; 2185 csa.callback=arcmsr_async; 2186 csa.callback_arg=acb->psim; 2187 xpt_action((union ccb *)&csa); 2188 /* Create the control device. */ 2189 acb->ioctl_dev=make_dev(&arcmsr_cdevsw 2190 , unit 2191 , UID_ROOT 2192 , GID_WHEEL /* GID_OPERATOR */ 2193 , S_IRUSR | S_IWUSR 2194 , "arcmsr%d", unit); 2195 #if __FreeBSD_version < 503000 2196 acb->ioctl_dev->si_drv1=acb; 2197 #endif 2198 #if __FreeBSD_version > 500005 2199 (void)make_dev_alias(acb->ioctl_dev, "arc%d", unit); 2200 #endif 2201 return 0; 2202 } 2203 /* 2204 ************************************************************************ 2205 ************************************************************************ 2206 */ 2207 static u_int32_t arcmsr_probe(device_t dev) 2208 { 2209 u_int32_t id; 2210 static char buf[256]; 2211 char *type; 2212 int raid6 = 1; 2213 2214 if (pci_get_vendor(dev) != PCI_VENDOR_ID_ARECA) { 2215 return (ENXIO); 2216 } 2217 switch(id=pci_get_devid(dev)) { 2218 case PCIDevVenIDARC1110: 2219 case PCIDevVenIDARC1210: 2220 raid6 = 0; 2221 /*FALLTHRU*/ 2222 case PCIDevVenIDARC1120: 2223 case PCIDevVenIDARC1130: 2224 case PCIDevVenIDARC1160: 2225 case PCIDevVenIDARC1170: 2226 case PCIDevVenIDARC1220: 2227 case PCIDevVenIDARC1230: 2228 case PCIDevVenIDARC1260: 2229 case PCIDevVenIDARC1270: 2230 case PCIDevVenIDARC1280: 2231 type = "SATA"; 2232 break; 2233 case PCIDevVenIDARC1380: 2234 case PCIDevVenIDARC1381: 2235 case PCIDevVenIDARC1680: 2236 case PCIDevVenIDARC1681: 2237 type = "SAS"; 2238 break; 2239 default: 2240 type = "X-TYPE"; 2241 break; 2242 } 2243 sprintf(buf, "Areca %s Host Adapter RAID Controller %s\n", type, raid6 ? "(RAID6 capable)" : ""); 2244 device_set_desc_copy(dev, buf); 2245 return 0; 2246 } 2247 /* 2248 ************************************************************************ 2249 ************************************************************************ 2250 */ 2251 static void arcmsr_shutdown(device_t dev) 2252 { 2253 u_int32_t i, poll_count=0; 2254 u_int32_t intmask_org; 2255 struct CommandControlBlock *srb; 2256 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)device_get_softc(dev); 2257 2258 /* stop adapter background rebuild */ 2259 arcmsr_stop_adapter_bgrb(acb); 2260 arcmsr_flush_adapter_cache(acb); 2261 /* disable all outbound interrupt */ 2262 intmask_org=CHIP_REG_READ32(outbound_intmask); 2263 CHIP_REG_WRITE32(outbound_intmask, (intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE)); 2264 /* abort all outstanding command */ 2265 acb->acb_flags |= ACB_F_SCSISTOPADAPTER; 2266 acb->acb_flags &= ~ACB_F_IOP_INITED; 2267 if(acb->srboutstandingcount!=0) { 2268 while((acb->srboutstandingcount!=0) && (poll_count < 256)) { 2269 arcmsr_interrupt((void *)acb); 2270 UDELAY(25000); 2271 poll_count++; 2272 } 2273 if(acb->srboutstandingcount!=0) { 2274 arcmsr_abort_allcmd(acb); 2275 /*clear all outbound posted Q*/ 2276 for(i=0;i<ARCMSR_MAX_OUTSTANDING_CMD;i++) { 2277 CHIP_REG_READ32(outbound_queueport); 2278 } 2279 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++) { 2280 srb=acb->psrb_pool[i]; 2281 if(srb->startdone==ARCMSR_SRB_START) { 2282 srb->startdone=ARCMSR_SRB_ABORTED; 2283 srb->pccb->ccb_h.status |= CAM_REQ_ABORTED; 2284 arcmsr_srb_complete(srb, 1); 2285 } 2286 } 2287 } 2288 } 2289 atomic_set_int(&acb->srboutstandingcount, 0); 2290 acb->workingsrb_doneindex=0; 2291 acb->workingsrb_startindex=0; 2292 return; 2293 } 2294 /* 2295 ************************************************************************ 2296 ************************************************************************ 2297 */ 2298 static u_int32_t arcmsr_detach(device_t dev) 2299 { 2300 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)device_get_softc(dev); 2301 2302 arcmsr_shutdown(dev); 2303 arcmsr_free_resource(acb); 2304 bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(0), acb->sys_res_arcmsr); 2305 bus_teardown_intr(dev, acb->irqres, acb->ih); 2306 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres); 2307 xpt_async(AC_LOST_DEVICE, acb->ppath, NULL); 2308 xpt_free_path(acb->ppath); 2309 xpt_bus_deregister(cam_sim_path(acb->psim)); 2310 cam_sim_free(acb->psim, TRUE); 2311 return (0); 2312 } 2313 2314 2315