1 /* 2 ****************************************************************************************** 3 ** O.S : FreeBSD 4 ** FILE NAME : arcmsr.c 5 ** BY : Erich Chen 6 ** Description: SCSI RAID Device Driver for 7 ** ARECA (ARC1110/1120/1160/1210/1220/1260) SATA RAID HOST Adapter 8 ** ARCMSR RAID Host adapter[RAID controller:INTEL 331(PCI-X) 341(PCI-EXPRESS) chip set] 9 ****************************************************************************************** 10 ************************************************************************ 11 ** 12 ** Copyright (c) 2004-2006 ARECA Co. Ltd. 13 ** Erich Chen, Taipei Taiwan All rights reserved. 14 ** 15 ** Redistribution and use in source and binary forms,with or without 16 ** modification,are permitted provided that the following conditions 17 ** are met: 18 ** 1. Redistributions of source code must retain the above copyright 19 ** notice,this list of conditions and the following disclaimer. 20 ** 2. Redistributions in binary form must reproduce the above copyright 21 ** notice,this list of conditions and the following disclaimer in the 22 ** documentation and/or other materials provided with the distribution. 23 ** 3. The name of the author may not be used to endorse or promote products 24 ** derived from this software without specific prior written permission. 25 ** 26 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 27 ** IMPLIED WARRANTIES,INCLUDING,BUT NOT LIMITED TO,THE IMPLIED WARRANTIES 28 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 29 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,INDIRECT, 30 ** INCIDENTAL,SPECIAL,EXEMPLARY,OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT 31 ** NOT LIMITED TO,PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 ** DATA,OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY 33 ** THEORY OF LIABILITY,WHETHER IN CONTRACT,STRICT LIABILITY,OR TORT 34 **(INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF 35 ** THIS SOFTWARE,EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 ************************************************************************** 37 ** History 38 ** 39 ** REV# DATE NAME DESCRIPTION 40 ** 1.00.00.00 3/31/2004 Erich Chen First release 41 ** 1.20.00.02 11/29/2004 Erich Chen bug fix with arcmsr_bus_reset when PHY error 42 ****************************************************************************************** 43 ** $FreeBSD$ 44 */ 45 #define ARCMSR_DEBUG0 0 46 /* 47 ********************************** 48 */ 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/bus.h> 54 #include <sys/queue.h> 55 #include <sys/stat.h> 56 #include <sys/devicestat.h> 57 #include <sys/kthread.h> 58 #include <sys/module.h> 59 #include <sys/proc.h> 60 #include <sys/lock.h> 61 #include <sys/sysctl.h> 62 #include <sys/poll.h> 63 #include <sys/ioccom.h> 64 #include <vm/vm.h> 65 #include <vm/vm_param.h> 66 #include <vm/pmap.h> 67 68 #include <isa/rtc.h> 69 70 #include <machine/bus.h> 71 #include <machine/resource.h> 72 #include <machine/atomic.h> 73 #include <sys/conf.h> 74 #include <sys/rman.h> 75 76 #include <cam/cam.h> 77 #include <cam/cam_ccb.h> 78 #include <cam/cam_sim.h> 79 #include <cam/cam_xpt_sim.h> 80 #include <cam/cam_debug.h> 81 #include <cam/scsi/scsi_all.h> 82 #include <cam/scsi/scsi_message.h> 83 /* 84 ************************************************************************** 85 ** Define the OS version specific locks 86 ************************************************************************** 87 */ 88 #if __FreeBSD_version >= 500005 89 #include <sys/selinfo.h> 90 #include <sys/mutex.h> 91 #include <dev/pci/pcivar.h> 92 #include <dev/pci/pcireg.h> 93 #define ARCMSR_LOCK_INIT(l, s) mtx_init(l, s,NULL, MTX_DEF|MTX_RECURSE) 94 #define ARCMSR_LOCK_ACQUIRE(l) mtx_lock(l) 95 #define ARCMSR_LOCK_RELEASE(l) mtx_unlock(l) 96 typedef struct mtx arcmsr_lock_t; 97 #else 98 #include <sys/select.h> 99 #include <pci/pcivar.h> 100 #include <pci/pcireg.h> 101 #define ARCMSR_LOCK_INIT(l, s) simple_lock_init(l) 102 #define ARCMSR_LOCK_ACQUIRE(l) simple_lock(l) 103 #define ARCMSR_LOCK_RELEASE(l) simple_unlock(l) 104 typedef struct simplelock arcmsr_lock_t; 105 #endif 106 #include <dev/arcmsr/arcmsr.h> 107 /* 108 ************************************************************************** 109 ** __FreeBSD_version 502010 110 ************************************************************************** 111 */ 112 static VOID arcmsr_interrupt(VOID *arg); 113 static LONG arcmsr_probe(device_t dev); 114 static LONG arcmsr_attach(device_t dev); 115 static LONG arcmsr_detach(device_t dev); 116 static VOID arcmsr_shutdown(device_t dev); 117 #if 0 118 ULONG arcmsr_make_timespec(ULONG year,ULONG mon,ULONG day,ULONG hour,ULONG min,ULONG sec); 119 ULONG arcmsr_getcmos_time(VOID); 120 #endif 121 LONG arcmsr_queue_dpc(PACB pACB,DPCFUN dpcfun,VOID *arg); 122 LONG arcmsr_iop_ioctlcmd(PACB pACB,ULONG ioctl_cmd,caddr_t arg); 123 BOOLEAN arcmsr_seek_cmd2abort(union ccb * pabortccb); 124 BOOLEAN arcmsr_wait_msgint_ready(PACB pACB); 125 PSRB arcmsr_get_freesrb(PACB pACB); 126 VOID arcmsr_free_resource(PACB pACB); 127 VOID arcmsr_bus_reset(PACB pACB); 128 VOID arcmsr_stop_adapter_bgrb(PACB pACB); 129 VOID arcmsr_start_adapter_bgrb(PACB pACB); 130 VOID arcmsr_iop_init(PACB pACB); 131 VOID arcmsr_do_dpcQ(PACB pACB); 132 VOID arcmsr_flush_adapter_cache(PACB pACB); 133 VOID arcmsr_do_thread_works(VOID *arg); 134 VOID arcmsr_queue_wait2go_srb(PACB pACB,PSRB pSRB); 135 VOID arcmsr_post_wait2go_srb(PACB pACB); 136 VOID arcmsr_post_Qbuffer(PACB pACB); 137 VOID arcmsr_abort_allcmd(PACB pACB); 138 VOID arcmsr_srb_complete(PSRB pSRB); 139 VOID arcmsr_iop_reset(PACB pACB); 140 VOID arcmsr_report_SenseInfoBuffer(PSRB pSRB); 141 VOID arcmsr_build_srb(PSRB pSRB, bus_dma_segment_t *dm_segs, LONG nseg); 142 /* 143 ***************************************************************************************** 144 ** Character device switch table 145 **struct cdevsw { 146 ** d_open_t *d_open; 147 ** d_close_t *d_close; 148 ** d_read_t *d_read; 149 ** d_write_t *d_write; 150 ** d_ioctl_t *d_ioctl; 151 ** d_poll_t *d_poll; 152 ** d_mmap_t *d_mmap; 153 ** d_strategy_t *d_strategy; 154 ** const char *d_name; "" base device name, e.g. 'vn' 155 ** int d_maj; 156 ** d_dump_t *d_dump; 157 ** d_psize_t *d_psize; 158 ** u_int d_flags; 159 ** int d_bmaj; 160 ** d_kqfilter_t *d_kqfilter; "" additions below are not binary compatible with 4.2 and below 161 **}; 162 ****************************************************************************************** 163 */ 164 /* 165 ************************************************************************** 166 ** Insert a delay in micro-seconds and milli-seconds. 167 ** static void MDELAY(LONG ms) { while (ms--) UDELAY(1000); } 168 ************************************************************************** 169 */ 170 static VOID UDELAY(LONG us) { DELAY(us); } 171 /* 172 ************************************************************************** 173 ** 174 ************************************************************************** 175 */ 176 static bus_dmamap_callback_t arcmsr_map_freesrb; 177 static bus_dmamap_callback_t arcmsr_executesrb; 178 /* 179 ************************************************************************** 180 ** 181 ************************************************************************** 182 */ 183 static d_open_t arcmsr_open; 184 static d_close_t arcmsr_close; 185 static d_ioctl_t arcmsr_ioctl; 186 187 static device_method_t arcmsr_methods[]={ 188 DEVMETHOD(device_probe, arcmsr_probe), 189 DEVMETHOD(device_attach, arcmsr_attach), 190 DEVMETHOD(device_detach, arcmsr_detach), 191 DEVMETHOD(device_shutdown, arcmsr_shutdown), 192 { 0,0 } 193 }; 194 195 static driver_t arcmsr_driver={ 196 "arcmsr",arcmsr_methods,sizeof(struct _ACB) 197 }; 198 199 static devclass_t arcmsr_devclass; 200 DRIVER_MODULE(arcmsr,pci,arcmsr_driver,arcmsr_devclass,0,0); 201 202 #if __FreeBSD_version >= 502010 203 static struct cdevsw arcmsr_cdevsw={ 204 .d_version = D_VERSION, 205 .d_flags = D_NEEDGIANT, 206 .d_open = arcmsr_open, /* open */ 207 .d_close = arcmsr_close, /* close */ 208 .d_ioctl = arcmsr_ioctl, /* ioctl */ 209 .d_name = "arcmsr", /* name */ 210 }; 211 #else 212 #define ARCMSR_CDEV_MAJOR 180 213 214 static struct cdevsw arcmsr_cdevsw = { 215 arcmsr_open, /* open */ 216 arcmsr_close, /* close */ 217 noread, /* read */ 218 nowrite, /* write */ 219 arcmsr_ioctl, /* ioctl */ 220 nopoll, /* poll */ 221 nommap, /* mmap */ 222 nostrategy, /* strategy */ 223 "arcmsr", /* name */ 224 ARCMSR_CDEV_MAJOR, /* major */ 225 nodump, /* dump */ 226 nopsize, /* psize */ 227 0 /* flags */ 228 }; 229 #endif 230 231 #if __FreeBSD_version < 500005 232 static int arcmsr_open(dev_t dev, int flags, int fmt, struct proc *proc) 233 #else 234 #if __FreeBSD_version < 503000 235 static int arcmsr_open(dev_t dev, int flags, int fmt, struct thread *proc) 236 #else 237 static int arcmsr_open(struct cdev *dev, int flags, int fmt, d_thread_t *proc) 238 #endif 239 #endif 240 { 241 #if __FreeBSD_version < 503000 242 PACB pACB=dev->si_drv1; 243 #else 244 int unit = minor(dev); 245 PACB pACB = devclass_get_softc(arcmsr_devclass, unit); 246 #endif 247 248 if(pACB==NULL) 249 { 250 return ENXIO; 251 } 252 /* Check to make sure the device isn't already open */ 253 if (pACB->acb_flags & ACB_F_IOCTL_OPEN) 254 { 255 return EBUSY; 256 } 257 pACB->acb_flags |= ACB_F_IOCTL_OPEN; 258 return 0; 259 } 260 /* 261 ************************************************************************** 262 ************************************************************************** 263 */ 264 #if __FreeBSD_version < 500005 265 static int arcmsr_close(dev_t dev, int flags, int fmt, struct proc *proc) 266 #else 267 #if __FreeBSD_version < 503000 268 static int arcmsr_close(dev_t dev, int flags, int fmt, struct thread *proc) 269 #else 270 static int arcmsr_close(struct cdev *dev, int flags, int fmt, d_thread_t *proc) 271 #endif 272 #endif 273 { 274 #if __FreeBSD_version < 503000 275 PACB pACB=dev->si_drv1; 276 #else 277 int unit = minor(dev); 278 PACB pACB = devclass_get_softc(arcmsr_devclass, unit); 279 #endif 280 281 if(pACB==NULL) 282 { 283 return ENXIO; 284 } 285 pACB->acb_flags &= ~ACB_F_IOCTL_OPEN; 286 return 0; 287 } 288 /* 289 ************************************************************************** 290 **ENOENT 291 **ENOIOCTL 292 **ENOMEM 293 **EINVAL 294 ************************************************************************** 295 */ 296 #if __FreeBSD_version < 500005 297 static int arcmsr_ioctl(dev_t dev, u_long ioctl_cmd, caddr_t arg, int flags, struct proc *proc) 298 #else 299 #if __FreeBSD_version < 503000 300 static int arcmsr_ioctl(dev_t dev, u_long ioctl_cmd, caddr_t arg, int flags, struct thread *proc) 301 #else 302 static int arcmsr_ioctl(struct cdev *dev, u_long ioctl_cmd, caddr_t arg,int flags, d_thread_t *proc) 303 #endif 304 #endif 305 { 306 #if __FreeBSD_version < 503000 307 PACB pACB=dev->si_drv1; 308 #else 309 int unit = minor(dev); 310 PACB pACB = devclass_get_softc(arcmsr_devclass, unit); 311 #endif 312 313 if(pACB==NULL) 314 { 315 return ENXIO; 316 } 317 return(arcmsr_iop_ioctlcmd(pACB,ioctl_cmd,arg)); 318 } 319 /* 320 ************************************************************************** 321 ************************************************************************** 322 */ 323 LONG arcmsr_queue_dpc(PACB pACB,DPCFUN dpcfun,VOID *arg) 324 { 325 ULONG s; 326 UCHAR index_pointer; 327 328 #if ARCMSR_DEBUG0 329 printf("arcmsr_queue_dpc................. \n"); 330 #endif 331 332 s=splcam(); 333 index_pointer=(pACB->dpcQ_tail + 1) % ARCMSR_MAX_DPC; 334 if(index_pointer==pACB->dpcQ_head) 335 { 336 splx(s); 337 printf("DPC Queue full!\n"); 338 return -1; 339 } 340 pACB->dpcQ[pACB->dpcQ_tail].dpcfun=dpcfun; 341 pACB->dpcQ[pACB->dpcQ_tail].arg=arg; 342 pACB->dpcQ_tail=index_pointer; 343 /* 344 ********************************************************* 345 ********************************************************* 346 */ 347 wakeup(pACB->kthread_proc); 348 349 splx(s); 350 return 0; 351 } 352 /* 353 ************************************************************************** 354 ** arcmsr_do_dpcQ 355 ** execute dpc routine by kernel thread 356 *************************************************************************** 357 */ 358 VOID arcmsr_do_dpcQ(PACB pACB) 359 { 360 #if ARCMSR_DEBUG0 361 printf("arcmsr_do_dpcQ................. \n"); 362 #endif 363 /* 364 ****************************************** 365 ****************************************** 366 */ 367 while (pACB->dpcQ_head!=pACB->dpcQ_tail) 368 { 369 ULONG s; 370 DPC dpc; 371 372 /* got a "dpc routine" */ 373 s=splcam(); 374 dpc=pACB->dpcQ[pACB->dpcQ_head]; 375 pACB->dpcQ_head++; 376 pACB->dpcQ_head %=ARCMSR_MAX_DPC; 377 splx(s); 378 /* execute this "dpc routine" */ 379 dpc.dpcfun(dpc.arg); 380 } 381 return; 382 } 383 #if 0 384 /* 385 ********************************************************************** 386 ** <second> bit 05,04,03,02,01,00: 0 - 59 387 ** <minute> bit 11,10,09,08,07,06: 0 - 59 388 ** <month> bit 15,14,13,12: 1 - 12 389 ** <hour> bit 21,20,19,18,17,16: 0 - 59 390 ** <day> bit 26,25,24,23,22: 1 - 31 391 ** <year> bit 31,30,29,28,27: 0=2000,31=2031 392 ********************************************************************** 393 */ 394 ULONG arcmsr_make_timespec(ULONG year,ULONG mon,ULONG day,ULONG hour,ULONG min,ULONG sec) 395 { 396 return((year<<27)|(day<<22)|(hour<<16)|(mon<<12)|(min<<6)|(sec)); 397 } 398 /* 399 ******************************************************************** 400 ******************************************************************** 401 */ 402 ULONG arcmsr_getcmos_time(VOID) 403 { 404 ULONG year,mon,day,hour,min,sec; 405 406 #if ARCMSR_DEBUG0 407 printf("arcmsr_getcmos_time \n"); 408 #endif 409 sec=bcd2bin(rtcin(RTC_SEC)); 410 min=bcd2bin(rtcin(RTC_MIN)); 411 hour=bcd2bin(rtcin(RTC_HRS)); 412 day=bcd2bin(rtcin(RTC_DAY)); 413 mon=bcd2bin(rtcin(RTC_MONTH)); 414 year=bcd2bin(rtcin(RTC_YEAR)); 415 if((year +=1900) < 1970) 416 year +=100; 417 return arcmsr_make_timespec(year,mon,day,hour,min,sec); 418 } 419 #endif 420 /* 421 ********************************************************************************* 422 ** Asynchronous notification handler. 423 ********************************************************************************* 424 */ 425 static VOID arcmsr_async(VOID *cb_arg, ULONG code, struct cam_path *path, VOID *arg) 426 { 427 PACB pACB; 428 UCHAR target_id,target_lun; 429 struct cam_sim *sim; 430 ULONG s; 431 #if ARCMSR_DEBUG0 432 printf("arcmsr_async.......................................... \n"); 433 #endif 434 s=splcam(); 435 436 sim=(struct cam_sim *) cb_arg; 437 pACB =(PACB) cam_sim_softc(sim); 438 switch (code) 439 { 440 case AC_LOST_DEVICE: 441 target_id=xpt_path_target_id(path); 442 target_lun=xpt_path_lun_id(path); 443 if((target_id > ARCMSR_MAX_TARGETID) || (target_lun > ARCMSR_MAX_TARGETLUN)) 444 { 445 break; 446 } 447 printf("%s:scsi id%d lun%d device lost \n",device_get_name(pACB->pci_dev),target_id,target_lun); 448 break; 449 default: 450 break; 451 } 452 splx(s); 453 } 454 /* 455 ************************************************************************** 456 * arcmsr_do_thread_works 457 * execute programs schedule by kernel thread 458 * execute programs schedule by kernel thread 459 * :do background rebuilding 460 * 461 * tsleep(void *ident,int priority,const char *wmesg,int timo) 462 * tsleep() 463 * General sleep call. Suspends the current process until a wakeup is 464 * performed on the specified identifier. The process will then be made 465 * runnable with the specified priority. Sleeps at most timo/hz seconds 466 * (0 means no timeout). If pri includes PCATCH flag, signals are checked 467 * before and after sleeping, else signals are not checked. Returns 0 if 468 * awakened, EWOULDBLOCK if the timeout expires. If PCATCH is set and a 469 * signal needs to be delivered, ERESTART is returned if the current system 470 * call should be restarted if possible, and EINTR is returned if the system 471 * call should be interrupted by the signal (return EINTR). 472 * 473 * await(int priority, int timo) 474 * await() - wait for async condition to occur. The process blocks until 475 * wakeup() is called on the most recent asleep() address. If wakeup is called 476 * priority to await(), await() winds up being a NOP. 477 * 478 * If await() is called more then once (without an intervening asleep() call), 479 * await() is still effectively a NOP but it calls mi_switch() to give other 480 * processes some cpu before returning. The process is left runnable. 481 * 482 * <<<<<<<< EXPERIMENTAL, UNTESTED >>>>>>>>>> 483 * asleep(void *ident, int priority, const char *wmesg, int timo) 484 * asleep() - async sleep call. Place process on wait queue and return 485 * immediately without blocking. The process stays runnable until await() 486 * is called. If ident is NULL, remove process from wait queue if it is still 487 * on one. 488 * 489 * Only the most recent sleep condition is effective when making successive 490 * calls to asleep() or when calling tsleep(). 491 * 492 * The timeout, if any, is not initiated until await() is called. The sleep 493 * priority, signal, and timeout is specified in the asleep() call but may be 494 * overriden in the await() call. 495 * 496 * <<<<<<<< EXPERIMENTAL, UNTESTED >>>>>>>>>> 497 * :do background rebuilding 498 *************************************************************************** 499 */ 500 VOID arcmsr_do_thread_works(VOID *arg) 501 { 502 PACB pACB=(PACB) arg; 503 ARCMSR_LOCK_INIT(&pACB->arcmsr_kthread_lock, "arcmsr kthread lock"); 504 505 #if ARCMSR_DEBUG0 506 printf("arcmsr_do_thread_works................. \n"); 507 #endif 508 509 ARCMSR_LOCK_ACQUIRE(&pACB->arcmsr_kthread_lock); 510 while(1) 511 { 512 tsleep((caddr_t)pACB->kthread_proc, PRIBIO | PWAIT, "arcmsr", hz/4);/*.25 sec*/ 513 /* 514 ** if do_dpcQ_semaphore is signal 515 ** do following works 516 */ 517 arcmsr_do_dpcQ(pACB); /*see if there were some dpc routine need to execute*/ 518 if(pACB->acb_flags & ACB_F_STOP_THREAD) 519 { 520 ARCMSR_LOCK_RELEASE(&pACB->arcmsr_kthread_lock); 521 break; 522 } 523 } 524 kthread_exit(0); 525 return; 526 } 527 /* 528 ************************************************************************ 529 ** 530 ** 531 ************************************************************************ 532 */ 533 VOID arcmsr_flush_adapter_cache(PACB pACB) 534 { 535 #if ARCMSR_DEBUG0 536 printf("arcmsr_flush_adapter_cache..............\n"); 537 #endif 538 CHIP_REG_WRITE32(&pACB->pmu->inbound_msgaddr0,ARCMSR_INBOUND_MESG0_FLUSH_CACHE); 539 return; 540 } 541 /* 542 ********************************************************************** 543 ** 544 ** 545 ** 546 ********************************************************************** 547 */ 548 BOOLEAN arcmsr_wait_msgint_ready(PACB pACB) 549 { 550 ULONG Index; 551 UCHAR Retries=0x00; 552 do 553 { 554 for(Index=0; Index < 500000; Index++) 555 { 556 if(CHIP_REG_READ32(&pACB->pmu->outbound_intstatus) & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) 557 { 558 CHIP_REG_WRITE32(&pACB->pmu->outbound_intstatus, ARCMSR_MU_OUTBOUND_MESSAGE0_INT);/*clear interrupt*/ 559 return TRUE; 560 } 561 /* one us delay */ 562 UDELAY(10); 563 }/*max 5 seconds*/ 564 }while(Retries++ < 24);/*max 2 minutes*/ 565 return FALSE; 566 } 567 /* 568 ********************************************************************** 569 ** 570 ** Q back this SRB into ACB ArraySRB 571 ** 572 ********************************************************************** 573 */ 574 VOID arcmsr_srb_complete(PSRB pSRB) 575 { 576 ULONG s; 577 PACB pACB=pSRB->pACB; 578 union ccb *pccb=pSRB->pccb; 579 580 #if ARCMSR_DEBUG0 581 printf("arcmsr_srb_complete: pSRB=%p srb_doneindex=%x srb_startindex=%x\n",pSRB,pACB->srb_doneindex,pACB->srb_startindex); 582 #endif 583 584 if ((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) 585 { 586 bus_dmasync_op_t op; 587 588 if ((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 589 { 590 op = BUS_DMASYNC_POSTREAD; 591 } 592 else 593 { 594 op = BUS_DMASYNC_POSTWRITE; 595 } 596 bus_dmamap_sync(pACB->buffer_dmat, pSRB->dmamap, op); 597 bus_dmamap_unload(pACB->buffer_dmat, pSRB->dmamap); 598 } 599 s=splcam(); 600 atomic_subtract_int(&pACB->srboutstandingcount,1); 601 pSRB->startdone=ARCMSR_SRB_DONE; 602 pSRB->srb_flags=0; 603 pACB->psrbringQ[pACB->srb_doneindex]=pSRB; 604 pACB->srb_doneindex++; 605 pACB->srb_doneindex %= ARCMSR_MAX_FREESRB_NUM; 606 splx(s); 607 xpt_done(pccb); 608 return; 609 } 610 /* 611 ********************************************************************** 612 ** if scsi error do auto request sense 613 ********************************************************************** 614 */ 615 VOID arcmsr_report_SenseInfoBuffer(PSRB pSRB) 616 { 617 union ccb *pccb=pSRB->pccb; 618 PSENSE_DATA psenseBuffer=(PSENSE_DATA)&pccb->csio.sense_data; 619 #if ARCMSR_DEBUG0 620 printf("arcmsr_report_SenseInfoBuffer...........\n"); 621 #endif 622 623 pccb->ccb_h.status|=CAM_REQ_CMP; 624 if(psenseBuffer) 625 { 626 memset(psenseBuffer, 0, sizeof(pccb->csio.sense_data)); 627 memcpy(psenseBuffer,pSRB->arcmsr_cdb.SenseData,get_min(sizeof(struct _SENSE_DATA),sizeof(pccb->csio.sense_data))); 628 psenseBuffer->ErrorCode=0x70; 629 psenseBuffer->Valid=1; 630 pccb->ccb_h.status|=CAM_AUTOSNS_VALID; 631 } 632 return; 633 } 634 /* 635 ********************************************************************* 636 ** to insert pSRB into tail of pACB wait exec srbQ 637 ********************************************************************* 638 */ 639 VOID arcmsr_queue_wait2go_srb(PACB pACB,PSRB pSRB) 640 { 641 ULONG s; 642 LONG i=0; 643 #if ARCMSR_DEBUG0 644 printf("arcmsr_qtail_wait2go_srb:......................................... \n"); 645 #endif 646 647 s=splcam(); 648 while(1) 649 { 650 if(pACB->psrbwait2go[i]==NULL) 651 { 652 pACB->psrbwait2go[i]=pSRB; 653 atomic_add_int(&pACB->srbwait2gocount,1); 654 splx(s); 655 return; 656 } 657 i++; 658 i%=ARCMSR_MAX_OUTSTANDING_CMD; 659 } 660 return; 661 } 662 /* 663 ********************************************************************* 664 ** 665 ********************************************************************* 666 */ 667 VOID arcmsr_abort_allcmd(PACB pACB) 668 { 669 CHIP_REG_WRITE32(&pACB->pmu->inbound_msgaddr0,ARCMSR_INBOUND_MESG0_ABORT_CMD); 670 return; 671 } 672 673 /* 674 **************************************************************************** 675 ** Routine Description: Reset 80331 iop. 676 ** Arguments: 677 ** Return Value: Nothing. 678 **************************************************************************** 679 */ 680 VOID arcmsr_iop_reset(PACB pACB) 681 { 682 PSRB pSRB,pfreesrb; 683 ULONG intmask_org,mask; 684 LONG i=0; 685 686 #if ARCMSR_DEBUG0 687 printf("arcmsr_iop_reset: reset iop controller......................................\n"); 688 #endif 689 if(pACB->srboutstandingcount!=0) 690 { 691 /* Q back all outstanding srb into wait exec psrb Q*/ 692 #if ARCMSR_DEBUG0 693 printf("arcmsr_iop_reset: srboutstandingcount=%d ...\n",pACB->srboutstandingcount); 694 #endif 695 /* disable all outbound interrupt */ 696 intmask_org=CHIP_REG_READ32(&pACB->pmu->outbound_intmask); 697 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE); 698 /* talk to iop 331 outstanding command aborted*/ 699 arcmsr_abort_allcmd(pACB); 700 if(arcmsr_wait_msgint_ready(pACB)!=TRUE) 701 { 702 printf("arcmsr_iop_reset: wait 'abort all outstanding command' timeout.................in \n"); 703 } 704 /*clear all outbound posted Q*/ 705 for(i=0;i<ARCMSR_MAX_OUTSTANDING_CMD;i++) 706 { 707 CHIP_REG_READ32(&pACB->pmu->outbound_queueport); 708 } 709 pfreesrb=pACB->pfreesrb; 710 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++) 711 { 712 pSRB=&pfreesrb[i]; 713 if(pSRB->startdone==ARCMSR_SRB_START) 714 { 715 pSRB->startdone=ARCMSR_SRB_ABORTED; 716 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED; 717 arcmsr_srb_complete(pSRB); 718 } 719 } 720 /* enable all outbound interrupt */ 721 mask=~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE|ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE); 722 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,intmask_org & mask); 723 atomic_set_int(&pACB->srboutstandingcount,0); 724 /* post abort all outstanding command message to RAID controller */ 725 } 726 i=0; 727 while(pACB->srbwait2gocount > 0) 728 { 729 pSRB=pACB->psrbwait2go[i]; 730 if(pSRB!=NULL) 731 { 732 #if ARCMSR_DEBUG0 733 printf("arcmsr_iop_reset:abort command... srbwait2gocount=%d ...\n",pACB->srbwait2gocount); 734 #endif 735 pACB->psrbwait2go[i]=NULL; 736 pSRB->startdone=ARCMSR_SRB_ABORTED; 737 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED; 738 arcmsr_srb_complete(pSRB); 739 atomic_subtract_int(&pACB->srbwait2gocount,1); 740 } 741 i++; 742 i%=ARCMSR_MAX_OUTSTANDING_CMD; 743 } 744 return; 745 } 746 /* 747 ********************************************************************** 748 ** 749 ** PAGE_SIZE=4096 or 8192,PAGE_SHIFT=12 750 ********************************************************************** 751 */ 752 VOID arcmsr_build_srb(PSRB pSRB, bus_dma_segment_t *dm_segs, LONG nseg) 753 { 754 PARCMSR_CDB pARCMSR_CDB=&pSRB->arcmsr_cdb; 755 PCHAR psge=(PCHAR)&pARCMSR_CDB->u; 756 ULONG address_lo,address_hi; 757 union ccb *pccb=pSRB->pccb; 758 struct ccb_scsiio *pcsio=&pccb->csio; 759 LONG arccdbsize=0x30; 760 761 #if ARCMSR_DEBUG0 762 printf("arcmsr_build_srb........................... \n"); 763 #endif 764 memset(pARCMSR_CDB,0,sizeof(struct _ARCMSR_CDB)); 765 pARCMSR_CDB->Bus=0; 766 pARCMSR_CDB->TargetID=pccb->ccb_h.target_id; 767 pARCMSR_CDB->LUN=pccb->ccb_h.target_lun; 768 pARCMSR_CDB->Function=1; 769 pARCMSR_CDB->CdbLength=(UCHAR)pcsio->cdb_len; 770 pARCMSR_CDB->Context=(CPT2INT)pARCMSR_CDB; 771 bcopy(pcsio->cdb_io.cdb_bytes, pARCMSR_CDB->Cdb, pcsio->cdb_len); 772 if(nseg != 0) 773 { 774 PACB pACB=pSRB->pACB; 775 bus_dmasync_op_t op; 776 LONG length,i,cdb_sgcount=0; 777 778 /* map stor port SG list to our iop SG List.*/ 779 for(i=0;i<nseg;i++) 780 { 781 /* Get the physical address of the current data pointer */ 782 length=(ULONG) dm_segs[i].ds_len; 783 address_lo=dma_addr_lo32(dm_segs[i].ds_addr); 784 address_hi=dma_addr_hi32(dm_segs[i].ds_addr); 785 if(address_hi==0) 786 { 787 PSG32ENTRY pdma_sg=(PSG32ENTRY)psge; 788 pdma_sg->address=address_lo; 789 pdma_sg->length=length; 790 psge += sizeof(SG32ENTRY); 791 arccdbsize += sizeof(SG32ENTRY); 792 } 793 else 794 { 795 LONG sg64s_size=0,tmplength=length; 796 797 #if ARCMSR_DEBUG0 798 printf("arcmsr_build_srb: !!!!!!!!!!!......address_hi=%x.... \n",address_hi); 799 #endif 800 while(1) 801 { 802 LONG64 span4G,length0; 803 PSG64ENTRY pdma_sg=(PSG64ENTRY)psge; 804 805 span4G=(LONG64)address_lo + tmplength; 806 pdma_sg->addresshigh=address_hi; 807 pdma_sg->address=address_lo; 808 if(span4G > 0x100000000) 809 { 810 /*see if cross 4G boundary*/ 811 length0=0x100000000-address_lo; 812 pdma_sg->length=(ULONG)length0|IS_SG64_ADDR; 813 address_hi=address_hi+1; 814 address_lo=0; 815 tmplength=tmplength-(LONG)length0; 816 sg64s_size += sizeof(SG64ENTRY); 817 psge += sizeof(SG64ENTRY); 818 cdb_sgcount++; 819 } 820 else 821 { 822 pdma_sg->length=tmplength|IS_SG64_ADDR; 823 sg64s_size += sizeof(SG64ENTRY); 824 psge += sizeof(SG64ENTRY); 825 break; 826 } 827 } 828 arccdbsize += sg64s_size; 829 } 830 cdb_sgcount++; 831 } 832 pARCMSR_CDB->sgcount=(UCHAR)cdb_sgcount; 833 pARCMSR_CDB->DataLength=pcsio->dxfer_len; 834 if( arccdbsize > 256) 835 { 836 pARCMSR_CDB->Flags|=ARCMSR_CDB_FLAG_SGL_BSIZE; 837 } 838 if((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 839 { 840 op=BUS_DMASYNC_PREREAD; 841 } 842 else 843 { 844 op=BUS_DMASYNC_PREWRITE; 845 pARCMSR_CDB->Flags|=ARCMSR_CDB_FLAG_WRITE; 846 pSRB->srb_flags|=SRB_FLAG_WRITE; 847 } 848 bus_dmamap_sync(pACB->buffer_dmat, pSRB->dmamap, op); 849 } 850 #if ARCMSR_DEBUG0 851 printf("arcmsr_build_srb: pSRB=%p cmd=%x xferlength=%d arccdbsize=%d sgcount=%d\n",pSRB,pcsio->cdb_io.cdb_bytes[0],pARCMSR_CDB->DataLength,arccdbsize,pARCMSR_CDB->sgcount); 852 #endif 853 return; 854 } 855 /* 856 ************************************************************************** 857 ** 858 ** arcmsr_post_srb - Send a protocol specific ARC send postcard to a AIOC . 859 ** handle: Handle of registered ARC protocol driver 860 ** adapter_id: AIOC unique identifier(integer) 861 ** pPOSTCARD_SEND: Pointer to ARC send postcard 862 ** 863 ** This routine posts a ARC send postcard to the request post FIFO of a 864 ** specific ARC adapter. 865 ** 866 ************************************************************************** 867 */ 868 static VOID arcmsr_post_srb(PACB pACB,PSRB pSRB) 869 { 870 ULONG cdb_shifted_phyaddr=(ULONG) pSRB->cdb_shifted_phyaddr; 871 PARCMSR_CDB pARCMSR_CDB=(PARCMSR_CDB)&pSRB->arcmsr_cdb; 872 873 #if ARCMSR_DEBUG0 874 printf("arcmsr_post_srb: pSRB=%p cdb_shifted_phyaddr=%x\n",pSRB,cdb_shifted_phyaddr); 875 #endif 876 atomic_add_int(&pACB->srboutstandingcount,1); 877 pSRB->startdone=ARCMSR_SRB_START; 878 if(pARCMSR_CDB->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) 879 { 880 CHIP_REG_WRITE32(&pACB->pmu->inbound_queueport,cdb_shifted_phyaddr|ARCMSR_SRBPOST_FLAG_SGL_BSIZE); 881 } 882 else 883 { 884 CHIP_REG_WRITE32(&pACB->pmu->inbound_queueport,cdb_shifted_phyaddr); 885 } 886 return; 887 } 888 /* 889 ************************************************************************** 890 ** 891 ** 892 ************************************************************************** 893 */ 894 VOID arcmsr_post_wait2go_srb(PACB pACB) 895 { 896 ULONG s; 897 PSRB pSRB; 898 LONG i=0; 899 #if ARCMSR_DEBUG0 900 printf("arcmsr_post_wait2go_srb:srbwait2gocount=%d srboutstandingcount=%d\n",pACB->srbwait2gocount,pACB->srboutstandingcount); 901 #endif 902 s=splcam(); 903 while((pACB->srbwait2gocount > 0) && (pACB->srboutstandingcount < ARCMSR_MAX_OUTSTANDING_CMD)) 904 { 905 pSRB=pACB->psrbwait2go[i]; 906 if(pSRB!=NULL) 907 { 908 pACB->psrbwait2go[i]=NULL; 909 arcmsr_post_srb(pACB,pSRB); 910 atomic_subtract_int(&pACB->srbwait2gocount,1); 911 } 912 i++; 913 i%=ARCMSR_MAX_OUTSTANDING_CMD; 914 } 915 splx(s); 916 return; 917 } 918 /* 919 ********************************************************************** 920 ** Function: arcmsr_post_Qbuffer 921 ** Output: 922 ********************************************************************** 923 */ 924 VOID arcmsr_post_Qbuffer(PACB pACB) 925 { 926 ULONG s; 927 PUCHAR pQbuffer; 928 PQBUFFER pwbuffer=(PQBUFFER)&pACB->pmu->ioctl_wbuffer; 929 PUCHAR iop_data=(PUCHAR)pwbuffer->data; 930 LONG allxfer_len=0; 931 932 s=splcam(); 933 while((pACB->wqbuf_firstindex!=pACB->wqbuf_lastindex) && (allxfer_len<124)) 934 { 935 pQbuffer=&pACB->wqbuffer[pACB->wqbuf_firstindex]; 936 memcpy(iop_data,pQbuffer,1); 937 pACB->wqbuf_firstindex++; 938 pACB->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; /*if last index number set it to 0 */ 939 iop_data++; 940 allxfer_len++; 941 } 942 pwbuffer->data_len=allxfer_len; 943 /* 944 ** push inbound doorbell and wait reply at hwinterrupt routine for next Qbuffer post 945 */ 946 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell,ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK); 947 splx(s); 948 return; 949 } 950 /* 951 ************************************************************************ 952 ** 953 ** 954 ************************************************************************ 955 */ 956 VOID arcmsr_stop_adapter_bgrb(PACB pACB) 957 { 958 #if ARCMSR_DEBUG0 959 printf("arcmsr_stop_adapter_bgrb..............\n"); 960 #endif 961 pACB->acb_flags |= ACB_F_MSG_STOP_BGRB; 962 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB; 963 CHIP_REG_WRITE32(&pACB->pmu->inbound_msgaddr0,ARCMSR_INBOUND_MESG0_STOP_BGRB); 964 return; 965 } 966 /* 967 ************************************************************************ 968 ** 969 ** 970 ************************************************************************ 971 */ 972 static VOID arcmsr_poll(struct cam_sim * psim) 973 { 974 arcmsr_interrupt(cam_sim_softc(psim)); 975 return; 976 } 977 /* 978 ********************************************************************** 979 ** Function: arcmsr_interrupt 980 ** Output: VOID 981 ** CAM Status field values 982 **typedef enum { 983 ** CAM_REQ_INPROG, CCB request is in progress 984 ** CAM_REQ_CMP, CCB request completed without error 985 ** CAM_REQ_ABORTED, CCB request aborted by the host 986 ** CAM_UA_ABORT, Unable to abort CCB request 987 ** CAM_REQ_CMP_ERR, CCB request completed with an error 988 ** CAM_BUSY, CAM subsytem is busy 989 ** CAM_REQ_INVALID, CCB request was invalid 990 ** CAM_PATH_INVALID, Supplied Path ID is invalid 991 ** CAM_DEV_NOT_THERE, SCSI Device Not Installed/there 992 ** CAM_UA_TERMIO, Unable to terminate I/O CCB request 993 ** CAM_SEL_TIMEOUT, Target Selection Timeout 994 ** CAM_CMD_TIMEOUT, Command timeout 995 ** CAM_SCSI_STATUS_ERROR, SCSI error, look at error code in CCB 996 ** CAM_MSG_REJECT_REC, Message Reject Received 997 ** CAM_SCSI_BUS_RESET, SCSI Bus Reset Sent/Received 998 ** CAM_UNCOR_PARITY, Uncorrectable parity error occurred 999 ** CAM_AUTOSENSE_FAIL=0x10, Autosense: request sense cmd fail 1000 ** CAM_NO_HBA, No HBA Detected error 1001 ** CAM_DATA_RUN_ERR, Data Overrun error 1002 ** CAM_UNEXP_BUSFREE, Unexpected Bus Free 1003 ** CAM_SEQUENCE_FAIL, Target Bus Phase Sequence Failure 1004 ** CAM_CCB_LEN_ERR, CCB length supplied is inadequate 1005 ** CAM_PROVIDE_FAIL, Unable to provide requested capability 1006 ** CAM_BDR_SENT, A SCSI BDR msg was sent to target 1007 ** CAM_REQ_TERMIO, CCB request terminated by the host 1008 ** CAM_UNREC_HBA_ERROR, Unrecoverable Host Bus Adapter Error 1009 ** CAM_REQ_TOO_BIG, The request was too large for this host 1010 ** CAM_REQUEUE_REQ, 1011 ** * This request should be requeued to preserve 1012 ** * transaction ordering. This typically occurs 1013 ** * when the SIM recognizes an error that should 1014 ** * freeze the queue and must place additional 1015 ** * requests for the target at the sim level 1016 ** * back into the XPT queue. 1017 ** 1018 ** CAM_IDE=0x33, Initiator Detected Error 1019 ** CAM_RESRC_UNAVAIL, Resource Unavailable 1020 ** CAM_UNACKED_EVENT, Unacknowledged Event by Host 1021 ** CAM_MESSAGE_RECV, Message Received in Host Target Mode 1022 ** CAM_INVALID_CDB, Invalid CDB received in Host Target Mode 1023 ** CAM_LUN_INVALID, Lun supplied is invalid 1024 ** CAM_TID_INVALID, Target ID supplied is invalid 1025 ** CAM_FUNC_NOTAVAIL, The requested function is not available 1026 ** CAM_NO_NEXUS, Nexus is not established 1027 ** CAM_IID_INVALID, The initiator ID is invalid 1028 ** CAM_CDB_RECVD, The SCSI CDB has been received 1029 ** CAM_LUN_ALRDY_ENA, The LUN is already eanbeld for target mode 1030 ** CAM_SCSI_BUSY, SCSI Bus Busy 1031 ** 1032 ** CAM_DEV_QFRZN=0x40, The DEV queue is frozen w/this err 1033 ** 1034 ** Autosense data valid for target 1035 ** CAM_AUTOSNS_VALID=0x80, 1036 ** CAM_RELEASE_SIMQ=0x100, SIM ready to take more commands 1037 ** CAM_SIM_QUEUED =0x200, SIM has this command in it's queue 1038 ** 1039 ** CAM_STATUS_MASK=0x3F, Mask bits for just the status # 1040 ** 1041 ** Target Specific Adjunct Status 1042 ** CAM_SENT_SENSE=0x40000000 sent sense with status 1043 **} cam_status; 1044 ********************************************************************** 1045 */ 1046 static VOID arcmsr_interrupt(VOID *arg) 1047 { 1048 PACB pACB=(PACB)arg; 1049 PSRB pSRB; 1050 ULONG flagpsrb,outbound_intstatus,outbound_doorbell; 1051 1052 #if ARCMSR_DEBUG0 1053 printf("arcmsr_interrupt..............\n"); 1054 #endif 1055 /* 1056 ********************************************* 1057 ** check outbound intstatus �˹�L�l�t�����a 1058 ********************************************* 1059 */ 1060 outbound_intstatus=CHIP_REG_READ32(&pACB->pmu->outbound_intstatus) & pACB->outbound_int_enable; 1061 CHIP_REG_WRITE32(&pACB->pmu->outbound_intstatus, outbound_intstatus);/*clear interrupt*/ 1062 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) 1063 { 1064 #if ARCMSR_DEBUG0 1065 printf("arcmsr_interrupt:..........ARCMSR_MU_OUTBOUND_DOORBELL_INT\n"); 1066 #endif 1067 /* 1068 ********************************************* 1069 ** DOORBELL �m��! �O�_���l��nñ�� 1070 ********************************************* 1071 */ 1072 outbound_doorbell=CHIP_REG_READ32(&pACB->pmu->outbound_doorbell); 1073 CHIP_REG_WRITE32(&pACB->pmu->outbound_doorbell,outbound_doorbell);/*clear interrupt */ 1074 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) 1075 { 1076 PQBUFFER prbuffer=(PQBUFFER)&pACB->pmu->ioctl_rbuffer; 1077 PUCHAR iop_data=(PUCHAR)prbuffer->data; 1078 PUCHAR pQbuffer; 1079 LONG my_empty_len,iop_len,rqbuf_firstindex,rqbuf_lastindex; 1080 ULONG s; 1081 /*check this iop data if overflow my rqbuffer*/ 1082 s=splcam(); 1083 rqbuf_lastindex=pACB->rqbuf_lastindex; 1084 rqbuf_firstindex=pACB->rqbuf_firstindex; 1085 iop_len=prbuffer->data_len; 1086 my_empty_len=(rqbuf_firstindex-rqbuf_lastindex-1)&(ARCMSR_MAX_QBUFFER-1); 1087 if(my_empty_len>=iop_len) 1088 { 1089 while(iop_len > 0) 1090 { 1091 pQbuffer=&pACB->rqbuffer[pACB->rqbuf_lastindex]; 1092 memcpy(pQbuffer,iop_data,1); 1093 pACB->rqbuf_lastindex++; 1094 pACB->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;/*if last index number set it to 0 */ 1095 iop_data++; 1096 iop_len--; 1097 } 1098 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK);/*signature, let IOP331 know data has been readed */ 1099 } 1100 else 1101 { 1102 pACB->acb_flags|=ACB_F_IOPDATA_OVERFLOW; 1103 } 1104 splx(s); 1105 } 1106 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) 1107 { 1108 ULONG s; 1109 /* 1110 ********************************************* 1111 ** �ݬݬO�_�٦��l��n���D�H�X 1112 ********************************************* 1113 */ 1114 s=splcam(); 1115 if(pACB->wqbuf_firstindex!=pACB->wqbuf_lastindex) 1116 { 1117 PUCHAR pQbuffer; 1118 PQBUFFER pwbuffer=(PQBUFFER)&pACB->pmu->ioctl_wbuffer; 1119 PUCHAR iop_data=(PUCHAR)pwbuffer->data; 1120 LONG allxfer_len=0; 1121 1122 while((pACB->wqbuf_firstindex!=pACB->wqbuf_lastindex) && (allxfer_len<124)) 1123 { 1124 pQbuffer=&pACB->wqbuffer[pACB->wqbuf_firstindex]; 1125 memcpy(iop_data,pQbuffer,1); 1126 pACB->wqbuf_firstindex++; 1127 pACB->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; /*if last index number set it to 0 */ 1128 iop_data++; 1129 allxfer_len++; 1130 } 1131 pwbuffer->data_len=allxfer_len; 1132 /* 1133 ** push inbound doorbell tell iop driver data write ok and wait reply on next hwinterrupt for next Qbuffer post 1134 */ 1135 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell,ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK); 1136 } 1137 else 1138 { 1139 pACB->acb_flags |= ACB_F_IOCTL_WQBUFFER_CLEARED; 1140 } 1141 splx(s); 1142 } 1143 } 1144 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) 1145 { 1146 /* 1147 ***************************************************************************** 1148 ** areca cdb command done 1149 ***************************************************************************** 1150 */ 1151 while(1) 1152 { 1153 if((flagpsrb=CHIP_REG_READ32(&pACB->pmu->outbound_queueport)) == 0xFFFFFFFF) 1154 { 1155 break;/*chip FIFO no srb for completion already*/ 1156 } 1157 /* check if command done with no error*/ 1158 pSRB=(PSRB)(CINT2P)(pACB->vir2phy_offset+(flagpsrb << 5));/*frame must be 32 bytes aligned*/ 1159 if((pSRB->pACB!=pACB) || (pSRB->startdone!=ARCMSR_SRB_START)) 1160 { 1161 if(pSRB->startdone==ARCMSR_SRB_ABORTED) 1162 { 1163 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED; 1164 arcmsr_srb_complete(pSRB); 1165 break; 1166 } 1167 printf("arcmsr_interrupt:got an illegal srb command done ...pACB=%p pSRB=%p srboutstandingcount=%d .....\n",pACB,pSRB,pACB->srboutstandingcount); 1168 break; 1169 } 1170 if((flagpsrb & ARCMSR_SRBREPLY_FLAG_ERROR)==0) 1171 { 1172 pSRB->pccb->ccb_h.status=CAM_REQ_CMP; 1173 arcmsr_srb_complete(pSRB); 1174 } 1175 else 1176 { 1177 switch(pSRB->arcmsr_cdb.DeviceStatus) 1178 { 1179 case ARCMSR_DEV_SELECT_TIMEOUT: 1180 { 1181 #if ARCMSR_DEBUG0 1182 printf("pSRB=%p ......ARCMSR_DEV_SELECT_TIMEOUT\n",pSRB); 1183 #endif 1184 pSRB->pccb->ccb_h.status=CAM_SEL_TIMEOUT; 1185 arcmsr_srb_complete(pSRB); 1186 } 1187 break; 1188 case ARCMSR_DEV_ABORTED: 1189 { 1190 #if ARCMSR_DEBUG0 1191 printf("pSRB=%p ......ARCMSR_DEV_ABORTED\n",pSRB); 1192 #endif 1193 pSRB->pccb->ccb_h.status=CAM_DEV_NOT_THERE; 1194 arcmsr_srb_complete(pSRB); 1195 } 1196 break; 1197 case ARCMSR_DEV_INIT_FAIL: 1198 { 1199 #if ARCMSR_DEBUG0 1200 printf("pSRB=%p .....ARCMSR_DEV_INIT_FAIL\n",pSRB); 1201 #endif 1202 pSRB->pccb->ccb_h.status=CAM_DEV_NOT_THERE; 1203 arcmsr_srb_complete(pSRB); 1204 } 1205 break; 1206 case SCSISTAT_CHECK_CONDITION: 1207 { 1208 #if ARCMSR_DEBUG0 1209 printf("pSRB=%p .....SCSISTAT_CHECK_CONDITION\n",pSRB); 1210 #endif 1211 arcmsr_report_SenseInfoBuffer(pSRB); 1212 arcmsr_srb_complete(pSRB); 1213 } 1214 break; 1215 default: 1216 /* error occur Q all error srb to errorsrbpending Q*/ 1217 printf("arcmsr_interrupt:command error done ......but got unknow DeviceStatus=%x....\n",pSRB->arcmsr_cdb.DeviceStatus); 1218 pSRB->pccb->ccb_h.status=CAM_UNCOR_PARITY;/*unknow error or crc error just for retry*/ 1219 arcmsr_srb_complete(pSRB); 1220 break; 1221 } 1222 } 1223 } /*drain reply FIFO*/ 1224 } 1225 if(pACB->srbwait2gocount != 0) 1226 { 1227 arcmsr_post_wait2go_srb(pACB);/*try to post all pending srb*/ 1228 } 1229 return; 1230 } 1231 /* 1232 *********************************************************************** 1233 ** 1234 **int copyin __P((const void *udaddr, void *kaddr, size_t len)); 1235 **int copyout __P((const void *kaddr, void *udaddr, size_t len)); 1236 ** 1237 **ENOENT "" No such file or directory "" 1238 **ENOIOCTL "" ioctl not handled by this layer "" 1239 **ENOMEM "" Cannot allocate memory "" 1240 **EINVAL "" Invalid argument "" 1241 ************************************************************************ 1242 */ 1243 LONG arcmsr_iop_ioctlcmd(PACB pACB,ULONG ioctl_cmd,caddr_t arg) 1244 { 1245 PCMD_IO_CONTROL pccbioctl=(PCMD_IO_CONTROL) arg; 1246 1247 #if ARCMSR_DEBUG0 1248 printf("arcmsr_iop_ioctlcmd................. \n"); 1249 #endif 1250 1251 if(memcmp(pccbioctl->Signature,"ARCMSR",6)!=0) 1252 { 1253 return EINVAL; 1254 } 1255 switch(ioctl_cmd) 1256 { 1257 case ARCMSR_IOCTL_READ_RQBUFFER: 1258 { 1259 ULONG s; 1260 PCMD_IOCTL_FIELD pccbioctlfld=(PCMD_IOCTL_FIELD)arg; 1261 PUCHAR pQbuffer,ptmpQbuffer=pccbioctlfld->ioctldatabuffer; 1262 LONG allxfer_len=0; 1263 1264 s=splcam(); 1265 while((pACB->rqbuf_firstindex!=pACB->rqbuf_lastindex) && (allxfer_len<1031)) 1266 { 1267 /*copy READ QBUFFER to srb*/ 1268 pQbuffer=&pACB->rqbuffer[pACB->rqbuf_firstindex]; 1269 memcpy(ptmpQbuffer,pQbuffer,1); 1270 pACB->rqbuf_firstindex++; 1271 pACB->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; /*if last index number set it to 0 */ 1272 ptmpQbuffer++; 1273 allxfer_len++; 1274 } 1275 if(pACB->acb_flags & ACB_F_IOPDATA_OVERFLOW) 1276 { 1277 PQBUFFER prbuffer=(PQBUFFER)&pACB->pmu->ioctl_rbuffer; 1278 PUCHAR pQbuffer; 1279 PUCHAR iop_data=(PUCHAR)prbuffer->data; 1280 LONG iop_len; 1281 1282 pACB->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1283 iop_len=(LONG)prbuffer->data_len; 1284 /*this iop data does no chance to make me overflow again here, so just do it*/ 1285 while(iop_len>0) 1286 { 1287 pQbuffer=&pACB->rqbuffer[pACB->rqbuf_lastindex]; 1288 memcpy(pQbuffer,iop_data,1); 1289 pACB->rqbuf_lastindex++; 1290 pACB->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;/*if last index number set it to 0 */ 1291 iop_data++; 1292 iop_len--; 1293 } 1294 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK);/*signature, let IOP331 know data has been readed */ 1295 } 1296 pccbioctl->Length=allxfer_len; 1297 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_OK; 1298 splx(s); 1299 return ARC_IOCTL_SUCCESS; 1300 } 1301 break; 1302 case ARCMSR_IOCTL_WRITE_WQBUFFER: 1303 { 1304 ULONG s; 1305 PCMD_IOCTL_FIELD pccbioctlfld=(PCMD_IOCTL_FIELD)arg; 1306 LONG my_empty_len,user_len,wqbuf_firstindex,wqbuf_lastindex; 1307 PUCHAR pQbuffer,ptmpuserbuffer=pccbioctlfld->ioctldatabuffer; 1308 1309 s=splcam(); 1310 user_len=pccbioctl->Length; 1311 1312 /*check if data xfer length of this request will overflow my array qbuffer */ 1313 wqbuf_lastindex=pACB->wqbuf_lastindex; 1314 wqbuf_firstindex=pACB->wqbuf_firstindex; 1315 my_empty_len=(wqbuf_firstindex-wqbuf_lastindex-1)&(ARCMSR_MAX_QBUFFER-1); 1316 if(my_empty_len>=user_len) 1317 { 1318 while(user_len>0) 1319 { 1320 /*copy srb data to wqbuffer*/ 1321 pQbuffer=&pACB->wqbuffer[pACB->wqbuf_lastindex]; 1322 memcpy(pQbuffer,ptmpuserbuffer,1); 1323 pACB->wqbuf_lastindex++; 1324 pACB->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;/*if last index number set it to 0 */ 1325 ptmpuserbuffer++; 1326 user_len--; 1327 } 1328 /*post fist Qbuffer*/ 1329 if(pACB->acb_flags & ACB_F_IOCTL_WQBUFFER_CLEARED) 1330 { 1331 pACB->acb_flags &=~ACB_F_IOCTL_WQBUFFER_CLEARED; 1332 arcmsr_post_Qbuffer(pACB); 1333 } 1334 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_OK; 1335 } 1336 else 1337 { 1338 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_ERROR; 1339 } 1340 splx(s); 1341 return ARC_IOCTL_SUCCESS; 1342 } 1343 break; 1344 case ARCMSR_IOCTL_CLEAR_RQBUFFER: 1345 { 1346 ULONG s; 1347 PUCHAR pQbuffer=pACB->rqbuffer; 1348 s=splcam(); 1349 if(pACB->acb_flags & ACB_F_IOPDATA_OVERFLOW) 1350 { 1351 pACB->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1352 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK);/*signature, let IOP331 know data has been readed */ 1353 } 1354 pACB->acb_flags |= ACB_F_IOCTL_RQBUFFER_CLEARED; 1355 pACB->rqbuf_firstindex=0; 1356 pACB->rqbuf_lastindex=0; 1357 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1358 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_OK; 1359 splx(s); 1360 return ARC_IOCTL_SUCCESS; 1361 } 1362 break; 1363 case ARCMSR_IOCTL_CLEAR_WQBUFFER: 1364 { 1365 ULONG s; 1366 PUCHAR pQbuffer=pACB->wqbuffer; 1367 1368 s=splcam(); 1369 if(pACB->acb_flags & ACB_F_IOPDATA_OVERFLOW) 1370 { 1371 pACB->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1372 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK);/*signature, let IOP331 know data has been readed */ 1373 } 1374 pACB->acb_flags |= ACB_F_IOCTL_WQBUFFER_CLEARED; 1375 pACB->wqbuf_firstindex=0; 1376 pACB->wqbuf_lastindex=0; 1377 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1378 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_OK; 1379 splx(s); 1380 return ARC_IOCTL_SUCCESS; 1381 } 1382 break; 1383 case ARCMSR_IOCTL_CLEAR_ALLQBUFFER: 1384 { 1385 ULONG s; 1386 PUCHAR pQbuffer; 1387 1388 s=splcam(); 1389 if(pACB->acb_flags & ACB_F_IOPDATA_OVERFLOW) 1390 { 1391 pACB->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1392 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK);/*signature, let IOP331 know data has been readed */ 1393 } 1394 pACB->acb_flags |= (ACB_F_IOCTL_WQBUFFER_CLEARED|ACB_F_IOCTL_RQBUFFER_CLEARED); 1395 pACB->rqbuf_firstindex=0; 1396 pACB->rqbuf_lastindex=0; 1397 pACB->wqbuf_firstindex=0; 1398 pACB->wqbuf_lastindex=0; 1399 pQbuffer=pACB->rqbuffer; 1400 memset(pQbuffer, 0, sizeof(struct _QBUFFER)); 1401 pQbuffer=pACB->wqbuffer; 1402 memset(pQbuffer, 0, sizeof(struct _QBUFFER)); 1403 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_OK; 1404 splx(s); 1405 return ARC_IOCTL_SUCCESS; 1406 } 1407 break; 1408 case ARCMSR_IOCTL_RETURN_CODE_3F: 1409 { 1410 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_3F; 1411 return ARC_IOCTL_SUCCESS; 1412 } 1413 break; 1414 case ARCMSR_IOCTL_SAY_HELLO: 1415 { 1416 PCMD_IOCTL_FIELD pccbioctlfld=(PCMD_IOCTL_FIELD)arg; 1417 PCHAR hello_string="Hello! I am ARCMSR"; 1418 PCHAR puserbuffer=(PUCHAR)pccbioctlfld->ioctldatabuffer; 1419 1420 if(memcpy(puserbuffer,hello_string,(SHORT)strlen(hello_string))) 1421 { 1422 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_ERROR; 1423 return ENOIOCTL; 1424 } 1425 pccbioctl->ReturnCode=ARCMSR_IOCTL_RETURNCODE_OK; 1426 return ARC_IOCTL_SUCCESS; 1427 } 1428 break; 1429 } 1430 return EINVAL; 1431 } 1432 /* 1433 ************************************************************************** 1434 ** 1435 ************************************************************************** 1436 */ 1437 PSRB arcmsr_get_freesrb(PACB pACB) 1438 { 1439 PSRB pSRB=NULL; 1440 ULONG s; 1441 LONG srb_startindex,srb_doneindex; 1442 1443 #if ARCMSR_DEBUG0 1444 printf("arcmsr_get_freesrb: srb_startindex=%d srb_doneindex=%d\n",pACB->srb_startindex,pACB->srb_doneindex); 1445 #endif 1446 1447 s=splcam(); 1448 srb_doneindex=pACB->srb_doneindex; 1449 srb_startindex=pACB->srb_startindex; 1450 pSRB=pACB->psrbringQ[srb_startindex]; 1451 srb_startindex++; 1452 srb_startindex %= ARCMSR_MAX_FREESRB_NUM; 1453 if(srb_doneindex!=srb_startindex) 1454 { 1455 pACB->srb_startindex=srb_startindex; 1456 } 1457 else 1458 { 1459 pSRB=NULL; 1460 } 1461 splx(s); 1462 return(pSRB); 1463 } 1464 /* 1465 ********************************************************************* 1466 ** 1467 ** 1468 ** 1469 ********************************************************************* 1470 */ 1471 static VOID arcmsr_executesrb(VOID *arg,bus_dma_segment_t *dm_segs,LONG nseg,LONG error) 1472 { 1473 PSRB pSRB=(PSRB)arg; 1474 PACB pACB; 1475 union ccb *pccb; 1476 1477 #if ARCMSR_DEBUG0 1478 printf("arcmsr_executesrb........................................ \n" ); 1479 #endif 1480 1481 pccb=pSRB->pccb; 1482 pACB=(PACB)pSRB->pACB; 1483 if(error != 0) 1484 { 1485 if(error != EFBIG) 1486 { 1487 printf("arcmsr_executesrb:%d Unexepected error %x returned from " "bus_dmamap_load\n",pACB->pci_unit,error); 1488 } 1489 if(pccb->ccb_h.status == CAM_REQ_INPROG) 1490 { 1491 xpt_freeze_devq(pccb->ccb_h.path,/*count*/1); 1492 pccb->ccb_h.status=CAM_REQ_TOO_BIG|CAM_DEV_QFRZN; 1493 } 1494 xpt_done(pccb); 1495 return; 1496 } 1497 arcmsr_build_srb(pSRB,dm_segs,nseg); 1498 if((pccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) 1499 { 1500 if(nseg != 0) 1501 { 1502 bus_dmamap_unload(pACB->buffer_dmat,pSRB->dmamap); 1503 } 1504 xpt_done(pccb); 1505 return; 1506 } 1507 pccb->ccb_h.status |= CAM_SIM_QUEUED; 1508 if(pACB->srboutstandingcount < ARCMSR_MAX_OUTSTANDING_CMD) 1509 { 1510 /* 1511 ****************************************************************** 1512 ** and we can make sure there were no pending srb in this duration 1513 ****************************************************************** 1514 */ 1515 arcmsr_post_srb(pACB,pSRB); 1516 } 1517 else 1518 { 1519 /* 1520 ****************************************************************** 1521 ** Q of srbwaitexec will be post out when any outstanding command complete 1522 ****************************************************************** 1523 */ 1524 arcmsr_queue_wait2go_srb(pACB,pSRB); 1525 } 1526 return; 1527 } 1528 /* 1529 ***************************************************************************************** 1530 ** 1531 ***************************************************************************************** 1532 */ 1533 BOOLEAN arcmsr_seek_cmd2abort(union ccb * pabortccb) 1534 { 1535 PSRB pSRB,pfreesrb; 1536 PACB pACB=(PACB) pabortccb->ccb_h.arcmsr_ccbacb_ptr; 1537 ULONG s,intmask_org,mask; 1538 LONG i=0; 1539 1540 #if ARCMSR_DEBUG0 1541 printf("arcmsr_seek_cmd2abort.................. \n"); 1542 #endif 1543 1544 s=splcam(); 1545 /* 1546 ** It is the upper layer do abort command this lock just prior to calling us. 1547 ** First determine if we currently own this command. 1548 ** Start by searching the device queue. If not found 1549 ** at all,and the system wanted us to just abort the 1550 ** command return success. 1551 */ 1552 if(pACB->srboutstandingcount!=0) 1553 { 1554 /* Q back all outstanding srb into wait exec psrb Q*/ 1555 pfreesrb=pACB->pfreesrb; 1556 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++) 1557 { 1558 pSRB=&pfreesrb[i]; 1559 if(pSRB->startdone==ARCMSR_SRB_START) 1560 { 1561 if(pSRB->pccb==pabortccb) 1562 { 1563 /* disable all outbound interrupt */ 1564 intmask_org=CHIP_REG_READ32(&pACB->pmu->outbound_intmask); 1565 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE); 1566 /* talk to iop 331 outstanding command aborted*/ 1567 arcmsr_abort_allcmd(pACB); 1568 if(arcmsr_wait_msgint_ready(pACB)!=TRUE) 1569 { 1570 printf("arcmsr_seek_cmd2abort: wait 'abort all outstanding command' timeout.................in \n"); 1571 } 1572 /*clear all outbound posted Q*/ 1573 for(i=0;i<ARCMSR_MAX_OUTSTANDING_CMD;i++) 1574 { 1575 CHIP_REG_READ32(&pACB->pmu->outbound_queueport); 1576 } 1577 pfreesrb=pACB->pfreesrb; 1578 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++) 1579 { 1580 pSRB=&pfreesrb[i]; 1581 if(pSRB->startdone==ARCMSR_SRB_START) 1582 { 1583 pSRB->startdone=ARCMSR_SRB_ABORTED; 1584 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED; 1585 arcmsr_srb_complete(pSRB); 1586 } 1587 } 1588 /* enable all outbound interrupt */ 1589 mask=~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE|ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE); 1590 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,intmask_org & mask); 1591 splx(s); 1592 return(TRUE); 1593 } 1594 } 1595 } 1596 } 1597 /* 1598 ** seek this command at our command list 1599 ** if command found then remove,abort it and free this SRB 1600 */ 1601 if(pACB->srbwait2gocount!=0) 1602 { 1603 for(i=0;i<ARCMSR_MAX_OUTSTANDING_CMD;i++) 1604 { 1605 pSRB=pACB->psrbwait2go[i]; 1606 if(pSRB!=NULL) 1607 { 1608 if(pSRB->pccb==pabortccb) 1609 { 1610 pACB->psrbwait2go[i]=NULL; 1611 pSRB->startdone=ARCMSR_SRB_ABORTED; 1612 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED; 1613 arcmsr_srb_complete(pSRB); 1614 atomic_subtract_int(&pACB->srbwait2gocount,1); 1615 splx(s); 1616 return(TRUE); 1617 } 1618 } 1619 } 1620 } 1621 splx(s); 1622 return (FALSE); 1623 } 1624 /* 1625 **************************************************************************** 1626 ** 1627 **************************************************************************** 1628 */ 1629 VOID arcmsr_bus_reset(PACB pACB) 1630 { 1631 #if ARCMSR_DEBUG0 1632 printf("arcmsr_bus_reset.......................... \n"); 1633 #endif 1634 1635 arcmsr_iop_reset(pACB); 1636 return; 1637 } 1638 /* 1639 ********************************************************************* 1640 ** 1641 ** CAM Status field values 1642 **typedef enum { 1643 ** CAM_REQ_INPROG, CCB request is in progress 1644 ** CAM_REQ_CMP, CCB request completed without error 1645 ** CAM_REQ_ABORTED, CCB request aborted by the host 1646 ** CAM_UA_ABORT, Unable to abort CCB request 1647 ** CAM_REQ_CMP_ERR, CCB request completed with an error 1648 ** CAM_BUSY, CAM subsytem is busy 1649 ** CAM_REQ_INVALID, CCB request was invalid 1650 ** CAM_PATH_INVALID, Supplied Path ID is invalid 1651 ** CAM_DEV_NOT_THERE, SCSI Device Not Installed/there 1652 ** CAM_UA_TERMIO, Unable to terminate I/O CCB request 1653 ** CAM_SEL_TIMEOUT, Target Selection Timeout 1654 ** CAM_CMD_TIMEOUT, Command timeout 1655 ** CAM_SCSI_STATUS_ERROR, SCSI error, look at error code in CCB 1656 ** CAM_MSG_REJECT_REC, Message Reject Received 1657 ** CAM_SCSI_BUS_RESET, SCSI Bus Reset Sent/Received 1658 ** CAM_UNCOR_PARITY, Uncorrectable parity error occurred 1659 ** CAM_AUTOSENSE_FAIL=0x10, Autosense: request sense cmd fail 1660 ** CAM_NO_HBA, No HBA Detected error 1661 ** CAM_DATA_RUN_ERR, Data Overrun error 1662 ** CAM_UNEXP_BUSFREE, Unexpected Bus Free 1663 ** CAM_SEQUENCE_FAIL, Target Bus Phase Sequence Failure 1664 ** CAM_CCB_LEN_ERR, CCB length supplied is inadequate 1665 ** CAM_PROVIDE_FAIL, Unable to provide requested capability 1666 ** CAM_BDR_SENT, A SCSI BDR msg was sent to target 1667 ** CAM_REQ_TERMIO, CCB request terminated by the host 1668 ** CAM_UNREC_HBA_ERROR, Unrecoverable Host Bus Adapter Error 1669 ** CAM_REQ_TOO_BIG, The request was too large for this host 1670 ** CAM_REQUEUE_REQ, 1671 ** * This request should be requeued to preserve 1672 ** * transaction ordering. This typically occurs 1673 ** * when the SIM recognizes an error that should 1674 ** * freeze the queue and must place additional 1675 ** * requests for the target at the sim level 1676 ** * back into the XPT queue. 1677 ** 1678 ** CAM_IDE=0x33, Initiator Detected Error 1679 ** CAM_RESRC_UNAVAIL, Resource Unavailable 1680 ** CAM_UNACKED_EVENT, Unacknowledged Event by Host 1681 ** CAM_MESSAGE_RECV, Message Received in Host Target Mode 1682 ** CAM_INVALID_CDB, Invalid CDB received in Host Target Mode 1683 ** CAM_LUN_INVALID, Lun supplied is invalid 1684 ** CAM_TID_INVALID, Target ID supplied is invalid 1685 ** CAM_FUNC_NOTAVAIL, The requested function is not available 1686 ** CAM_NO_NEXUS, Nexus is not established 1687 ** CAM_IID_INVALID, The initiator ID is invalid 1688 ** CAM_CDB_RECVD, The SCSI CDB has been received 1689 ** CAM_LUN_ALRDY_ENA, The LUN is already eanbeld for target mode 1690 ** CAM_SCSI_BUSY, SCSI Bus Busy 1691 ** 1692 ** CAM_DEV_QFRZN=0x40, The DEV queue is frozen w/this err 1693 ** 1694 ** Autosense data valid for target 1695 ** CAM_AUTOSNS_VALID=0x80, 1696 ** CAM_RELEASE_SIMQ=0x100, SIM ready to take more commands 1697 ** CAM_SIM_QUEUED =0x200, SIM has this command in it's queue 1698 ** 1699 ** CAM_STATUS_MASK=0x3F, Mask bits for just the status # 1700 ** 1701 ** Target Specific Adjunct Status 1702 ** CAM_SENT_SENSE=0x40000000 sent sense with status 1703 **} cam_status; 1704 ** 1705 **union ccb { 1706 ** struct ccb_hdr ccb_h; For convenience 1707 ** struct ccb_scsiio csio; 1708 ** struct ccb_getdev cgd; 1709 ** struct ccb_getdevlist cgdl; 1710 ** struct ccb_pathinq cpi; 1711 ** struct ccb_relsim crs; 1712 ** struct ccb_setasync csa; 1713 ** struct ccb_setdev csd; 1714 ** struct ccb_pathstats cpis; 1715 ** struct ccb_getdevstats cgds; 1716 ** struct ccb_dev_match cdm; 1717 ** struct ccb_trans_settings cts; 1718 ** struct ccb_calc_geometry ccg; 1719 ** struct ccb_abort cab; 1720 ** struct ccb_resetbus crb; 1721 ** struct ccb_resetdev crd; 1722 ** struct ccb_termio tio; 1723 ** struct ccb_accept_tio atio; 1724 ** struct ccb_scsiio ctio; 1725 ** struct ccb_en_lun cel; 1726 ** struct ccb_immed_notify cin; 1727 ** struct ccb_notify_ack cna; 1728 ** struct ccb_eng_inq cei; 1729 ** struct ccb_eng_exec cee; 1730 ** struct ccb_rescan crcn; 1731 ** struct ccb_debug cdbg; 1732 ** } 1733 ** 1734 **struct ccb_hdr { 1735 ** cam_pinfo pinfo; "" Info for priority scheduling 1736 ** camq_entry xpt_links; "" For chaining in the XPT layer 1737 ** camq_entry sim_links; "" For chaining in the SIM layer 1738 ** camq_entry periph_links; "" For chaining in the type driver 1739 ** u_int32_t retry_count; 1740 ** void (*cbfcnp)(struct cam_periph *, union ccb *);"" Callback on completion function 1741 ** xpt_opcode func_code; "" XPT function code 1742 ** u_int32_t status; "" Status returned by CAM subsystem 1743 ** struct cam_path *path; "" Compiled path for this ccb 1744 ** path_id_t path_id; "" Path ID for the request 1745 ** target_id_t target_id; "" Target device ID 1746 ** lun_id_t target_lun; "" Target LUN number 1747 ** u_int32_t flags; 1748 ** ccb_ppriv_area periph_priv; 1749 ** ccb_spriv_area sim_priv; 1750 ** u_int32_t timeout; "" Timeout value 1751 ** struct callout_handle timeout_ch; "" Callout handle used for timeouts 1752 **}; 1753 ** 1754 **typedef union { 1755 ** u_int8_t *cdb_ptr; "" Pointer to the CDB bytes to send 1756 ** u_int8_t cdb_bytes[IOCDBLEN]; "" Area for the CDB send 1757 **} cdb_t; 1758 ** 1759 ** SCSI I/O Request CCB used for the XPT_SCSI_IO and XPT_CONT_TARGET_IO 1760 ** function codes. 1761 ** 1762 **struct ccb_scsiio { 1763 ** struct ccb_hdr ccb_h; 1764 ** union ccb *next_ccb; "" Ptr for next CCB for action 1765 ** u_int8_t *req_map; "" Ptr to mapping info 1766 ** u_int8_t *data_ptr; "" Ptr to the data buf/SG list 1767 ** u_int32_t dxfer_len; "" Data transfer length 1768 ** struct scsi_sense_data sense_data; "" Autosense storage 1769 ** u_int8_t sense_len; "" Number of bytes to autosense 1770 ** u_int8_t cdb_len; "" Number of bytes for the CDB 1771 ** u_int16_t sglist_cnt; "" Number of SG list entries 1772 ** u_int8_t scsi_status; "" Returned SCSI status 1773 ** u_int8_t sense_resid; "" Autosense resid length: 2's comp 1774 ** u_int32_t resid; "" Transfer residual length: 2's comp 1775 ** cdb_t cdb_io; "" Union for CDB bytes/pointer 1776 ** u_int8_t *msg_ptr; "" Pointer to the message buffer 1777 ** u_int16_t msg_len; "" Number of bytes for the Message 1778 ** u_int8_t tag_action; "" What to do for tag queueing 1779 **#define CAM_TAG_ACTION_NONE 0x00 "" The tag action should be either the define below (to send a non-tagged transaction) or one of the defined scsi tag messages from scsi_message.h. 1780 ** u_int tag_id; "" tag id from initator (target mode) 1781 ** u_int init_id; "" initiator id of who selected 1782 **} 1783 ********************************************************************* 1784 */ 1785 static VOID arcmsr_action(struct cam_sim * psim,union ccb * pccb) 1786 { 1787 PACB pACB; 1788 1789 #if ARCMSR_DEBUG0 1790 printf("arcmsr_action ..................................\n" ); 1791 #endif 1792 1793 pACB=(PACB) cam_sim_softc(psim); 1794 if(pACB==NULL) 1795 { 1796 pccb->ccb_h.status=CAM_REQ_INVALID; 1797 xpt_done(pccb); 1798 return; 1799 } 1800 switch (pccb->ccb_h.func_code) 1801 { 1802 case XPT_SCSI_IO: 1803 { 1804 PSRB pSRB; 1805 #if ARCMSR_DEBUG0 1806 printf("arcmsr_action: XPT_SCSI_IO......................\n" ); 1807 #endif 1808 1809 if((pSRB=arcmsr_get_freesrb(pACB)) == NULL) 1810 { 1811 pccb->ccb_h.status=CAM_RESRC_UNAVAIL; 1812 xpt_done(pccb); 1813 return; 1814 } 1815 pccb->ccb_h.arcmsr_ccbsrb_ptr=pSRB; 1816 pccb->ccb_h.arcmsr_ccbacb_ptr=pACB; 1817 pSRB->pccb=pccb; 1818 if((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) 1819 { 1820 if((pccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) 1821 { 1822 if((pccb->ccb_h.flags & CAM_DATA_PHYS) == 0) 1823 { 1824 LONG error,s; 1825 1826 s=splsoftvm(); 1827 error = bus_dmamap_load(pACB->buffer_dmat,pSRB->dmamap,pccb->csio.data_ptr,pccb->csio.dxfer_len,arcmsr_executesrb,pSRB,/*flags*/0); 1828 if(error == EINPROGRESS) 1829 { 1830 xpt_freeze_simq(pACB->psim,1); 1831 pccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1832 } 1833 splx(s); 1834 } 1835 else 1836 { 1837 panic("arcmsr: CAM_DATA_PHYS not supported"); 1838 } 1839 } 1840 else 1841 { 1842 struct bus_dma_segment *segs; 1843 1844 if((pccb->ccb_h.flags & CAM_SG_LIST_PHYS) == 0 || (pccb->ccb_h.flags & CAM_DATA_PHYS) != 0) 1845 { 1846 pccb->ccb_h.status=CAM_PROVIDE_FAIL; 1847 xpt_done(pccb); 1848 free(pSRB,M_DEVBUF); 1849 return; 1850 } 1851 segs=(struct bus_dma_segment *)pccb->csio.data_ptr; 1852 arcmsr_executesrb(pSRB,segs,pccb->csio.sglist_cnt,0); 1853 } 1854 } 1855 else 1856 { 1857 arcmsr_executesrb(pSRB,NULL,0,0); 1858 } 1859 break; 1860 } 1861 case XPT_TARGET_IO: 1862 { 1863 #if ARCMSR_DEBUG0 1864 printf("arcmsr_action: XPT_TARGET_IO\n" ); 1865 #endif 1866 /* 1867 ** target mode not yet support vendor specific commands. 1868 */ 1869 pccb->ccb_h.status=CAM_REQ_CMP; 1870 xpt_done(pccb); 1871 break; 1872 } 1873 case XPT_PATH_INQ: 1874 { 1875 struct ccb_pathinq *cpi=&pccb->cpi; 1876 1877 #if ARCMSR_DEBUG0 1878 printf("arcmsr_action: XPT_PATH_INQ\n" ); 1879 #endif 1880 cpi->version_num=1; 1881 cpi->hba_inquiry=PI_SDTR_ABLE | PI_TAG_ABLE; 1882 cpi->target_sprt=0; 1883 cpi->hba_misc=0; 1884 cpi->hba_eng_cnt=0; 1885 cpi->max_target=ARCMSR_MAX_TARGETID; 1886 cpi->max_lun=ARCMSR_MAX_TARGETLUN; /* 7 or 0 */ 1887 cpi->initiator_id=ARCMSR_SCSI_INITIATOR_ID; 1888 cpi->bus_id=cam_sim_bus(psim); 1889 strncpy(cpi->sim_vid,"FreeBSD",SIM_IDLEN); 1890 strncpy(cpi->hba_vid,"ARCMSR",HBA_IDLEN); 1891 strncpy(cpi->dev_name,cam_sim_name(psim),DEV_IDLEN); 1892 cpi->unit_number=cam_sim_unit(psim); 1893 cpi->ccb_h.status=CAM_REQ_CMP; 1894 #ifdef CAM_NEW_TRAN_CODE 1895 cpi->transport = XPORT_SPI; 1896 cpi->transport_version = 2; 1897 cpi->protocol = PROTO_SCSI; 1898 cpi->protocol_version = SCSI_REV_2; 1899 #endif 1900 xpt_done(pccb); 1901 break; 1902 } 1903 case XPT_ABORT: 1904 { 1905 union ccb *pabort_ccb; 1906 1907 #if ARCMSR_DEBUG0 1908 printf("arcmsr_action: XPT_ABORT\n" ); 1909 #endif 1910 pabort_ccb=pccb->cab.abort_ccb; 1911 switch (pabort_ccb->ccb_h.func_code) 1912 { 1913 case XPT_ACCEPT_TARGET_IO: 1914 case XPT_IMMED_NOTIFY: 1915 case XPT_CONT_TARGET_IO: 1916 if(arcmsr_seek_cmd2abort(pabort_ccb)==TRUE) 1917 { 1918 pabort_ccb->ccb_h.status=CAM_REQ_ABORTED; 1919 xpt_done(pabort_ccb); 1920 pccb->ccb_h.status=CAM_REQ_CMP; 1921 } 1922 else 1923 { 1924 xpt_print_path(pabort_ccb->ccb_h.path); 1925 printf("Not found\n"); 1926 pccb->ccb_h.status=CAM_PATH_INVALID; 1927 } 1928 break; 1929 case XPT_SCSI_IO: 1930 pccb->ccb_h.status=CAM_UA_ABORT; 1931 break; 1932 default: 1933 pccb->ccb_h.status=CAM_REQ_INVALID; 1934 break; 1935 } 1936 xpt_done(pccb); 1937 break; 1938 } 1939 case XPT_RESET_BUS: 1940 case XPT_RESET_DEV: 1941 { 1942 LONG i; 1943 1944 #if ARCMSR_DEBUG0 1945 printf("arcmsr_action: XPT_RESET_BUS\n" ); 1946 #endif 1947 arcmsr_bus_reset(pACB); 1948 for (i=0; i < 500; i++) 1949 { 1950 DELAY(1000); 1951 } 1952 pccb->ccb_h.status=CAM_REQ_CMP; 1953 xpt_done(pccb); 1954 break; 1955 } 1956 case XPT_TERM_IO: 1957 { 1958 #if ARCMSR_DEBUG0 1959 printf("arcmsr_action: XPT_TERM_IO\n" ); 1960 #endif 1961 pccb->ccb_h.status=CAM_REQ_INVALID; 1962 xpt_done(pccb); 1963 break; 1964 } 1965 case XPT_GET_TRAN_SETTINGS: 1966 { 1967 struct ccb_trans_settings *cts = &pccb->cts; 1968 ULONG s; 1969 #ifdef CAM_NEW_TRAN_CODE 1970 struct ccb_trans_settings_scsi *scsi = 1971 &cts->proto_specific.scsi; 1972 struct ccb_trans_settings_spi *spi = 1973 &cts->xport_specific.spi; 1974 1975 cts->protocol = PROTO_SCSI; 1976 cts->protocol_version = SCSI_REV_2; 1977 cts->transport = XPORT_SPI; 1978 cts->transport_version = 2; 1979 1980 #endif 1981 1982 #if ARCMSR_DEBUG0 1983 printf("arcmsr_action: XPT_GET_TRAN_SETTINGS\n" ); 1984 #endif 1985 1986 s=splcam(); 1987 #ifdef CAM_NEW_TRAN_CODE 1988 spi->flags = CTS_SPI_FLAGS_DISC_ENB; 1989 spi->sync_period=3; 1990 spi->sync_offset=32; 1991 spi->bus_width=MSG_EXT_WDTR_BUS_16_BIT; 1992 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB; 1993 spi->valid = CTS_SPI_VALID_SYNC_RATE 1994 | CTS_SPI_VALID_SYNC_OFFSET 1995 | CTS_SPI_VALID_BUS_WIDTH; 1996 scsi->valid = CTS_SCSI_VALID_TQ; 1997 #else 1998 cts->flags=(CCB_TRANS_DISC_ENB | CCB_TRANS_TAG_ENB); 1999 cts->sync_period=3; 2000 cts->sync_offset=32; 2001 cts->bus_width=MSG_EXT_WDTR_BUS_16_BIT; 2002 cts->valid=CCB_TRANS_SYNC_RATE_VALID | CCB_TRANS_SYNC_OFFSET_VALID | CCB_TRANS_BUS_WIDTH_VALID | CCB_TRANS_DISC_VALID | CCB_TRANS_TQ_VALID; 2003 #endif 2004 splx(s); 2005 pccb->ccb_h.status=CAM_REQ_CMP; 2006 xpt_done(pccb); 2007 break; 2008 } 2009 case XPT_SET_TRAN_SETTINGS: 2010 { 2011 #if ARCMSR_DEBUG0 2012 printf("arcmsr_action: XPT_SET_TRAN_SETTINGS\n" ); 2013 #endif 2014 pccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 2015 xpt_done(pccb); 2016 break; 2017 } 2018 case XPT_CALC_GEOMETRY: 2019 { 2020 struct ccb_calc_geometry *ccg; 2021 ULONG size_mb; 2022 ULONG secs_per_cylinder; 2023 2024 #if ARCMSR_DEBUG0 2025 printf("arcmsr_action: XPT_CALC_GEOMETRY\n" ); 2026 #endif 2027 ccg=&pccb->ccg; 2028 size_mb=ccg->volume_size/((1024L * 1024L)/ccg->block_size); 2029 if(size_mb > 1024 ) 2030 { 2031 ccg->heads=255; 2032 ccg->secs_per_track=63; 2033 } 2034 else 2035 { 2036 ccg->heads=64; 2037 ccg->secs_per_track=32; 2038 } 2039 secs_per_cylinder=ccg->heads * ccg->secs_per_track; 2040 ccg->cylinders=ccg->volume_size / secs_per_cylinder; 2041 pccb->ccb_h.status=CAM_REQ_CMP; 2042 xpt_done(pccb); 2043 break; 2044 } 2045 default: 2046 #if ARCMSR_DEBUG0 2047 printf("arcmsr_action: invalid XPT function CAM_REQ_INVALID\n" ); 2048 #endif 2049 pccb->ccb_h.status=CAM_REQ_INVALID; 2050 xpt_done(pccb); 2051 break; 2052 } 2053 return; 2054 } 2055 /* 2056 ********************************************************************** 2057 ** 2058 ** start background rebuild 2059 ** 2060 ********************************************************************** 2061 */ 2062 VOID arcmsr_start_adapter_bgrb(PACB pACB) 2063 { 2064 #if ARCMSR_DEBUG0 2065 printf("arcmsr_start_adapter_bgrb.................................. \n"); 2066 #endif 2067 pACB->acb_flags |= ACB_F_MSG_START_BGRB; 2068 pACB->acb_flags &= ~ACB_F_MSG_STOP_BGRB; 2069 CHIP_REG_WRITE32(&pACB->pmu->inbound_msgaddr0,ARCMSR_INBOUND_MESG0_START_BGRB); 2070 return; 2071 } 2072 /* 2073 ********************************************************************** 2074 ** 2075 ** start background rebuild 2076 ** 2077 ********************************************************************** 2078 */ 2079 VOID arcmsr_iop_init(PACB pACB) 2080 { 2081 ULONG intmask_org,mask,outbound_doorbell,firmware_state=0; 2082 2083 #if ARCMSR_DEBUG0 2084 printf("arcmsr_iop_init.................................. \n"); 2085 #endif 2086 do 2087 { 2088 firmware_state=CHIP_REG_READ32(&pACB->pmu->outbound_msgaddr1); 2089 }while((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK)==0); 2090 /* disable all outbound interrupt */ 2091 intmask_org=CHIP_REG_READ32(&pACB->pmu->outbound_intmask); 2092 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE); 2093 /*start background rebuild*/ 2094 arcmsr_start_adapter_bgrb(pACB); 2095 if(arcmsr_wait_msgint_ready(pACB)!=TRUE) 2096 { 2097 printf("arcmsr_HwInitialize: wait 'start adapter background rebuild' timeout................. \n"); 2098 } 2099 /* clear Qbuffer if door bell ringed */ 2100 outbound_doorbell=CHIP_REG_READ32(&pACB->pmu->outbound_doorbell); 2101 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) 2102 { 2103 CHIP_REG_WRITE32(&pACB->pmu->outbound_doorbell,outbound_doorbell);/*clear interrupt */ 2104 CHIP_REG_WRITE32(&pACB->pmu->inbound_doorbell,ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 2105 } 2106 /* enable outbound Post Queue,outbound message0,outbell doorbell Interrupt */ 2107 mask=~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE|ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE); 2108 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,intmask_org & mask); 2109 pACB->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff; 2110 pACB->acb_flags |=ACB_F_IOP_INITED; 2111 return; 2112 } 2113 /* 2114 ********************************************************************** 2115 ** 2116 ** map freesrb 2117 ** 2118 ********************************************************************** 2119 */ 2120 static void arcmsr_map_freesrb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 2121 { 2122 PACB pACB=arg; 2123 PSRB psrb_tmp,pfreesrb; 2124 ULONG cdb_phyaddr; 2125 LONG i; 2126 2127 pfreesrb=(PSRB)pACB->uncacheptr; 2128 cdb_phyaddr=segs->ds_addr; /* We suppose bus_addr_t high part always 0 here*/ 2129 if(((CPT2INT)pACB->uncacheptr & 0x1F)!=0) 2130 { 2131 pfreesrb=pfreesrb+(0x20-((CPT2INT)pfreesrb & 0x1F)); 2132 cdb_phyaddr=cdb_phyaddr+(0x20-((CPT2INT)cdb_phyaddr & 0x1F)); 2133 } 2134 /* 2135 ******************************************************************** 2136 ** here we need to tell iop 331 our freesrb.HighPart 2137 ** if freesrb.HighPart is not zero 2138 ******************************************************************** 2139 */ 2140 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++) 2141 { 2142 psrb_tmp=&pfreesrb[i]; 2143 if(((CPT2INT)psrb_tmp & 0x1F)==0) /*srb address must 32 (0x20) boundary*/ 2144 { 2145 if(bus_dmamap_create(pACB->buffer_dmat, /*flags*/0, &psrb_tmp->dmamap)!=0) 2146 { 2147 pACB->acb_flags |= ACB_F_MAPFREESRB_FAILD; 2148 printf(" arcmsr_map_freesrb: (pSRB->dmamap) bus_dmamap_create ..............error\n"); 2149 return; 2150 } 2151 psrb_tmp->cdb_shifted_phyaddr=cdb_phyaddr >> 5; 2152 psrb_tmp->pACB=pACB; 2153 pACB->psrbringQ[i]=psrb_tmp; 2154 cdb_phyaddr=cdb_phyaddr+sizeof(struct _SRB); 2155 } 2156 else 2157 { 2158 pACB->acb_flags |= ACB_F_MAPFREESRB_FAILD; 2159 printf(" arcmsr_map_freesrb:pfreesrb=%p i=%d this srb cross 32 bytes boundary ignored ......psrb_tmp=%p \n",pfreesrb,i,psrb_tmp); 2160 return; 2161 } 2162 } 2163 pACB->pfreesrb=pfreesrb; 2164 pACB->vir2phy_offset=(CPT2INT)psrb_tmp-(cdb_phyaddr-sizeof(struct _SRB)); 2165 return; 2166 } 2167 /* 2168 ************************************************************************ 2169 ** 2170 ** 2171 ************************************************************************ 2172 */ 2173 VOID arcmsr_free_resource(PACB pACB) 2174 { 2175 /* remove the control device */ 2176 if (pACB->ioctl_dev != NULL) 2177 { 2178 destroy_dev(pACB->ioctl_dev); 2179 } 2180 bus_dmamap_unload(pACB->srb_dmat, pACB->srb_dmamap); 2181 bus_dmamap_destroy(pACB->srb_dmat, pACB->srb_dmamap); 2182 bus_dma_tag_destroy(pACB->srb_dmat); 2183 bus_dma_tag_destroy(pACB->buffer_dmat); 2184 bus_dma_tag_destroy(pACB->parent_dmat); 2185 return; 2186 } 2187 /* 2188 ************************************************************************ 2189 ** PCI config header registers for all devices 2190 ** 2191 ** #define PCIR_COMMAND 0x04 2192 ** #define PCIM_CMD_PORTEN 0x0001 2193 ** #define PCIM_CMD_MEMEN 0x0002 2194 ** #define PCIM_CMD_BUSMASTEREN 0x0004 2195 ** #define PCIM_CMD_MWRICEN 0x0010 2196 ** #define PCIM_CMD_PERRESPEN 0x0040 2197 ** 2198 ** Function : arcmsr_initialize 2199 ** Purpose : initialize the internal structures for a given SCSI host 2200 ** Inputs : host - pointer to this host adapter's structure 2201 ** Preconditions : when this function is called,the chip_type 2202 ** field of the pACB structure MUST have been set. 2203 ** 2204 ** 10h Base Address register #0 2205 ** 14h Base Address register #1 2206 ** 18h Base Address register #2 2207 ** 1Ch Base Address register #3 2208 ** 20h Base Address register #4 2209 ** 24h Base Address register #5 2210 ************************************************************************ 2211 */ 2212 static LONG arcmsr_initialize(device_t dev) 2213 { 2214 PACB pACB=device_get_softc(dev); 2215 LONG rid=PCI_BASE_ADDR0; 2216 vm_offset_t mem_base; 2217 USHORT pci_command; 2218 2219 #if ARCMSR_DEBUG0 2220 printf("arcmsr_initialize..............................\n"); 2221 #endif 2222 #if __FreeBSD_version >= 502010 2223 if (bus_dma_tag_create( /*parent*/NULL, 2224 /*alignemnt*/1, 2225 /*boundary*/0, 2226 /*lowaddr*/BUS_SPACE_MAXADDR, 2227 /*highaddr*/BUS_SPACE_MAXADDR, 2228 /*filter*/NULL, 2229 /*filterarg*/NULL, 2230 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT, 2231 /*nsegments*/BUS_SPACE_UNRESTRICTED, 2232 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 2233 /*flags*/0, 2234 /*lockfunc*/NULL, 2235 /*lockarg*/NULL, 2236 &pACB->parent_dmat) != 0) 2237 #else 2238 if (bus_dma_tag_create( /*parent*/NULL, 2239 /*alignemnt*/1, 2240 /*boundary*/0, 2241 /*lowaddr*/BUS_SPACE_MAXADDR, 2242 /*highaddr*/BUS_SPACE_MAXADDR, 2243 /*filter*/NULL, 2244 /*filterarg*/NULL, 2245 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT, 2246 /*nsegments*/BUS_SPACE_UNRESTRICTED, 2247 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 2248 /*flags*/0, 2249 &pACB->parent_dmat) != 0) 2250 #endif 2251 { 2252 printf("arcmsr_initialize: bus_dma_tag_create .......................failure!\n"); 2253 return ENOMEM; 2254 } 2255 /* Create a single tag describing a region large enough to hold all of the s/g lists we will need. */ 2256 #if __FreeBSD_version >= 502010 2257 if(bus_dma_tag_create( /*parent_dmat*/pACB->parent_dmat, 2258 /*alignment*/1, 2259 /*boundary*/0, 2260 /*lowaddr*/BUS_SPACE_MAXADDR, 2261 /*highaddr*/BUS_SPACE_MAXADDR, 2262 /*filter*/NULL, 2263 /*filterarg*/NULL, 2264 /*maxsize*/MAXBSIZE, 2265 /*nsegments*/ARCMSR_MAX_SG_ENTRIES, 2266 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 2267 /*flags*/BUS_DMA_ALLOCNOW, 2268 /*lockfunc*/busdma_lock_mutex, 2269 /*lockarg*/&Giant, 2270 &pACB->buffer_dmat) != 0) 2271 #else 2272 if(bus_dma_tag_create( /*parent_dmat*/pACB->parent_dmat, 2273 /*alignment*/1, 2274 /*boundary*/0, 2275 /*lowaddr*/BUS_SPACE_MAXADDR, 2276 /*highaddr*/BUS_SPACE_MAXADDR, 2277 /*filter*/NULL, 2278 /*filterarg*/NULL, 2279 /*maxsize*/MAXBSIZE, 2280 /*nsegments*/ARCMSR_MAX_SG_ENTRIES, 2281 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 2282 /*flags*/BUS_DMA_ALLOCNOW, 2283 &pACB->buffer_dmat) != 0) 2284 #endif 2285 { 2286 bus_dma_tag_destroy(pACB->parent_dmat); 2287 printf("arcmsr_initialize: bus_dma_tag_create ............................failure!\n"); 2288 return ENOMEM; 2289 } 2290 /* DMA tag for our srb structures.... Allocate the pfreesrb memory */ 2291 #if __FreeBSD_version >= 502010 2292 if (bus_dma_tag_create( /*parent_dmat*/pACB->parent_dmat, 2293 /*alignment*/1, 2294 /*boundary*/0, 2295 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 2296 /*highaddr*/BUS_SPACE_MAXADDR, 2297 /*filter*/NULL, 2298 /*filterarg*/NULL, 2299 /*maxsize*/((sizeof(struct _SRB) * ARCMSR_MAX_FREESRB_NUM)+0x20), 2300 /*nsegments*/1, 2301 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 2302 /*flags*/0, 2303 /*lockfunc*/NULL, 2304 /*lockarg*/NULL, 2305 &pACB->srb_dmat) != 0) 2306 #else 2307 if (bus_dma_tag_create( /*parent_dmat*/pACB->parent_dmat, 2308 /*alignment*/1, 2309 /*boundary*/0, 2310 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 2311 /*highaddr*/BUS_SPACE_MAXADDR, 2312 /*filter*/NULL, 2313 /*filterarg*/NULL, 2314 /*maxsize*/((sizeof(struct _SRB) * ARCMSR_MAX_FREESRB_NUM)+0x20), 2315 /*nsegments*/1, 2316 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, 2317 /*flags*/0, 2318 &pACB->srb_dmat) != 0) 2319 #endif 2320 { 2321 bus_dma_tag_destroy(pACB->buffer_dmat); 2322 bus_dma_tag_destroy(pACB->parent_dmat); 2323 printf("arcmsr_initialize: pACB->srb_dmat bus_dma_tag_create .....................failure!\n"); 2324 return ENXIO; 2325 } 2326 /* Allocation for our srbs */ 2327 if (bus_dmamem_alloc(pACB->srb_dmat, (void **)&pACB->uncacheptr, BUS_DMA_WAITOK | BUS_DMA_COHERENT, &pACB->srb_dmamap) != 0) 2328 { 2329 bus_dma_tag_destroy(pACB->srb_dmat); 2330 bus_dma_tag_destroy(pACB->buffer_dmat); 2331 bus_dma_tag_destroy(pACB->parent_dmat); 2332 printf("arcmsr_initialize: pACB->srb_dmat bus_dma_tag_create ...............failure!\n"); 2333 return ENXIO; 2334 } 2335 /* And permanently map them */ 2336 if(bus_dmamap_load(pACB->srb_dmat, pACB->srb_dmamap,pACB->uncacheptr,(sizeof(struct _SRB) * ARCMSR_MAX_FREESRB_NUM)+0x20,arcmsr_map_freesrb, pACB, /*flags*/0)) 2337 { 2338 bus_dma_tag_destroy(pACB->srb_dmat); 2339 bus_dma_tag_destroy(pACB->buffer_dmat); 2340 bus_dma_tag_destroy(pACB->parent_dmat); 2341 printf("arcmsr_initialize: bus_dmamap_load................... failure!\n"); 2342 return ENXIO; 2343 } 2344 pci_command=pci_read_config(dev,PCIR_COMMAND,2); 2345 pci_command |= PCIM_CMD_BUSMASTEREN; 2346 pci_command |= PCIM_CMD_PERRESPEN; 2347 pci_command |= PCIM_CMD_MWRICEN; 2348 /* Enable Busmaster/Mem */ 2349 pci_command |= PCIM_CMD_MEMEN; 2350 pci_write_config(dev,PCIR_COMMAND,pci_command,2); 2351 pACB->sys_res_arcmsr=bus_alloc_resource(dev,SYS_RES_MEMORY,&rid,0,~0,0x1000,RF_ACTIVE); 2352 if(pACB->sys_res_arcmsr == NULL) 2353 { 2354 arcmsr_free_resource(pACB); 2355 printf("arcmsr_initialize: bus_alloc_resource .....................failure!\n"); 2356 return ENOMEM; 2357 } 2358 if(rman_get_start(pACB->sys_res_arcmsr) <= 0) 2359 { 2360 arcmsr_free_resource(pACB); 2361 printf("arcmsr_initialize: rman_get_start ...........................failure!\n"); 2362 return ENXIO; 2363 } 2364 mem_base=(vm_offset_t) rman_get_virtual(pACB->sys_res_arcmsr); 2365 if(mem_base==0) 2366 { 2367 arcmsr_free_resource(pACB); 2368 printf("arcmsr_initialize: rman_get_virtual ..........................failure!\n"); 2369 return ENXIO; 2370 } 2371 if(pACB->acb_flags & ACB_F_MAPFREESRB_FAILD) 2372 { 2373 arcmsr_free_resource(pACB); 2374 printf("arcmsr_initialize: arman_get_virtual ..........................failure!\n"); 2375 return ENXIO; 2376 } 2377 pACB->btag=rman_get_bustag(pACB->sys_res_arcmsr); 2378 pACB->bhandle=rman_get_bushandle(pACB->sys_res_arcmsr); 2379 pACB->pmu=(PMU)mem_base; 2380 pACB->acb_flags |= (ACB_F_IOCTL_WQBUFFER_CLEARED|ACB_F_IOCTL_RQBUFFER_CLEARED); 2381 pACB->acb_flags &= ~ACB_F_SCSISTOPADAPTER; 2382 arcmsr_iop_init(pACB); 2383 return(0); 2384 } 2385 /* 2386 ************************************************************************ 2387 ** 2388 ** attach and init a host adapter 2389 ** 2390 ************************************************************************ 2391 */ 2392 static LONG arcmsr_attach(device_t dev) 2393 { 2394 PACB pACB=device_get_softc(dev); 2395 LONG unit=device_get_unit(dev); 2396 struct ccb_setasync csa; 2397 struct cam_devq *devq; /* Device Queue to use for this SIM */ 2398 struct resource *irqres; 2399 int rid; 2400 2401 #if ARCMSR_DEBUG0 2402 printf("arcmsr_attach .............................\n" ); 2403 #endif 2404 2405 if(arcmsr_initialize(dev)) 2406 { 2407 printf("arcmsr_attach: arcmsr_initialize failure!\n"); 2408 return ENXIO; 2409 } 2410 /* After setting up the adapter,map our interrupt */ 2411 rid=0; 2412 irqres=bus_alloc_resource(dev,SYS_RES_IRQ,&rid,0,~0,1,RF_SHAREABLE | RF_ACTIVE); 2413 if(irqres == NULL || bus_setup_intr(dev,irqres,INTR_TYPE_CAM,arcmsr_interrupt,pACB,&pACB->ih)) 2414 { 2415 arcmsr_free_resource(pACB); 2416 printf("arcmsr%d: unable to register interrupt handler!\n",unit); 2417 return ENXIO; 2418 } 2419 pACB->irqres=irqres; 2420 pACB->pci_dev=dev; 2421 pACB->pci_unit=unit; 2422 /* 2423 * Now let the CAM generic SCSI layer find the SCSI devices on 2424 * the bus * start queue to reset to the idle loop. * 2425 * Create device queue of SIM(s) * (MAX_START_JOB - 1) : 2426 * max_sim_transactions 2427 */ 2428 devq=cam_simq_alloc(ARCMSR_MAX_START_JOB); 2429 if(devq == NULL) 2430 { 2431 arcmsr_free_resource(pACB); 2432 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irqres); 2433 printf("arcmsr_attach: cam_simq_alloc failure!\n"); 2434 return ENXIO; 2435 } 2436 pACB->psim=cam_sim_alloc(arcmsr_action,arcmsr_poll,"arcmsr",pACB,pACB->pci_unit,1,ARCMSR_MAX_OUTSTANDING_CMD,devq); 2437 if(pACB->psim == NULL) 2438 { 2439 arcmsr_free_resource(pACB); 2440 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irqres); 2441 cam_simq_free(devq); 2442 printf("arcmsr_attach: cam_sim_alloc ..................failure!\n"); 2443 return ENXIO; 2444 } 2445 if(xpt_bus_register(pACB->psim,0) != CAM_SUCCESS) 2446 { 2447 arcmsr_free_resource(pACB); 2448 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irqres); 2449 cam_sim_free(pACB->psim,/*free_devq*/TRUE); 2450 printf("arcmsr_attach: xpt_bus_register .......................failure!\n"); 2451 return ENXIO; 2452 } 2453 if(xpt_create_path(&pACB->ppath,/* periph */ NULL,cam_sim_path(pACB->psim),CAM_TARGET_WILDCARD,CAM_LUN_WILDCARD) != CAM_REQ_CMP) 2454 { 2455 arcmsr_free_resource(pACB); 2456 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irqres); 2457 xpt_bus_deregister(cam_sim_path(pACB->psim)); 2458 cam_sim_free(pACB->psim,/* free_simq */ TRUE); 2459 printf("arcmsr_attach: xpt_create_path .....................failure!\n"); 2460 return ENXIO; 2461 } 2462 /* 2463 **************************************************** 2464 */ 2465 xpt_setup_ccb(&csa.ccb_h,pACB->ppath,/*priority*/5); 2466 csa.ccb_h.func_code=XPT_SASYNC_CB; 2467 csa.event_enable=AC_FOUND_DEVICE|AC_LOST_DEVICE; 2468 csa.callback=arcmsr_async; 2469 csa.callback_arg=pACB->psim; 2470 xpt_action((union ccb *)&csa); 2471 /* Create the control device. */ 2472 pACB->ioctl_dev=make_dev(&arcmsr_cdevsw, unit, UID_ROOT, GID_WHEEL /* GID_OPERATOR */, S_IRUSR | S_IWUSR, "arcmsr%d", unit); 2473 #if __FreeBSD_version < 503000 2474 pACB->ioctl_dev->si_drv1=pACB; 2475 #endif 2476 #if __FreeBSD_version > 500005 2477 (void)make_dev_alias(pACB->ioctl_dev, "arc%d", unit); 2478 #endif 2479 2480 #if 0 2481 #if __FreeBSD_version > 500005 2482 if(kthread_create(arcmsr_do_thread_works, pACB, &pACB->kthread_proc,0,"arcmsr%d: kthread",pACB->pci_unit)) 2483 { 2484 device_printf(pACB->pci_dev,"cannot create kernel thread for this host adapetr\n"); 2485 xpt_bus_deregister(cam_sim_path(pACB->psim)); 2486 cam_sim_free(pACB->psim,/* free_simq */ TRUE); 2487 panic("arcmsr plunge kernel thread fail"); 2488 } 2489 #else 2490 if(kthread_create(arcmsr_do_thread_works, pACB, &pACB->kthread_proc,"arcmsr%d: kthread", pACB->pci_unit)) 2491 { 2492 device_printf(pACB->pci_dev,"cannot create kernel thread for this host adapetr\n"); 2493 xpt_bus_deregister(cam_sim_path(pACB->psim)); 2494 cam_sim_free(pACB->psim,/* free_simq */ TRUE); 2495 panic("arcmsr plunge kernel thread fail"); 2496 } 2497 #endif 2498 #endif 2499 return 0; 2500 } 2501 /* 2502 ************************************************************************ 2503 ** 2504 ** 2505 ** 2506 ************************************************************************ 2507 */ 2508 static LONG arcmsr_probe(device_t dev) 2509 { 2510 ULONG id; 2511 #if ARCMSR_DEBUG0 2512 printf("arcmsr_probe................. \n"); 2513 #endif 2514 switch(id=pci_get_devid(dev)) 2515 { 2516 case PCIDevVenIDARC1110: 2517 device_set_desc(dev,"ARECA ARC1110 PCI-X 4 PORTS SATA RAID CONTROLLER \n" ARCMSR_DRIVER_VERSION ); 2518 return 0; 2519 case PCIDevVenIDARC1120: 2520 device_set_desc(dev,"ARECA ARC1120 PCI-X 8 PORTS SATA RAID CONTROLLER (RAID6-ENGINE Inside) \n" ARCMSR_DRIVER_VERSION); 2521 return 0; 2522 case PCIDevVenIDARC1130: 2523 device_set_desc(dev,"ARECA ARC1130 PCI-X 12 PORTS SATA RAID CONTROLLER (RAID6-ENGINE Inside) \n" ARCMSR_DRIVER_VERSION); 2524 return 0; 2525 case PCIDevVenIDARC1160: 2526 device_set_desc(dev,"ARECA ARC1160 PCI-X 16 PORTS SATA RAID CONTROLLER (RAID6-ENGINE Inside) \n" ARCMSR_DRIVER_VERSION); 2527 return 0; 2528 case PCIDevVenIDARC1210: 2529 device_set_desc(dev,"ARECA ARC1210 PCI-EXPRESS 4 PORTS SATA RAID CONTROLLER \n" ARCMSR_DRIVER_VERSION); 2530 return 0; 2531 case PCIDevVenIDARC1220: 2532 device_set_desc(dev,"ARECA ARC1220 PCI-EXPRESS 8 PORTS SATA RAID CONTROLLER (RAID6-ENGINE Inside) \n" ARCMSR_DRIVER_VERSION); 2533 return 0; 2534 case PCIDevVenIDARC1230: 2535 device_set_desc(dev,"ARECA ARC1230 PCI-EXPRESS 12 PORTS SATA RAID CONTROLLER (RAID6-ENGINE Inside) \n" ARCMSR_DRIVER_VERSION); 2536 return 0; 2537 case PCIDevVenIDARC1260: 2538 device_set_desc(dev,"ARECA ARC1260 PCI-EXPRESS 16 PORTS SATA RAID CONTROLLER (RAID6-ENGINE Inside) \n" ARCMSR_DRIVER_VERSION); 2539 return 0; 2540 } 2541 return ENXIO; 2542 } 2543 /* 2544 ************************************************************************ 2545 ** 2546 ** 2547 ** 2548 ************************************************************************ 2549 */ 2550 static VOID arcmsr_shutdown(device_t dev) 2551 { 2552 LONG i,abort_cmd_cnt=0; 2553 ULONG s,intmask_org; 2554 PSRB pSRB; 2555 PACB pACB=device_get_softc(dev); 2556 2557 #if ARCMSR_DEBUG0 2558 printf("arcmsr_shutdown................. \n"); 2559 #endif 2560 s=splcam(); 2561 /* disable all outbound interrupt */ 2562 intmask_org=CHIP_REG_READ32(&pACB->pmu->outbound_intmask); 2563 CHIP_REG_WRITE32(&pACB->pmu->outbound_intmask,(intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE)); 2564 /* stop adapter background rebuild */ 2565 arcmsr_stop_adapter_bgrb(pACB); 2566 if(arcmsr_wait_msgint_ready(pACB)!=TRUE) 2567 { 2568 printf("arcmsr_pcidev_disattach: wait 'stop adapter rebuild' timeout.... \n"); 2569 } 2570 arcmsr_flush_adapter_cache(pACB); 2571 if(arcmsr_wait_msgint_ready(pACB)!=TRUE) 2572 { 2573 printf("arcmsr_pcidev_disattach: wait 'flush adapter cache' timeout.... \n"); 2574 } 2575 /* abort all outstanding command */ 2576 pACB->acb_flags |= ACB_F_SCSISTOPADAPTER; 2577 pACB->acb_flags &= ~ACB_F_IOP_INITED; 2578 if(pACB->srboutstandingcount!=0) 2579 { 2580 PSRB pfreesrb; 2581 #if ARCMSR_DEBUG0 2582 printf("arcmsr_pcidev_disattach: .....pACB->srboutstandingcount!=0 \n"); 2583 #endif 2584 /* Q back all outstanding srb into wait exec psrb Q*/ 2585 pfreesrb=pACB->pfreesrb; 2586 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++) 2587 { 2588 pSRB=&pfreesrb[i]; 2589 if(pSRB->startdone==ARCMSR_SRB_START) 2590 { 2591 pSRB->srb_flags|=SRB_FLAG_MASTER_ABORTED; 2592 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED; 2593 abort_cmd_cnt++; 2594 } 2595 } 2596 if(abort_cmd_cnt!=0) 2597 { 2598 #if ARCMSR_DEBUG0 2599 printf("arcmsr_pcidev_disattach: .....abort_cmd_cnt!=0 \n"); 2600 #endif 2601 arcmsr_abort_allcmd(pACB); 2602 if(arcmsr_wait_msgint_ready(pACB)!=TRUE) 2603 { 2604 printf("arcmsr_pcidev_disattach: wait 'abort all outstanding command' timeout.................in \n"); 2605 } 2606 } 2607 atomic_set_int(&pACB->srboutstandingcount,0); 2608 } 2609 if(pACB->srbwait2gocount!=0) 2610 { /*remove first wait2go srb and abort it*/ 2611 for(i=0;i<ARCMSR_MAX_OUTSTANDING_CMD;i++) 2612 { 2613 pSRB=pACB->psrbwait2go[i]; 2614 if(pSRB!=NULL) 2615 { 2616 pACB->psrbwait2go[i]=NULL; 2617 atomic_subtract_int(&pACB->srbwait2gocount,1); 2618 pSRB->pccb->ccb_h.status=CAM_REQ_ABORTED; 2619 arcmsr_srb_complete(pSRB); 2620 } 2621 } 2622 } 2623 splx(s); 2624 #if 0 2625 pACB->acb_flags |= ACB_F_STOP_THREAD; 2626 wakeup(pACB->kthread_proc);/* signal to kernel thread do_dpcQ: "stop thread" */ 2627 #endif 2628 return; 2629 } 2630 /* 2631 ************************************************************************ 2632 ** 2633 ** 2634 ** 2635 ************************************************************************ 2636 */ 2637 static LONG arcmsr_detach(device_t dev) 2638 { 2639 PACB pACB=device_get_softc(dev); 2640 2641 arcmsr_shutdown(dev); 2642 arcmsr_free_resource(pACB); 2643 bus_release_resource(dev, SYS_RES_MEMORY, PCI_BASE_ADDR0, pACB->sys_res_arcmsr); 2644 bus_teardown_intr(dev, pACB->irqres, pACB->ih); 2645 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irqres); 2646 xpt_async(AC_LOST_DEVICE, pACB->ppath, NULL); 2647 xpt_free_path(pACB->ppath); 2648 xpt_bus_deregister(cam_sim_path(pACB->psim)); 2649 cam_sim_free(pACB->psim, TRUE); 2650 return (0); 2651 } 2652 2653 2654 2655