1 /* 2 ***************************************************************************************** 3 ** O.S : FreeBSD 4 ** FILE NAME : arcmsr.c 5 ** BY : Erich Chen 6 ** Description: SCSI RAID Device Driver for 7 ** ARECA (ARC11XX/ARC12XX/ARC13XX/ARC16XX) SATA/SAS RAID HOST Adapter 8 ** ARCMSR RAID Host adapter 9 ** [RAID controller:INTEL 331(PCI-X) 341(PCI-EXPRESS) chip set] 10 ****************************************************************************************** 11 ************************************************************************ 12 ** 13 ** Copyright (c) 2004-2006 ARECA Co. Ltd. 14 ** Erich Chen, Taipei Taiwan All rights reserved. 15 ** 16 ** Redistribution and use in source and binary forms, with or without 17 ** modification, are permitted provided that the following conditions 18 ** are met: 19 ** 1. Redistributions of source code must retain the above copyright 20 ** notice, this list of conditions and the following disclaimer. 21 ** 2. Redistributions in binary form must reproduce the above copyright 22 ** notice, this list of conditions and the following disclaimer in the 23 ** documentation and/or other materials provided with the distribution. 24 ** 3. The name of the author may not be used to endorse or promote products 25 ** derived from this software without specific prior written permission. 26 ** 27 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 28 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 29 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 30 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 31 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, BUT 32 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 33 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY 34 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 35 **(INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF 36 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 37 ************************************************************************** 38 ** History 39 ** 40 ** REV# DATE NAME DESCRIPTION 41 ** 1.00.00.00 3/31/2004 Erich Chen First release 42 ** 1.20.00.02 11/29/2004 Erich Chen bug fix with arcmsr_bus_reset when PHY error 43 ** 1.20.00.03 4/19/2005 Erich Chen add SATA 24 Ports adapter type support 44 ** clean unused function 45 ** 1.20.00.12 9/12/2005 Erich Chen bug fix with abort command handling, 46 ** firmware version check 47 ** and firmware update notify for hardware bug fix 48 ** handling if none zero high part physical address 49 ** of srb resource 50 ** 1.20.00.13 8/18/2006 Erich Chen remove pending srb and report busy 51 ** add iop message xfer 52 ** with scsi pass-through command 53 ** add new device id of sas raid adapters 54 ** code fit for SPARC64 & PPC 55 ** 1.20.00.14 02/05/2007 Erich Chen bug fix for incorrect ccb_h.status report 56 ** and cause g_vfs_done() read write error 57 58 ****************************************************************************************** 59 * $FreeBSD$ 60 */ 61 #include <sys/param.h> 62 #include <sys/systm.h> 63 #include <sys/malloc.h> 64 #include <sys/kernel.h> 65 #include <sys/bus.h> 66 #include <sys/queue.h> 67 #include <sys/stat.h> 68 #include <sys/devicestat.h> 69 #include <sys/kthread.h> 70 #include <sys/module.h> 71 #include <sys/proc.h> 72 #include <sys/lock.h> 73 #include <sys/sysctl.h> 74 #include <sys/poll.h> 75 #include <sys/ioccom.h> 76 #include <vm/vm.h> 77 #include <vm/vm_param.h> 78 #include <vm/pmap.h> 79 80 #include <isa/rtc.h> 81 82 #include <machine/bus.h> 83 #include <machine/resource.h> 84 #include <machine/atomic.h> 85 #include <sys/conf.h> 86 #include <sys/rman.h> 87 88 #include <cam/cam.h> 89 #include <cam/cam_ccb.h> 90 #include <cam/cam_sim.h> 91 #include <cam/cam_xpt_sim.h> 92 #include <cam/cam_debug.h> 93 #include <cam/scsi/scsi_all.h> 94 #include <cam/scsi/scsi_message.h> 95 /* 96 ************************************************************************** 97 ************************************************************************** 98 */ 99 #if __FreeBSD_version >= 500005 100 #include <sys/selinfo.h> 101 #include <sys/mutex.h> 102 #include <sys/endian.h> 103 #include <dev/pci/pcivar.h> 104 #include <dev/pci/pcireg.h> 105 #define ARCMSR_LOCK_INIT(l, s) mtx_init(l, s, NULL, MTX_DEF|MTX_RECURSE) 106 #define ARCMSR_LOCK_DESTROY(l) mtx_destroy(l) 107 #define ARCMSR_LOCK_ACQUIRE(l) mtx_lock(l) 108 #define ARCMSR_LOCK_RELEASE(l) mtx_unlock(l) 109 #define ARCMSR_LOCK_TRY(l) mtx_trylock(l) 110 #define arcmsr_htole32(x) htole32(x) 111 typedef struct mtx arcmsr_lock_t; 112 #else 113 #include <sys/select.h> 114 #include <pci/pcivar.h> 115 #include <pci/pcireg.h> 116 #define ARCMSR_LOCK_INIT(l, s) simple_lock_init(l) 117 #define ARCMSR_LOCK_DESTROY(l) 118 #define ARCMSR_LOCK_ACQUIRE(l) simple_lock(l) 119 #define ARCMSR_LOCK_RELEASE(l) simple_unlock(l) 120 #define ARCMSR_LOCK_TRY(l) simple_lock_try(l) 121 #define arcmsr_htole32(x) (x) 122 typedef struct simplelock arcmsr_lock_t; 123 #endif 124 #include <dev/arcmsr/arcmsr.h> 125 #define ARCMSR_SRBS_POOL_SIZE ((sizeof(struct CommandControlBlock) * ARCMSR_MAX_FREESRB_NUM)+0x20) 126 /* 127 ************************************************************************** 128 ************************************************************************** 129 */ 130 #define CHIP_REG_READ32(r) bus_space_read_4(acb->btag, acb->bhandle, offsetof(struct MessageUnit,r)) 131 #define CHIP_REG_WRITE32(r,d) bus_space_write_4(acb->btag, acb->bhandle, offsetof(struct MessageUnit,r), d) 132 /* 133 ************************************************************************** 134 ************************************************************************** 135 */ 136 static struct CommandControlBlock * arcmsr_get_freesrb(struct AdapterControlBlock *acb); 137 static u_int8_t arcmsr_seek_cmd2abort(union ccb * abortccb); 138 static u_int8_t arcmsr_wait_msgint_ready(struct AdapterControlBlock *acb); 139 static u_int32_t arcmsr_probe(device_t dev); 140 static u_int32_t arcmsr_attach(device_t dev); 141 static u_int32_t arcmsr_detach(device_t dev); 142 static u_int32_t arcmsr_iop_ioctlcmd(struct AdapterControlBlock *acb, u_int32_t ioctl_cmd, caddr_t arg); 143 static void arcmsr_iop_parking(struct AdapterControlBlock *acb); 144 static void arcmsr_shutdown(device_t dev); 145 static void arcmsr_interrupt(void *arg); 146 static void arcmsr_polling_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb); 147 static void arcmsr_free_resource(struct AdapterControlBlock *acb); 148 static void arcmsr_bus_reset(struct AdapterControlBlock *acb); 149 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb); 150 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb); 151 static void arcmsr_iop_init(struct AdapterControlBlock *acb); 152 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb); 153 static void arcmsr_post_Qbuffer(struct AdapterControlBlock *acb); 154 static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb); 155 static void arcmsr_srb_complete(struct CommandControlBlock *srb, int stand_flag); 156 static void arcmsr_iop_reset(struct AdapterControlBlock *acb); 157 static void arcmsr_report_sense_info(struct CommandControlBlock *srb); 158 static void arcmsr_build_srb(struct CommandControlBlock *srb, bus_dma_segment_t * dm_segs, u_int32_t nseg); 159 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, union ccb * pccb); 160 static int arcmsr_resume(device_t dev); 161 static int arcmsr_suspend(device_t dev); 162 /* 163 ************************************************************************** 164 ************************************************************************** 165 */ 166 static void UDELAY(u_int32_t us) { DELAY(us); } 167 /* 168 ************************************************************************** 169 ************************************************************************** 170 */ 171 static bus_dmamap_callback_t arcmsr_map_freesrb; 172 static bus_dmamap_callback_t arcmsr_executesrb; 173 /* 174 ************************************************************************** 175 ************************************************************************** 176 */ 177 static d_open_t arcmsr_open; 178 static d_close_t arcmsr_close; 179 static d_ioctl_t arcmsr_ioctl; 180 181 static device_method_t arcmsr_methods[]={ 182 DEVMETHOD(device_probe, arcmsr_probe), 183 DEVMETHOD(device_attach, arcmsr_attach), 184 DEVMETHOD(device_detach, arcmsr_detach), 185 DEVMETHOD(device_shutdown, arcmsr_shutdown), 186 DEVMETHOD(device_suspend, arcmsr_suspend), 187 DEVMETHOD(device_resume, arcmsr_resume), 188 189 DEVMETHOD(bus_print_child, bus_generic_print_child), 190 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 191 { 0, 0 } 192 }; 193 194 static driver_t arcmsr_driver={ 195 "arcmsr", arcmsr_methods, sizeof(struct AdapterControlBlock) 196 }; 197 198 static devclass_t arcmsr_devclass; 199 DRIVER_MODULE(arcmsr, pci, arcmsr_driver, arcmsr_devclass, 0, 0); 200 MODULE_DEPEND(arcmsr, pci, 1, 1, 1); 201 MODULE_DEPEND(arcmsr, cam, 1, 1, 1); 202 #ifndef BUS_DMA_COHERENT 203 #define BUS_DMA_COHERENT 0x04 /* hint: map memory in a coherent way */ 204 #endif 205 #if __FreeBSD_version >= 501000 206 #ifndef D_NEEDGIANT 207 #define D_NEEDGIANT 0x00400000 /* driver want Giant */ 208 #endif 209 #ifndef D_VERSION 210 #define D_VERSION 0x20011966 211 #endif 212 static struct cdevsw arcmsr_cdevsw={ 213 #if __FreeBSD_version > 502010 214 .d_version = D_VERSION, 215 #endif 216 .d_flags = D_NEEDGIANT, 217 .d_open = arcmsr_open, /* open */ 218 .d_close = arcmsr_close, /* close */ 219 .d_ioctl = arcmsr_ioctl, /* ioctl */ 220 .d_name = "arcmsr", /* name */ 221 }; 222 #else 223 #define ARCMSR_CDEV_MAJOR 180 224 225 static struct cdevsw arcmsr_cdevsw = { 226 arcmsr_open, /* open */ 227 arcmsr_close, /* close */ 228 noread, /* read */ 229 nowrite, /* write */ 230 arcmsr_ioctl, /* ioctl */ 231 nopoll, /* poll */ 232 nommap, /* mmap */ 233 nostrategy, /* strategy */ 234 "arcmsr", /* name */ 235 ARCMSR_CDEV_MAJOR, /* major */ 236 nodump, /* dump */ 237 nopsize, /* psize */ 238 0 /* flags */ 239 }; 240 #endif 241 242 #if __FreeBSD_version < 500005 243 static int arcmsr_open(dev_t dev, int flags, int fmt, struct proc *proc) 244 #else 245 #if __FreeBSD_version < 503000 246 static int arcmsr_open(dev_t dev, int flags, int fmt, struct thread *proc) 247 #else 248 static int arcmsr_open(struct cdev *dev, int flags, int fmt, d_thread_t *proc) 249 #endif 250 #endif 251 { 252 #if __FreeBSD_version < 503000 253 struct AdapterControlBlock *acb=dev->si_drv1; 254 #else 255 int unit = minor(dev); 256 struct AdapterControlBlock *acb = devclass_get_softc(arcmsr_devclass, unit); 257 #endif 258 if(acb==NULL) { 259 return ENXIO; 260 } 261 return 0; 262 } 263 /* 264 ************************************************************************** 265 ************************************************************************** 266 */ 267 #if __FreeBSD_version < 500005 268 static int arcmsr_close(dev_t dev, int flags, int fmt, struct proc *proc) 269 #else 270 #if __FreeBSD_version < 503000 271 static int arcmsr_close(dev_t dev, int flags, int fmt, struct thread *proc) 272 #else 273 static int arcmsr_close(struct cdev *dev, int flags, int fmt, d_thread_t *proc) 274 #endif 275 #endif 276 { 277 #if __FreeBSD_version < 503000 278 struct AdapterControlBlock *acb=dev->si_drv1; 279 #else 280 int unit = minor(dev); 281 struct AdapterControlBlock *acb = devclass_get_softc(arcmsr_devclass, unit); 282 #endif 283 if(acb==NULL) { 284 return ENXIO; 285 } 286 return 0; 287 } 288 /* 289 ************************************************************************** 290 ************************************************************************** 291 */ 292 #if __FreeBSD_version < 500005 293 static int arcmsr_ioctl(dev_t dev, u_long ioctl_cmd, caddr_t arg, int flags, struct proc *proc) 294 #else 295 #if __FreeBSD_version < 503000 296 static int arcmsr_ioctl(dev_t dev, u_long ioctl_cmd, caddr_t arg, int flags, struct thread *proc) 297 #else 298 static int arcmsr_ioctl(struct cdev *dev, u_long ioctl_cmd, caddr_t arg, int flags, d_thread_t *proc) 299 #endif 300 #endif 301 { 302 #if __FreeBSD_version < 503000 303 struct AdapterControlBlock *acb=dev->si_drv1; 304 #else 305 int unit = minor(dev); 306 struct AdapterControlBlock *acb = devclass_get_softc(arcmsr_devclass, unit); 307 #endif 308 309 if(acb==NULL) { 310 return ENXIO; 311 } 312 return(arcmsr_iop_ioctlcmd(acb, ioctl_cmd, arg)); 313 } 314 /* 315 ******************************************************************************* 316 ******************************************************************************* 317 */ 318 static int arcmsr_suspend(device_t dev) 319 { 320 struct AdapterControlBlock *acb = device_get_softc(dev); 321 u_int32_t intmask_org; 322 323 /* disable all outbound interrupt */ 324 intmask_org=CHIP_REG_READ32(outbound_intmask); 325 CHIP_REG_WRITE32(outbound_intmask, (intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE)); 326 /* flush controller */ 327 arcmsr_iop_parking(acb); 328 return(0); 329 } 330 /* 331 ******************************************************************************* 332 ******************************************************************************* 333 */ 334 static int arcmsr_resume(device_t dev) 335 { 336 struct AdapterControlBlock *acb = device_get_softc(dev); 337 338 arcmsr_iop_init(acb); 339 return(0); 340 } 341 /* 342 ********************************************************************************* 343 ********************************************************************************* 344 */ 345 static void arcmsr_async(void *cb_arg, u_int32_t code, struct cam_path *path, void *arg) 346 { 347 struct AdapterControlBlock *acb; 348 u_int8_t target_id, target_lun; 349 struct cam_sim * sim; 350 351 sim=(struct cam_sim *) cb_arg; 352 acb =(struct AdapterControlBlock *) cam_sim_softc(sim); 353 switch (code) { 354 case AC_LOST_DEVICE: 355 target_id=xpt_path_target_id(path); 356 target_lun=xpt_path_lun_id(path); 357 if((target_id > ARCMSR_MAX_TARGETID) || (target_lun > ARCMSR_MAX_TARGETLUN)) { 358 break; 359 } 360 printf("%s:scsi id%d lun%d device lost \n" 361 , device_get_name(acb->pci_dev), target_id, target_lun); 362 break; 363 default: 364 break; 365 } 366 } 367 /* 368 ************************************************************************ 369 ************************************************************************ 370 */ 371 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) 372 { 373 CHIP_REG_WRITE32(inbound_msgaddr0, ARCMSR_INBOUND_MESG0_FLUSH_CACHE); 374 if(arcmsr_wait_msgint_ready(acb)) { 375 printf("arcmsr%d: wait 'flush adapter cache' timeout \n" 376 , acb->pci_unit); 377 } 378 return; 379 } 380 /* 381 ********************************************************************** 382 ********************************************************************** 383 */ 384 static u_int8_t arcmsr_wait_msgint_ready(struct AdapterControlBlock *acb) 385 { 386 u_int32_t Index; 387 u_int8_t Retries=0x00; 388 389 do { 390 for(Index=0; Index < 100; Index++) { 391 if(CHIP_REG_READ32(outbound_intstatus) & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { 392 /*clear interrupt*/ 393 CHIP_REG_WRITE32(outbound_intstatus, ARCMSR_MU_OUTBOUND_MESSAGE0_INT); 394 return 0x00; 395 } 396 /* one us delay */ 397 UDELAY(10000); 398 }/*max 1 seconds*/ 399 }while(Retries++ < 20);/*max 20 sec*/ 400 return 0xff; 401 } 402 /* 403 ********************************************************************** 404 ********************************************************************** 405 */ 406 static void arcmsr_srb_complete(struct CommandControlBlock *srb, int stand_flag) 407 { 408 struct AdapterControlBlock *acb=srb->acb; 409 union ccb * pccb=srb->pccb; 410 411 if((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 412 bus_dmasync_op_t op; 413 414 if((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 415 op = BUS_DMASYNC_POSTREAD; 416 } else { 417 op = BUS_DMASYNC_POSTWRITE; 418 } 419 bus_dmamap_sync(acb->dm_segs_dmat, srb->dm_segs_dmamap, op); 420 bus_dmamap_unload(acb->dm_segs_dmat, srb->dm_segs_dmamap); 421 } 422 if(stand_flag==1) { 423 atomic_subtract_int(&acb->srboutstandingcount, 1); 424 if((acb->acb_flags & ACB_F_CAM_DEV_QFRZN) && ( 425 acb->srboutstandingcount < ARCMSR_RELEASE_SIMQ_LEVEL)) { 426 acb->acb_flags &= ~ACB_F_CAM_DEV_QFRZN; 427 pccb->ccb_h.status |= CAM_RELEASE_SIMQ; 428 } 429 } 430 srb->startdone=ARCMSR_SRB_DONE; 431 srb->srb_flags=0; 432 acb->srbworkingQ[acb->workingsrb_doneindex]=srb; 433 acb->workingsrb_doneindex++; 434 acb->workingsrb_doneindex %= ARCMSR_MAX_FREESRB_NUM; 435 xpt_done(pccb); 436 return; 437 } 438 /* 439 ********************************************************************** 440 ********************************************************************** 441 */ 442 static void arcmsr_report_sense_info(struct CommandControlBlock *srb) 443 { 444 union ccb * pccb=srb->pccb; 445 446 pccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 447 pccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 448 if(&pccb->csio.sense_data) { 449 memset(&pccb->csio.sense_data, 0, sizeof(pccb->csio.sense_data)); 450 memcpy(&pccb->csio.sense_data, srb->arcmsr_cdb.SenseData, 451 get_min(sizeof(struct SENSE_DATA), sizeof(pccb->csio.sense_data))); 452 ((u_int8_t *)&pccb->csio.sense_data)[0] = (0x1 << 7 | 0x70); /* Valid,ErrorCode */ 453 pccb->ccb_h.status |= CAM_AUTOSNS_VALID; 454 } 455 return; 456 } 457 /* 458 ********************************************************************* 459 ** 460 ********************************************************************* 461 */ 462 static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb) 463 { 464 CHIP_REG_WRITE32(inbound_msgaddr0, ARCMSR_INBOUND_MESG0_ABORT_CMD); 465 if(arcmsr_wait_msgint_ready(acb)) { 466 printf("arcmsr%d: wait 'abort all outstanding command' timeout \n" 467 , acb->pci_unit); 468 } 469 return; 470 } 471 /* 472 **************************************************************************** 473 **************************************************************************** 474 */ 475 static void arcmsr_iop_reset(struct AdapterControlBlock *acb) 476 { 477 struct CommandControlBlock *srb; 478 u_int32_t intmask_org, mask; 479 u_int32_t i=0; 480 481 if(acb->srboutstandingcount!=0) 482 { 483 /* talk to iop 331 outstanding command aborted*/ 484 arcmsr_abort_allcmd(acb); 485 UDELAY(3000*1000);/*wait for 3 sec for all command aborted*/ 486 /* disable all outbound interrupt */ 487 intmask_org=CHIP_REG_READ32(outbound_intmask); 488 CHIP_REG_WRITE32(outbound_intmask 489 , intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE); 490 /*clear all outbound posted Q*/ 491 for(i=0;i<ARCMSR_MAX_OUTSTANDING_CMD;i++) { 492 CHIP_REG_READ32(outbound_queueport); 493 } 494 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++) { 495 srb=acb->psrb_pool[i]; 496 if(srb->startdone==ARCMSR_SRB_START) { 497 srb->startdone=ARCMSR_SRB_ABORTED; 498 srb->pccb->ccb_h.status |= CAM_REQ_ABORTED; 499 arcmsr_srb_complete(srb, 1); 500 } 501 } 502 /* enable all outbound interrupt */ 503 mask=~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE 504 |ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE); 505 CHIP_REG_WRITE32(outbound_intmask, intmask_org & mask); 506 /* post abort all outstanding command message to RAID controller */ 507 } 508 atomic_set_int(&acb->srboutstandingcount, 0); 509 acb->workingsrb_doneindex=0; 510 acb->workingsrb_startindex=0; 511 return; 512 } 513 /* 514 ********************************************************************** 515 ********************************************************************** 516 */ 517 static void arcmsr_build_srb(struct CommandControlBlock *srb, bus_dma_segment_t *dm_segs, u_int32_t nseg) 518 { 519 struct ARCMSR_CDB * arcmsr_cdb= &srb->arcmsr_cdb; 520 u_int8_t * psge=(u_int8_t *)&arcmsr_cdb->u; 521 u_int32_t address_lo, address_hi; 522 union ccb * pccb=srb->pccb; 523 struct ccb_scsiio * pcsio= &pccb->csio; 524 u_int32_t arccdbsize=0x30; 525 526 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB)); 527 arcmsr_cdb->Bus=0; 528 arcmsr_cdb->TargetID=pccb->ccb_h.target_id; 529 arcmsr_cdb->LUN=pccb->ccb_h.target_lun; 530 arcmsr_cdb->Function=1; 531 arcmsr_cdb->CdbLength=(u_int8_t)pcsio->cdb_len; 532 arcmsr_cdb->Context=(unsigned long)arcmsr_cdb; 533 bcopy(pcsio->cdb_io.cdb_bytes, arcmsr_cdb->Cdb, pcsio->cdb_len); 534 if(nseg != 0) { 535 struct AdapterControlBlock *acb=srb->acb; 536 bus_dmasync_op_t op; 537 u_int32_t length, i, cdb_sgcount=0; 538 539 if((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 540 op=BUS_DMASYNC_PREREAD; 541 } else { 542 op=BUS_DMASYNC_PREWRITE; 543 arcmsr_cdb->Flags|=ARCMSR_CDB_FLAG_WRITE; 544 srb->srb_flags|=SRB_FLAG_WRITE; 545 } 546 bus_dmamap_sync(acb->dm_segs_dmat, srb->dm_segs_dmamap, op); 547 for(i=0;i<nseg;i++) { 548 /* Get the physical address of the current data pointer */ 549 length=arcmsr_htole32(dm_segs[i].ds_len); 550 address_lo=arcmsr_htole32(dma_addr_lo32(dm_segs[i].ds_addr)); 551 address_hi=arcmsr_htole32(dma_addr_hi32(dm_segs[i].ds_addr)); 552 if(address_hi==0) { 553 struct SG32ENTRY * pdma_sg=(struct SG32ENTRY *)psge; 554 pdma_sg->address=address_lo; 555 pdma_sg->length=length; 556 psge += sizeof(struct SG32ENTRY); 557 arccdbsize += sizeof(struct SG32ENTRY); 558 } else { 559 u_int32_t sg64s_size=0, tmplength=length; 560 561 while(1) { 562 u_int64_t span4G, length0; 563 struct SG64ENTRY * pdma_sg=(struct SG64ENTRY *)psge; 564 565 span4G=(u_int64_t)address_lo + tmplength; 566 pdma_sg->addresshigh=address_hi; 567 pdma_sg->address=address_lo; 568 if(span4G > 0x100000000) { 569 /*see if cross 4G boundary*/ 570 length0=0x100000000-address_lo; 571 pdma_sg->length=(u_int32_t)length0|IS_SG64_ADDR; 572 address_hi=address_hi+1; 573 address_lo=0; 574 tmplength=tmplength-(u_int32_t)length0; 575 sg64s_size += sizeof(struct SG64ENTRY); 576 psge += sizeof(struct SG64ENTRY); 577 cdb_sgcount++; 578 } else { 579 pdma_sg->length=tmplength|IS_SG64_ADDR; 580 sg64s_size += sizeof(struct SG64ENTRY); 581 psge += sizeof(struct SG64ENTRY); 582 break; 583 } 584 } 585 arccdbsize += sg64s_size; 586 } 587 cdb_sgcount++; 588 } 589 arcmsr_cdb->sgcount=(u_int8_t)cdb_sgcount; 590 arcmsr_cdb->DataLength=pcsio->dxfer_len; 591 if( arccdbsize > 256) { 592 arcmsr_cdb->Flags|=ARCMSR_CDB_FLAG_SGL_BSIZE; 593 } 594 } 595 return; 596 } 597 /* 598 ************************************************************************** 599 ************************************************************************** 600 */ 601 static void arcmsr_post_srb(struct AdapterControlBlock *acb, struct CommandControlBlock *srb) 602 { 603 u_int32_t cdb_shifted_phyaddr=(u_int32_t) srb->cdb_shifted_phyaddr; 604 struct ARCMSR_CDB * arcmsr_cdb=(struct ARCMSR_CDB *)&srb->arcmsr_cdb; 605 606 bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, 607 (srb->srb_flags & SRB_FLAG_WRITE) ? BUS_DMASYNC_POSTWRITE:BUS_DMASYNC_POSTREAD); 608 atomic_add_int(&acb->srboutstandingcount, 1); 609 srb->startdone=ARCMSR_SRB_START; 610 if(arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) { 611 CHIP_REG_WRITE32(inbound_queueport, cdb_shifted_phyaddr|ARCMSR_SRBPOST_FLAG_SGL_BSIZE); 612 } else { 613 CHIP_REG_WRITE32(inbound_queueport, cdb_shifted_phyaddr); 614 } 615 return; 616 } 617 /* 618 ********************************************************************** 619 ********************************************************************** 620 */ 621 static void arcmsr_post_Qbuffer(struct AdapterControlBlock *acb) 622 { 623 u_int8_t * pQbuffer; 624 struct QBUFFER * pwbuffer=(struct QBUFFER *)&acb->pmu->message_wbuffer; 625 u_int8_t * iop_data=(u_int8_t *)pwbuffer->data; 626 u_int32_t allxfer_len=0; 627 628 if(acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { 629 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 630 while((acb->wqbuf_firstindex!=acb->wqbuf_lastindex) && (allxfer_len<124)) { 631 pQbuffer= &acb->wqbuffer[acb->wqbuf_firstindex]; 632 memcpy(iop_data, pQbuffer, 1); 633 acb->wqbuf_firstindex++; 634 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 635 /*if last index number set it to 0 */ 636 iop_data++; 637 allxfer_len++; 638 } 639 pwbuffer->data_len=allxfer_len; 640 /* 641 ** push inbound doorbell and wait reply at hwinterrupt routine for next Qbuffer post 642 */ 643 CHIP_REG_WRITE32(inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK); 644 } 645 return; 646 } 647 /* 648 ************************************************************************ 649 ************************************************************************ 650 */ 651 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb) 652 { 653 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 654 CHIP_REG_WRITE32(inbound_msgaddr0, ARCMSR_INBOUND_MESG0_STOP_BGRB); 655 if(arcmsr_wait_msgint_ready(acb)) { 656 printf("arcmsr%d: wait 'stop adapter rebulid' timeout \n" 657 , acb->pci_unit); 658 } 659 return; 660 } 661 /* 662 ************************************************************************ 663 ************************************************************************ 664 */ 665 static void arcmsr_poll(struct cam_sim * psim) 666 { 667 arcmsr_interrupt(cam_sim_softc(psim)); 668 return; 669 } 670 /* 671 ********************************************************************** 672 ********************************************************************** 673 */ 674 static void arcmsr_intr_handler(void *arg) 675 { 676 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)arg; 677 678 ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock); 679 arcmsr_interrupt(acb); 680 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock); 681 } 682 /* 683 ********************************************************************** 684 ********************************************************************** 685 */ 686 static void arcmsr_interrupt(void *arg) 687 { 688 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)arg; 689 struct CommandControlBlock *srb; 690 u_int32_t flag_srb, outbound_intstatus, outbound_doorbell; 691 692 /* 693 ********************************************* 694 ** check outbound intstatus 695 ********************************************* 696 */ 697 outbound_intstatus=CHIP_REG_READ32(outbound_intstatus) & acb->outbound_int_enable; 698 CHIP_REG_WRITE32(outbound_intstatus, outbound_intstatus);/*clear interrupt*/ 699 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) { 700 /* 701 ********************************************* 702 ** DOORBELL 703 ********************************************* 704 */ 705 outbound_doorbell=CHIP_REG_READ32(outbound_doorbell); 706 CHIP_REG_WRITE32(outbound_doorbell, outbound_doorbell);/*clear interrupt */ 707 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) { 708 struct QBUFFER * prbuffer=(struct QBUFFER *)&acb->pmu->message_rbuffer; 709 u_int8_t * iop_data=(u_int8_t *)prbuffer->data; 710 u_int8_t * pQbuffer; 711 u_int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex; 712 713 /*check this iop data if overflow my rqbuffer*/ 714 rqbuf_lastindex=acb->rqbuf_lastindex; 715 rqbuf_firstindex=acb->rqbuf_firstindex; 716 iop_len=prbuffer->data_len; 717 my_empty_len=(rqbuf_firstindex-rqbuf_lastindex-1)&(ARCMSR_MAX_QBUFFER-1); 718 if(my_empty_len>=iop_len) { 719 while(iop_len > 0) { 720 pQbuffer= &acb->rqbuffer[acb->rqbuf_lastindex]; 721 memcpy(pQbuffer, iop_data, 1); 722 acb->rqbuf_lastindex++; 723 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 724 /*if last index number set it to 0 */ 725 iop_data++; 726 iop_len--; 727 } 728 CHIP_REG_WRITE32(inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 729 /*signature, let IOP331 know data has been readed */ 730 } else { 731 acb->acb_flags|=ACB_F_IOPDATA_OVERFLOW; 732 } 733 } 734 if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) { 735 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED; 736 /* 737 ********************************************* 738 ********************************************* 739 */ 740 if(acb->wqbuf_firstindex!=acb->wqbuf_lastindex) { 741 u_int8_t * pQbuffer; 742 struct QBUFFER * pwbuffer=(struct QBUFFER *)&acb->pmu->message_wbuffer; 743 u_int8_t * iop_data=(u_int8_t *)pwbuffer->data; 744 u_int32_t allxfer_len=0; 745 746 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 747 while((acb->wqbuf_firstindex!=acb->wqbuf_lastindex) && (allxfer_len<124)) { 748 pQbuffer= &acb->wqbuffer[acb->wqbuf_firstindex]; 749 memcpy(iop_data, pQbuffer, 1); 750 acb->wqbuf_firstindex++; 751 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 752 /*if last index number set it to 0 */ 753 iop_data++; 754 allxfer_len++; 755 } 756 pwbuffer->data_len=allxfer_len; 757 /* 758 ** push inbound doorbell tell iop driver data write ok 759 ** and wait reply on next hwinterrupt for next Qbuffer post 760 */ 761 CHIP_REG_WRITE32(inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK); 762 } 763 if(acb->wqbuf_firstindex==acb->wqbuf_lastindex) { 764 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED; 765 } 766 } 767 } 768 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) { 769 int target, lun; 770 /* 771 ***************************************************************************** 772 ** areca cdb command done 773 ***************************************************************************** 774 */ 775 bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 776 while(1) { 777 if((flag_srb=CHIP_REG_READ32(outbound_queueport)) == 0xFFFFFFFF) { 778 break;/*chip FIFO no srb for completion already*/ 779 } 780 /* check if command done with no error*/ 781 srb=(struct CommandControlBlock *)(acb->vir2phy_offset+(flag_srb << 5)); 782 /*frame must be 32 bytes aligned*/ 783 if((srb->acb!=acb) || (srb->startdone!=ARCMSR_SRB_START)) { 784 if(srb->startdone==ARCMSR_SRB_ABORTED) { 785 printf("arcmsr%d: srb='%p' isr got aborted command \n" 786 , acb->pci_unit, srb); 787 srb->pccb->ccb_h.status |= CAM_REQ_ABORTED; 788 arcmsr_srb_complete(srb, 1); 789 continue; 790 } 791 printf("arcmsr%d: isr get an illegal srb command done" 792 "acb='%p' srb='%p' srbacb='%p' startdone=0x%x" 793 "srboutstandingcount=%d \n", 794 acb->pci_unit, acb, srb, srb->acb, 795 srb->startdone, acb->srboutstandingcount); 796 continue; 797 } 798 target=srb->pccb->ccb_h.target_id; 799 lun=srb->pccb->ccb_h.target_lun; 800 if((flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR)==0) { 801 if(acb->devstate[target][lun]==ARECA_RAID_GONE) { 802 acb->devstate[target][lun]=ARECA_RAID_GOOD; 803 } 804 srb->pccb->ccb_h.status |= CAM_REQ_CMP; 805 arcmsr_srb_complete(srb, 1); 806 } else { 807 switch(srb->arcmsr_cdb.DeviceStatus) { 808 case ARCMSR_DEV_SELECT_TIMEOUT: { 809 acb->devstate[target][lun]=ARECA_RAID_GONE; 810 srb->pccb->ccb_h.status |= CAM_SEL_TIMEOUT; 811 arcmsr_srb_complete(srb, 1); 812 } 813 break; 814 case ARCMSR_DEV_ABORTED: 815 case ARCMSR_DEV_INIT_FAIL: { 816 acb->devstate[target][lun]=ARECA_RAID_GONE; 817 srb->pccb->ccb_h.status |= CAM_DEV_NOT_THERE; 818 arcmsr_srb_complete(srb, 1); 819 } 820 break; 821 case SCSISTAT_CHECK_CONDITION: { 822 acb->devstate[target][lun]=ARECA_RAID_GOOD; 823 arcmsr_report_sense_info(srb); 824 arcmsr_srb_complete(srb, 1); 825 } 826 break; 827 default: 828 printf("arcmsr%d: scsi id=%d lun=%d" 829 "isr get command error done," 830 "but got unknow DeviceStatus=0x%x \n" 831 , acb->pci_unit, target, lun 832 ,srb->arcmsr_cdb.DeviceStatus); 833 acb->devstate[target][lun]=ARECA_RAID_GONE; 834 srb->pccb->ccb_h.status |= CAM_UNCOR_PARITY; 835 /*unknow error or crc error just for retry*/ 836 arcmsr_srb_complete(srb, 1); 837 break; 838 } 839 } 840 } /*drain reply FIFO*/ 841 } 842 return; 843 } 844 /* 845 ******************************************************************************* 846 ** 847 ******************************************************************************* 848 */ 849 static void arcmsr_iop_parking(struct AdapterControlBlock *acb) 850 { 851 if(acb!=NULL) { 852 /* stop adapter background rebuild */ 853 if(acb->acb_flags & ACB_F_MSG_START_BGRB) { 854 arcmsr_stop_adapter_bgrb(acb); 855 arcmsr_flush_adapter_cache(acb); 856 } 857 } 858 } 859 /* 860 *********************************************************************** 861 ** 862 ************************************************************************ 863 */ 864 u_int32_t arcmsr_iop_ioctlcmd(struct AdapterControlBlock *acb, u_int32_t ioctl_cmd, caddr_t arg) 865 { 866 struct CMD_MESSAGE_FIELD * pcmdmessagefld; 867 u_int32_t retvalue=EINVAL; 868 869 pcmdmessagefld=(struct CMD_MESSAGE_FIELD *) arg; 870 if(memcmp(pcmdmessagefld->cmdmessage.Signature, "ARCMSR", 6)!=0) { 871 return retvalue; 872 } 873 ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock); 874 switch(ioctl_cmd) { 875 case ARCMSR_MESSAGE_READ_RQBUFFER: { 876 u_int8_t * pQbuffer; 877 u_int8_t * ptmpQbuffer=pcmdmessagefld->messagedatabuffer; 878 u_int32_t allxfer_len=0; 879 880 while((acb->rqbuf_firstindex!=acb->rqbuf_lastindex) && (allxfer_len<1031)) { 881 /*copy READ QBUFFER to srb*/ 882 pQbuffer= &acb->rqbuffer[acb->rqbuf_firstindex]; 883 memcpy(ptmpQbuffer, pQbuffer, 1); 884 acb->rqbuf_firstindex++; 885 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 886 /*if last index number set it to 0 */ 887 ptmpQbuffer++; 888 allxfer_len++; 889 } 890 if(acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 891 struct QBUFFER * prbuffer=(struct QBUFFER *)&acb->pmu->message_rbuffer; 892 u_int8_t * iop_data=(u_int8_t *)prbuffer->data; 893 u_int32_t iop_len; 894 895 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 896 iop_len=(u_int32_t)prbuffer->data_len; 897 /*this iop data does no chance to make me overflow again here, so just do it*/ 898 while(iop_len>0) { 899 pQbuffer= &acb->rqbuffer[acb->rqbuf_lastindex]; 900 memcpy(pQbuffer, iop_data, 1); 901 acb->rqbuf_lastindex++; 902 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 903 /*if last index number set it to 0 */ 904 iop_data++; 905 iop_len--; 906 } 907 CHIP_REG_WRITE32(inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 908 /*signature, let IOP331 know data has been readed */ 909 } 910 pcmdmessagefld->cmdmessage.Length=allxfer_len; 911 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_OK; 912 retvalue=ARCMSR_MESSAGE_SUCCESS; 913 } 914 break; 915 case ARCMSR_MESSAGE_WRITE_WQBUFFER: { 916 u_int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex; 917 u_int8_t * pQbuffer; 918 u_int8_t * ptmpuserbuffer=pcmdmessagefld->messagedatabuffer; 919 920 user_len=pcmdmessagefld->cmdmessage.Length; 921 /*check if data xfer length of this request will overflow my array qbuffer */ 922 wqbuf_lastindex=acb->wqbuf_lastindex; 923 wqbuf_firstindex=acb->wqbuf_firstindex; 924 if(wqbuf_lastindex!=wqbuf_firstindex) { 925 arcmsr_post_Qbuffer(acb); 926 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_ERROR; 927 } else { 928 my_empty_len=(wqbuf_firstindex-wqbuf_lastindex-1)&(ARCMSR_MAX_QBUFFER-1); 929 if(my_empty_len>=user_len) { 930 while(user_len>0) { 931 /*copy srb data to wqbuffer*/ 932 pQbuffer= &acb->wqbuffer[acb->wqbuf_lastindex]; 933 memcpy(pQbuffer, ptmpuserbuffer, 1); 934 acb->wqbuf_lastindex++; 935 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 936 /*if last index number set it to 0 */ 937 ptmpuserbuffer++; 938 user_len--; 939 } 940 /*post fist Qbuffer*/ 941 if(acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { 942 acb->acb_flags &=~ACB_F_MESSAGE_WQBUFFER_CLEARED; 943 arcmsr_post_Qbuffer(acb); 944 } 945 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_OK; 946 } else { 947 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_ERROR; 948 } 949 } 950 retvalue=ARCMSR_MESSAGE_SUCCESS; 951 } 952 break; 953 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { 954 u_int8_t * pQbuffer=acb->rqbuffer; 955 956 if(acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 957 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 958 CHIP_REG_WRITE32(inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 959 /*signature, let IOP331 know data has been readed */ 960 } 961 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; 962 acb->rqbuf_firstindex=0; 963 acb->rqbuf_lastindex=0; 964 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 965 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_OK; 966 retvalue=ARCMSR_MESSAGE_SUCCESS; 967 } 968 break; 969 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: 970 { 971 u_int8_t * pQbuffer=acb->wqbuffer; 972 973 if(acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 974 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 975 CHIP_REG_WRITE32(inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 976 /*signature, let IOP331 know data has been readed */ 977 } 978 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED|ACB_F_MESSAGE_WQBUFFER_READED); 979 acb->wqbuf_firstindex=0; 980 acb->wqbuf_lastindex=0; 981 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 982 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_OK; 983 retvalue=ARCMSR_MESSAGE_SUCCESS; 984 } 985 break; 986 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { 987 u_int8_t * pQbuffer; 988 989 if(acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 990 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 991 CHIP_REG_WRITE32(inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 992 /*signature, let IOP331 know data has been readed */ 993 } 994 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED 995 |ACB_F_MESSAGE_RQBUFFER_CLEARED 996 |ACB_F_MESSAGE_WQBUFFER_READED); 997 acb->rqbuf_firstindex=0; 998 acb->rqbuf_lastindex=0; 999 acb->wqbuf_firstindex=0; 1000 acb->wqbuf_lastindex=0; 1001 pQbuffer=acb->rqbuffer; 1002 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 1003 pQbuffer=acb->wqbuffer; 1004 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 1005 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_OK; 1006 retvalue=ARCMSR_MESSAGE_SUCCESS; 1007 } 1008 break; 1009 case ARCMSR_MESSAGE_REQUEST_RETURNCODE_3F: { 1010 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_3F; 1011 retvalue=ARCMSR_MESSAGE_SUCCESS; 1012 } 1013 break; 1014 case ARCMSR_MESSAGE_SAY_HELLO: { 1015 u_int8_t * hello_string="Hello! I am ARCMSR"; 1016 u_int8_t * puserbuffer=(u_int8_t *)pcmdmessagefld->messagedatabuffer; 1017 1018 if(memcpy(puserbuffer, hello_string, (int16_t)strlen(hello_string))) { 1019 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_ERROR; 1020 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock); 1021 return ENOIOCTL; 1022 } 1023 pcmdmessagefld->cmdmessage.ReturnCode=ARCMSR_MESSAGE_RETURNCODE_OK; 1024 retvalue=ARCMSR_MESSAGE_SUCCESS; 1025 } 1026 break; 1027 case ARCMSR_MESSAGE_SAY_GOODBYE: { 1028 arcmsr_iop_parking(acb); 1029 retvalue=ARCMSR_MESSAGE_SUCCESS; 1030 } 1031 break; 1032 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: { 1033 arcmsr_flush_adapter_cache(acb); 1034 retvalue=ARCMSR_MESSAGE_SUCCESS; 1035 } 1036 break; 1037 } 1038 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock); 1039 return retvalue; 1040 } 1041 /* 1042 ************************************************************************** 1043 ************************************************************************** 1044 */ 1045 struct CommandControlBlock * arcmsr_get_freesrb(struct AdapterControlBlock *acb) 1046 { 1047 struct CommandControlBlock *srb=NULL; 1048 u_int32_t workingsrb_startindex, workingsrb_doneindex; 1049 1050 workingsrb_doneindex=acb->workingsrb_doneindex; 1051 workingsrb_startindex=acb->workingsrb_startindex; 1052 srb=acb->srbworkingQ[workingsrb_startindex]; 1053 workingsrb_startindex++; 1054 workingsrb_startindex %= ARCMSR_MAX_FREESRB_NUM; 1055 if(workingsrb_doneindex!=workingsrb_startindex) { 1056 acb->workingsrb_startindex=workingsrb_startindex; 1057 } else { 1058 srb=NULL; 1059 } 1060 return(srb); 1061 } 1062 /* 1063 ************************************************************************** 1064 ************************************************************************** 1065 */ 1066 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, union ccb * pccb) 1067 { 1068 struct CMD_MESSAGE_FIELD * pcmdmessagefld; 1069 int retvalue = 0, transfer_len = 0; 1070 char *buffer; 1071 uint32_t controlcode = (uint32_t ) pccb->csio.cdb_io.cdb_bytes[5] << 24 | 1072 (uint32_t ) pccb->csio.cdb_io.cdb_bytes[6] << 16 | 1073 (uint32_t ) pccb->csio.cdb_io.cdb_bytes[7] << 8 | 1074 (uint32_t ) pccb->csio.cdb_io.cdb_bytes[8]; 1075 /* 4 bytes: Areca io control code */ 1076 if((pccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) { 1077 buffer = pccb->csio.data_ptr; 1078 transfer_len = pccb->csio.dxfer_len; 1079 } else { 1080 retvalue = ARCMSR_MESSAGE_FAIL; 1081 goto message_out; 1082 } 1083 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) { 1084 retvalue = ARCMSR_MESSAGE_FAIL; 1085 goto message_out; 1086 } 1087 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer; 1088 switch(controlcode) { 1089 case ARCMSR_MESSAGE_READ_RQBUFFER: { 1090 u_int8_t *pQbuffer; 1091 u_int8_t *ptmpQbuffer=pcmdmessagefld->messagedatabuffer; 1092 int32_t allxfer_len = 0; 1093 1094 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex) 1095 && (allxfer_len < 1031)) { 1096 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex]; 1097 memcpy(ptmpQbuffer, pQbuffer, 1); 1098 acb->rqbuf_firstindex++; 1099 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 1100 ptmpQbuffer++; 1101 allxfer_len++; 1102 } 1103 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1104 struct QBUFFER *prbuffer = (struct QBUFFER *) &acb->pmu->message_rbuffer; 1105 u_int8_t *iop_data = (u_int8_t *)prbuffer->data; 1106 int32_t iop_len; 1107 1108 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1109 iop_len =(u_int32_t)prbuffer->data_len; 1110 while (iop_len > 0) { 1111 pQbuffer= &acb->rqbuffer[acb->rqbuf_lastindex]; 1112 memcpy(pQbuffer, iop_data, 1); 1113 acb->rqbuf_lastindex++; 1114 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1115 iop_data++; 1116 iop_len--; 1117 } 1118 CHIP_REG_WRITE32(inbound_doorbell, 1119 ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 1120 } 1121 pcmdmessagefld->cmdmessage.Length = allxfer_len; 1122 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; 1123 retvalue=ARCMSR_MESSAGE_SUCCESS; 1124 } 1125 break; 1126 case ARCMSR_MESSAGE_WRITE_WQBUFFER: { 1127 int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex; 1128 u_int8_t *pQbuffer; 1129 u_int8_t *ptmpuserbuffer=pcmdmessagefld->messagedatabuffer; 1130 1131 user_len = pcmdmessagefld->cmdmessage.Length; 1132 wqbuf_lastindex = acb->wqbuf_lastindex; 1133 wqbuf_firstindex = acb->wqbuf_firstindex; 1134 if (wqbuf_lastindex != wqbuf_firstindex) { 1135 arcmsr_post_Qbuffer(acb); 1136 /* has error report sensedata */ 1137 if(&pccb->csio.sense_data) { 1138 ((u_int8_t *)&pccb->csio.sense_data)[0] = (0x1 << 7 | 0x70); 1139 /* Valid,ErrorCode */ 1140 ((u_int8_t *)&pccb->csio.sense_data)[2] = 0x05; 1141 /* FileMark,EndOfMedia,IncorrectLength,Reserved,SenseKey */ 1142 ((u_int8_t *)&pccb->csio.sense_data)[7] = 0x0A; 1143 /* AdditionalSenseLength */ 1144 ((u_int8_t *)&pccb->csio.sense_data)[12] = 0x20; 1145 /* AdditionalSenseCode */ 1146 } 1147 retvalue = ARCMSR_MESSAGE_FAIL; 1148 } else { 1149 my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1) 1150 &(ARCMSR_MAX_QBUFFER - 1); 1151 if (my_empty_len >= user_len) { 1152 while (user_len > 0) { 1153 pQbuffer = &acb->wqbuffer[acb->wqbuf_lastindex]; 1154 memcpy(pQbuffer, ptmpuserbuffer, 1); 1155 acb->wqbuf_lastindex++; 1156 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1157 ptmpuserbuffer++; 1158 user_len--; 1159 } 1160 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { 1161 acb->acb_flags &= 1162 ~ACB_F_MESSAGE_WQBUFFER_CLEARED; 1163 arcmsr_post_Qbuffer(acb); 1164 } 1165 } else { 1166 /* has error report sensedata */ 1167 if(&pccb->csio.sense_data) { 1168 ((u_int8_t *)&pccb->csio.sense_data)[0] = (0x1 << 7 | 0x70); 1169 /* Valid,ErrorCode */ 1170 ((u_int8_t *)&pccb->csio.sense_data)[2] = 0x05; 1171 /* FileMark,EndOfMedia,IncorrectLength,Reserved,SenseKey */ 1172 ((u_int8_t *)&pccb->csio.sense_data)[7] = 0x0A; 1173 /* AdditionalSenseLength */ 1174 ((u_int8_t *)&pccb->csio.sense_data)[12] = 0x20; 1175 /* AdditionalSenseCode */ 1176 } 1177 retvalue = ARCMSR_MESSAGE_FAIL; 1178 } 1179 } 1180 } 1181 break; 1182 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { 1183 u_int8_t *pQbuffer = acb->rqbuffer; 1184 1185 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1186 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1187 CHIP_REG_WRITE32(inbound_doorbell 1188 , ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 1189 } 1190 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; 1191 acb->rqbuf_firstindex = 0; 1192 acb->rqbuf_lastindex = 0; 1193 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1194 pcmdmessagefld->cmdmessage.ReturnCode = 1195 ARCMSR_MESSAGE_RETURNCODE_OK; 1196 } 1197 break; 1198 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: { 1199 u_int8_t *pQbuffer = acb->wqbuffer; 1200 1201 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1202 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1203 CHIP_REG_WRITE32(inbound_doorbell 1204 , ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 1205 } 1206 acb->acb_flags |= 1207 (ACB_F_MESSAGE_WQBUFFER_CLEARED | 1208 ACB_F_MESSAGE_WQBUFFER_READED); 1209 acb->wqbuf_firstindex = 0; 1210 acb->wqbuf_lastindex = 0; 1211 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1212 pcmdmessagefld->cmdmessage.ReturnCode = 1213 ARCMSR_MESSAGE_RETURNCODE_OK; 1214 } 1215 break; 1216 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { 1217 u_int8_t *pQbuffer; 1218 1219 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1220 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1221 CHIP_REG_WRITE32(inbound_doorbell 1222 , ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 1223 } 1224 acb->acb_flags |= 1225 (ACB_F_MESSAGE_WQBUFFER_CLEARED 1226 | ACB_F_MESSAGE_RQBUFFER_CLEARED 1227 | ACB_F_MESSAGE_WQBUFFER_READED); 1228 acb->rqbuf_firstindex = 0; 1229 acb->rqbuf_lastindex = 0; 1230 acb->wqbuf_firstindex = 0; 1231 acb->wqbuf_lastindex = 0; 1232 pQbuffer = acb->rqbuffer; 1233 memset(pQbuffer, 0, sizeof (struct QBUFFER)); 1234 pQbuffer = acb->wqbuffer; 1235 memset(pQbuffer, 0, sizeof (struct QBUFFER)); 1236 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; 1237 } 1238 break; 1239 case ARCMSR_MESSAGE_REQUEST_RETURNCODE_3F: { 1240 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_3F; 1241 } 1242 break; 1243 case ARCMSR_MESSAGE_SAY_HELLO: { 1244 int8_t * hello_string = "Hello! I am ARCMSR"; 1245 1246 memcpy(pcmdmessagefld->messagedatabuffer, hello_string 1247 , (int16_t)strlen(hello_string)); 1248 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; 1249 } 1250 break; 1251 case ARCMSR_MESSAGE_SAY_GOODBYE: 1252 arcmsr_iop_parking(acb); 1253 break; 1254 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: 1255 arcmsr_flush_adapter_cache(acb); 1256 break; 1257 default: 1258 retvalue = ARCMSR_MESSAGE_FAIL; 1259 } 1260 message_out: 1261 return retvalue; 1262 } 1263 /* 1264 ********************************************************************* 1265 ********************************************************************* 1266 */ 1267 static void arcmsr_executesrb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 1268 { 1269 struct CommandControlBlock *srb=(struct CommandControlBlock *)arg; 1270 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)srb->acb; 1271 union ccb * pccb; 1272 int target, lun; 1273 1274 pccb=srb->pccb; 1275 target=pccb->ccb_h.target_id; 1276 lun=pccb->ccb_h.target_lun; 1277 if(error != 0) { 1278 if(error != EFBIG) { 1279 printf("arcmsr%d: unexpected error %x returned from 'bus_dmamap_load' \n" 1280 , acb->pci_unit, error); 1281 } 1282 if((pccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) { 1283 pccb->ccb_h.status |= CAM_REQ_TOO_BIG; 1284 } 1285 arcmsr_srb_complete(srb, 0); 1286 return; 1287 } 1288 if(nseg > ARCMSR_MAX_SG_ENTRIES) { 1289 pccb->ccb_h.status |= CAM_REQ_TOO_BIG; 1290 arcmsr_srb_complete(srb, 0); 1291 return; 1292 } 1293 if(acb->acb_flags & ACB_F_BUS_RESET) { 1294 printf("arcmsr%d: bus reset and return busy \n", acb->pci_unit); 1295 pccb->ccb_h.status |= CAM_SCSI_BUS_RESET; 1296 arcmsr_srb_complete(srb, 0); 1297 return; 1298 } 1299 if(acb->devstate[target][lun]==ARECA_RAID_GONE) { 1300 u_int8_t block_cmd; 1301 1302 block_cmd=pccb->csio.cdb_io.cdb_bytes[0] & 0x0f; 1303 if(block_cmd==0x08 || block_cmd==0x0a) { 1304 printf("arcmsr%d:block 'read/write' command" 1305 "with gone raid volume Cmd=%2x, TargetId=%d, Lun=%d \n" 1306 , acb->pci_unit, block_cmd, target, lun); 1307 pccb->ccb_h.status |= CAM_DEV_NOT_THERE; 1308 arcmsr_srb_complete(srb, 0); 1309 return; 1310 } 1311 } 1312 if((pccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) { 1313 if(nseg != 0) { 1314 bus_dmamap_unload(acb->dm_segs_dmat, srb->dm_segs_dmamap); 1315 } 1316 arcmsr_srb_complete(srb, 0); 1317 return; 1318 } 1319 if(acb->srboutstandingcount >= ARCMSR_MAX_OUTSTANDING_CMD) { 1320 xpt_freeze_simq(acb->psim, 1); 1321 pccb->ccb_h.status = CAM_REQUEUE_REQ; 1322 acb->acb_flags |= ACB_F_CAM_DEV_QFRZN; 1323 arcmsr_srb_complete(srb, 0); 1324 return; 1325 } 1326 pccb->ccb_h.status |= CAM_SIM_QUEUED; 1327 arcmsr_build_srb(srb, dm_segs, nseg); 1328 arcmsr_post_srb(acb, srb); 1329 return; 1330 } 1331 /* 1332 ***************************************************************************************** 1333 ***************************************************************************************** 1334 */ 1335 static u_int8_t arcmsr_seek_cmd2abort(union ccb * abortccb) 1336 { 1337 struct CommandControlBlock *srb; 1338 struct AdapterControlBlock *acb=(struct AdapterControlBlock *) abortccb->ccb_h.arcmsr_ccbacb_ptr; 1339 u_int32_t intmask_org, mask; 1340 int i=0; 1341 1342 acb->num_aborts++; 1343 /* 1344 *************************************************************************** 1345 ** It is the upper layer do abort command this lock just prior to calling us. 1346 ** First determine if we currently own this command. 1347 ** Start by searching the device queue. If not found 1348 ** at all, and the system wanted us to just abort the 1349 ** command return success. 1350 *************************************************************************** 1351 */ 1352 if(acb->srboutstandingcount!=0) { 1353 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++) { 1354 srb=acb->psrb_pool[i]; 1355 if(srb->startdone==ARCMSR_SRB_START) { 1356 if(srb->pccb==abortccb) { 1357 srb->startdone=ARCMSR_SRB_ABORTED; 1358 printf("arcmsr%d:scsi id=%d lun=%d abort srb '%p'" 1359 "outstanding command \n" 1360 , acb->pci_unit, abortccb->ccb_h.target_id 1361 , abortccb->ccb_h.target_lun, srb); 1362 goto abort_outstanding_cmd; 1363 } 1364 } 1365 } 1366 } 1367 return(FALSE); 1368 abort_outstanding_cmd: 1369 /* do not talk to iop 331 abort command */ 1370 UDELAY(3000*1000);/*wait for 3 sec for all command done*/ 1371 /* disable all outbound interrupt */ 1372 intmask_org=CHIP_REG_READ32(outbound_intmask); 1373 CHIP_REG_WRITE32(outbound_intmask, intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE); 1374 arcmsr_polling_srbdone(acb, srb); 1375 /* enable all outbound interrupt */ 1376 mask=~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE|ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE); 1377 CHIP_REG_WRITE32(outbound_intmask, intmask_org & mask); 1378 return (TRUE); 1379 } 1380 /* 1381 **************************************************************************** 1382 **************************************************************************** 1383 */ 1384 static void arcmsr_bus_reset(struct AdapterControlBlock *acb) 1385 { 1386 int retry=0; 1387 1388 acb->num_resets++; 1389 acb->acb_flags |=ACB_F_BUS_RESET; 1390 while(acb->srboutstandingcount!=0 && retry < 400) { 1391 arcmsr_interrupt((void *)acb); 1392 UDELAY(25000); 1393 retry++; 1394 } 1395 arcmsr_iop_reset(acb); 1396 acb->acb_flags &= ~ACB_F_BUS_RESET; 1397 return; 1398 } 1399 /* 1400 ************************************************************************** 1401 ************************************************************************** 1402 */ 1403 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb, 1404 union ccb * pccb) 1405 { 1406 pccb->ccb_h.status |= CAM_REQ_CMP; 1407 switch (pccb->csio.cdb_io.cdb_bytes[0]) { 1408 case INQUIRY: { 1409 unsigned char inqdata[36]; 1410 char *buffer=pccb->csio.data_ptr;; 1411 1412 if (pccb->ccb_h.target_lun) { 1413 pccb->ccb_h.status |= CAM_SEL_TIMEOUT; 1414 xpt_done(pccb); 1415 return; 1416 } 1417 inqdata[0] = T_PROCESSOR; 1418 /* Periph Qualifier & Periph Dev Type */ 1419 inqdata[1] = 0; 1420 /* rem media bit & Dev Type Modifier */ 1421 inqdata[2] = 0; 1422 /* ISO, ECMA, & ANSI versions */ 1423 inqdata[4] = 31; 1424 /* length of additional data */ 1425 strncpy(&inqdata[8], "Areca ", 8); 1426 /* Vendor Identification */ 1427 strncpy(&inqdata[16], "RAID controller ", 16); 1428 /* Product Identification */ 1429 strncpy(&inqdata[32], "R001", 4); /* Product Revision */ 1430 memcpy(buffer, inqdata, sizeof(inqdata)); 1431 xpt_done(pccb); 1432 } 1433 break; 1434 case WRITE_BUFFER: 1435 case READ_BUFFER: { 1436 if (arcmsr_iop_message_xfer(acb, pccb)) { 1437 pccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1438 pccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1439 } 1440 xpt_done(pccb); 1441 } 1442 break; 1443 default: 1444 xpt_done(pccb); 1445 } 1446 } 1447 /* 1448 ********************************************************************* 1449 ********************************************************************* 1450 */ 1451 static void arcmsr_action(struct cam_sim * psim, union ccb * pccb) 1452 { 1453 struct AdapterControlBlock * acb; 1454 1455 acb=(struct AdapterControlBlock *) cam_sim_softc(psim); 1456 if(acb==NULL) { 1457 pccb->ccb_h.status |= CAM_REQ_INVALID; 1458 xpt_done(pccb); 1459 return; 1460 } 1461 switch (pccb->ccb_h.func_code) { 1462 case XPT_SCSI_IO: { 1463 struct CommandControlBlock *srb; 1464 int target=pccb->ccb_h.target_id; 1465 1466 if(target == 16) { 1467 /* virtual device for iop message transfer */ 1468 arcmsr_handle_virtual_command(acb, pccb); 1469 return; 1470 } 1471 if((srb=arcmsr_get_freesrb(acb)) == NULL) { 1472 pccb->ccb_h.status |= CAM_RESRC_UNAVAIL; 1473 xpt_done(pccb); 1474 return; 1475 } 1476 pccb->ccb_h.arcmsr_ccbsrb_ptr=srb; 1477 pccb->ccb_h.arcmsr_ccbacb_ptr=acb; 1478 srb->pccb=pccb; 1479 if((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1480 if(!(pccb->ccb_h.flags & CAM_SCATTER_VALID)) { 1481 /* Single buffer */ 1482 if(!(pccb->ccb_h.flags & CAM_DATA_PHYS)) { 1483 /* Buffer is virtual */ 1484 u_int32_t error, s; 1485 1486 s=splsoftvm(); 1487 error = bus_dmamap_load(acb->dm_segs_dmat 1488 , srb->dm_segs_dmamap 1489 , pccb->csio.data_ptr 1490 , pccb->csio.dxfer_len 1491 , arcmsr_executesrb, srb, /*flags*/0); 1492 if(error == EINPROGRESS) { 1493 xpt_freeze_simq(acb->psim, 1); 1494 pccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1495 } 1496 splx(s); 1497 } else { 1498 /* Buffer is physical */ 1499 panic("arcmsr: CAM_DATA_PHYS not supported"); 1500 } 1501 } else { 1502 /* Scatter/gather list */ 1503 struct bus_dma_segment *segs; 1504 1505 if((pccb->ccb_h.flags & CAM_SG_LIST_PHYS) == 0 1506 || (pccb->ccb_h.flags & CAM_DATA_PHYS) != 0) { 1507 pccb->ccb_h.status |= CAM_PROVIDE_FAIL; 1508 xpt_done(pccb); 1509 free(srb, M_DEVBUF); 1510 return; 1511 } 1512 segs=(struct bus_dma_segment *)pccb->csio.data_ptr; 1513 arcmsr_executesrb(srb, segs, pccb->csio.sglist_cnt, 0); 1514 } 1515 } else { 1516 arcmsr_executesrb(srb, NULL, 0, 0); 1517 } 1518 break; 1519 } 1520 case XPT_TARGET_IO: { 1521 /* target mode not yet support vendor specific commands. */ 1522 pccb->ccb_h.status |= CAM_REQ_CMP; 1523 xpt_done(pccb); 1524 break; 1525 } 1526 case XPT_PATH_INQ: { 1527 struct ccb_pathinq *cpi= &pccb->cpi; 1528 1529 cpi->version_num=1; 1530 cpi->hba_inquiry=PI_SDTR_ABLE | PI_TAG_ABLE; 1531 cpi->target_sprt=0; 1532 cpi->hba_misc=0; 1533 cpi->hba_eng_cnt=0; 1534 cpi->max_target=ARCMSR_MAX_TARGETID; /* 0-16 */ 1535 cpi->max_lun=ARCMSR_MAX_TARGETLUN; /* 0-7 */ 1536 cpi->initiator_id=ARCMSR_SCSI_INITIATOR_ID; /* 255 */ 1537 cpi->bus_id=cam_sim_bus(psim); 1538 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1539 strncpy(cpi->hba_vid, "ARCMSR", HBA_IDLEN); 1540 strncpy(cpi->dev_name, cam_sim_name(psim), DEV_IDLEN); 1541 cpi->unit_number=cam_sim_unit(psim); 1542 cpi->transport = XPORT_SPI; 1543 cpi->transport_version = 2; 1544 cpi->protocol = PROTO_SCSI; 1545 cpi->protocol_version = SCSI_REV_2; 1546 cpi->ccb_h.status |= CAM_REQ_CMP; 1547 xpt_done(pccb); 1548 break; 1549 } 1550 case XPT_ABORT: { 1551 union ccb *pabort_ccb; 1552 1553 pabort_ccb=pccb->cab.abort_ccb; 1554 switch (pabort_ccb->ccb_h.func_code) { 1555 case XPT_ACCEPT_TARGET_IO: 1556 case XPT_IMMED_NOTIFY: 1557 case XPT_CONT_TARGET_IO: 1558 if(arcmsr_seek_cmd2abort(pabort_ccb)==TRUE) { 1559 pabort_ccb->ccb_h.status |= CAM_REQ_ABORTED; 1560 xpt_done(pabort_ccb); 1561 pccb->ccb_h.status |= CAM_REQ_CMP; 1562 } else { 1563 xpt_print_path(pabort_ccb->ccb_h.path); 1564 printf("Not found\n"); 1565 pccb->ccb_h.status |= CAM_PATH_INVALID; 1566 } 1567 break; 1568 case XPT_SCSI_IO: 1569 pccb->ccb_h.status |= CAM_UA_ABORT; 1570 break; 1571 default: 1572 pccb->ccb_h.status |= CAM_REQ_INVALID; 1573 break; 1574 } 1575 xpt_done(pccb); 1576 break; 1577 } 1578 case XPT_RESET_BUS: 1579 case XPT_RESET_DEV: { 1580 u_int32_t i; 1581 1582 arcmsr_bus_reset(acb); 1583 for (i=0; i < 500; i++) { 1584 DELAY(1000); 1585 } 1586 pccb->ccb_h.status |= CAM_REQ_CMP; 1587 xpt_done(pccb); 1588 break; 1589 } 1590 case XPT_TERM_IO: { 1591 pccb->ccb_h.status |= CAM_REQ_INVALID; 1592 xpt_done(pccb); 1593 break; 1594 } 1595 case XPT_GET_TRAN_SETTINGS: { 1596 struct ccb_trans_settings *cts; 1597 struct ccb_trans_settings_scsi *scsi; 1598 struct ccb_trans_settings_spi *spi; 1599 1600 if(pccb->ccb_h.target_id == 16) { 1601 pccb->ccb_h.status |= CAM_FUNC_NOTAVAIL; 1602 xpt_done(pccb); 1603 break; 1604 } 1605 1606 cts= &pccb->cts; 1607 scsi = &cts->proto_specific.scsi; 1608 spi = &cts->xport_specific.spi; 1609 1610 cts->protocol = PROTO_SCSI; 1611 cts->protocol_version = SCSI_REV_2; 1612 cts->transport = XPORT_SPI; 1613 cts->transport_version = 2; 1614 spi->flags = CTS_SPI_FLAGS_DISC_ENB; 1615 spi->sync_period=3; 1616 spi->sync_offset=32; 1617 spi->bus_width=MSG_EXT_WDTR_BUS_16_BIT; 1618 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB; 1619 spi->valid = CTS_SPI_VALID_SYNC_RATE 1620 | CTS_SPI_VALID_SYNC_OFFSET 1621 | CTS_SPI_VALID_BUS_WIDTH; 1622 scsi->valid = CTS_SCSI_VALID_TQ; 1623 1624 pccb->ccb_h.status |= CAM_REQ_CMP; 1625 xpt_done(pccb); 1626 break; 1627 } 1628 case XPT_SET_TRAN_SETTINGS: { 1629 pccb->ccb_h.status |= CAM_FUNC_NOTAVAIL; 1630 xpt_done(pccb); 1631 break; 1632 } 1633 case XPT_CALC_GEOMETRY: { 1634 struct ccb_calc_geometry *ccg; 1635 u_int32_t size_mb; 1636 u_int32_t secs_per_cylinder; 1637 1638 if(pccb->ccb_h.target_id == 16) { 1639 pccb->ccb_h.status |= CAM_FUNC_NOTAVAIL; 1640 xpt_done(pccb); 1641 break; 1642 } 1643 ccg= &pccb->ccg; 1644 if (ccg->block_size == 0) { 1645 pccb->ccb_h.status = CAM_REQ_INVALID; 1646 xpt_done(pccb); 1647 break; 1648 } 1649 if(((1024L * 1024L)/ccg->block_size) < 0) { 1650 pccb->ccb_h.status = CAM_REQ_INVALID; 1651 xpt_done(pccb); 1652 break; 1653 } 1654 size_mb=ccg->volume_size/((1024L * 1024L)/ccg->block_size); 1655 if(size_mb > 1024 ) { 1656 ccg->heads=255; 1657 ccg->secs_per_track=63; 1658 } else { 1659 ccg->heads=64; 1660 ccg->secs_per_track=32; 1661 } 1662 secs_per_cylinder=ccg->heads * ccg->secs_per_track; 1663 ccg->cylinders=ccg->volume_size / secs_per_cylinder; 1664 pccb->ccb_h.status |= CAM_REQ_CMP; 1665 xpt_done(pccb); 1666 break; 1667 } 1668 default: 1669 pccb->ccb_h.status |= CAM_REQ_INVALID; 1670 xpt_done(pccb); 1671 break; 1672 } 1673 return; 1674 } 1675 /* 1676 ********************************************************************** 1677 ********************************************************************** 1678 */ 1679 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb) 1680 { 1681 acb->acb_flags |= ACB_F_MSG_START_BGRB; 1682 CHIP_REG_WRITE32(inbound_msgaddr0, ARCMSR_INBOUND_MESG0_START_BGRB); 1683 if(arcmsr_wait_msgint_ready(acb)) { 1684 printf("arcmsr%d: wait 'start adapter background rebulid' timeout \n", acb->pci_unit); 1685 } 1686 return; 1687 } 1688 /* 1689 ********************************************************************** 1690 ********************************************************************** 1691 */ 1692 static void arcmsr_polling_srbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_srb) 1693 { 1694 struct CommandControlBlock *srb; 1695 uint32_t flag_srb, outbound_intstatus, poll_srb_done=0, poll_count=0; 1696 int id, lun; 1697 1698 polling_srb_retry: 1699 poll_count++; 1700 outbound_intstatus=CHIP_REG_READ32(outbound_intstatus) & acb->outbound_int_enable; 1701 CHIP_REG_WRITE32(outbound_intstatus, outbound_intstatus);/*clear interrupt*/ 1702 while(1) { 1703 if((flag_srb=CHIP_REG_READ32(outbound_queueport))==0xFFFFFFFF) { 1704 if(poll_srb_done) { 1705 break;/*chip FIFO no ccb for completion already*/ 1706 } else { 1707 UDELAY(25000); 1708 if(poll_count > 100) { 1709 break; 1710 } 1711 goto polling_srb_retry; 1712 } 1713 } 1714 /* check ifcommand done with no error*/ 1715 srb=(struct CommandControlBlock *)(acb->vir2phy_offset+(flag_srb << 5)); 1716 /*frame must be 32 bytes aligned*/ 1717 if((srb->acb!=acb) || (srb->startdone!=ARCMSR_SRB_START)) { 1718 if((srb->startdone==ARCMSR_SRB_ABORTED) && (srb==poll_srb)) { 1719 printf("arcmsr%d: scsi id=%d lun=%d srb='%p'" 1720 "poll command abort successfully \n" 1721 , acb->pci_unit 1722 , srb->pccb->ccb_h.target_id 1723 , srb->pccb->ccb_h.target_lun, srb); 1724 srb->pccb->ccb_h.status |= CAM_REQ_ABORTED; 1725 arcmsr_srb_complete(srb, 1); 1726 poll_srb_done=1; 1727 continue; 1728 } 1729 printf("arcmsr%d: polling get an illegal srb command done srb='%p'" 1730 "srboutstandingcount=%d \n" 1731 , acb->pci_unit 1732 , srb, acb->srboutstandingcount); 1733 continue; 1734 } 1735 id=srb->pccb->ccb_h.target_id; 1736 lun=srb->pccb->ccb_h.target_lun; 1737 if((flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR)==0) { 1738 if(acb->devstate[id][lun]==ARECA_RAID_GONE) { 1739 acb->devstate[id][lun]=ARECA_RAID_GOOD; 1740 } 1741 srb->pccb->ccb_h.status |= CAM_REQ_CMP; 1742 arcmsr_srb_complete(srb, 1); 1743 } else { 1744 switch(srb->arcmsr_cdb.DeviceStatus) { 1745 case ARCMSR_DEV_SELECT_TIMEOUT: { 1746 acb->devstate[id][lun]=ARECA_RAID_GONE; 1747 srb->pccb->ccb_h.status |= CAM_SEL_TIMEOUT; 1748 arcmsr_srb_complete(srb, 1); 1749 } 1750 break; 1751 case ARCMSR_DEV_ABORTED: 1752 case ARCMSR_DEV_INIT_FAIL: { 1753 acb->devstate[id][lun]=ARECA_RAID_GONE; 1754 srb->pccb->ccb_h.status |= CAM_DEV_NOT_THERE; 1755 arcmsr_srb_complete(srb, 1); 1756 } 1757 break; 1758 case SCSISTAT_CHECK_CONDITION: { 1759 acb->devstate[id][lun]=ARECA_RAID_GOOD; 1760 arcmsr_report_sense_info(srb); 1761 arcmsr_srb_complete(srb, 1); 1762 } 1763 break; 1764 default: 1765 printf("arcmsr%d: scsi id=%d lun=%d" 1766 "polling and getting command error done" 1767 ", but got unknow DeviceStatus=0x%x \n" 1768 , acb->pci_unit, id, lun, srb->arcmsr_cdb.DeviceStatus); 1769 acb->devstate[id][lun]=ARECA_RAID_GONE; 1770 srb->pccb->ccb_h.status |= CAM_UNCOR_PARITY; 1771 /*unknow error or crc error just for retry*/ 1772 arcmsr_srb_complete(srb, 1); 1773 break; 1774 } 1775 } 1776 } /*drain reply FIFO*/ 1777 return; 1778 } 1779 /* 1780 ********************************************************************** 1781 ** get firmware miscellaneous data 1782 ********************************************************************** 1783 */ 1784 static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) 1785 { 1786 char *acb_firm_model=acb->firm_model; 1787 char *acb_firm_version=acb->firm_version; 1788 size_t iop_firm_model=offsetof(struct MessageUnit,message_rwbuffer[15]); /*firm_model,15,60-67*/ 1789 size_t iop_firm_version=offsetof(struct MessageUnit,message_rwbuffer[17]); /*firm_version,17,68-83*/ 1790 int i; 1791 1792 CHIP_REG_WRITE32(inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); 1793 if(arcmsr_wait_msgint_ready(acb)) { 1794 printf("arcmsr%d: wait 'get adapter firmware miscellaneous data' timeout \n" 1795 , acb->pci_unit); 1796 } 1797 i=0; 1798 while(i<8) { 1799 *acb_firm_model=bus_space_read_1(acb->btag, acb->bhandle, iop_firm_model+i); 1800 /* 8 bytes firm_model, 15, 60-67*/ 1801 acb_firm_model++; 1802 i++; 1803 } 1804 i=0; 1805 while(i<16) { 1806 *acb_firm_version=bus_space_read_1(acb->btag, acb->bhandle, iop_firm_version+i); 1807 /* 16 bytes firm_version, 17, 68-83*/ 1808 acb_firm_version++; 1809 i++; 1810 } 1811 printf("ARECA RAID ADAPTER%d: %s \n", acb->pci_unit, ARCMSR_DRIVER_VERSION); 1812 printf("ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n", acb->pci_unit, acb->firm_version); 1813 acb->firm_request_len=CHIP_REG_READ32(message_rwbuffer[1]); /*firm_request_len, 1, 04-07*/ 1814 acb->firm_numbers_queue=CHIP_REG_READ32(message_rwbuffer[2]); /*firm_numbers_queue, 2, 08-11*/ 1815 acb->firm_sdram_size=CHIP_REG_READ32(message_rwbuffer[3]); /*firm_sdram_size, 3, 12-15*/ 1816 acb->firm_ide_channels=CHIP_REG_READ32(message_rwbuffer[4]); /*firm_ide_channels, 4, 16-19*/ 1817 return; 1818 } 1819 /* 1820 ********************************************************************** 1821 ** start background rebulid 1822 ********************************************************************** 1823 */ 1824 static void arcmsr_iop_init(struct AdapterControlBlock *acb) 1825 { 1826 u_int32_t intmask_org, mask, outbound_doorbell, firmware_state=0; 1827 1828 do { 1829 firmware_state=CHIP_REG_READ32(outbound_msgaddr1); 1830 } while((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK)==0); 1831 intmask_org=CHIP_REG_READ32(outbound_intmask)|ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE; 1832 CHIP_REG_WRITE32(outbound_intmask, intmask_org); 1833 intmask_org=CHIP_REG_READ32(outbound_intmask)|ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE; 1834 arcmsr_get_firmware_spec(acb); 1835 arcmsr_start_adapter_bgrb(acb); 1836 /* clear Qbuffer if door bell ringed */ 1837 outbound_doorbell=CHIP_REG_READ32(outbound_doorbell); 1838 CHIP_REG_WRITE32(outbound_doorbell, outbound_doorbell);/*clear interrupt */ 1839 CHIP_REG_WRITE32(inbound_doorbell, ARCMSR_INBOUND_DRIVER_DATA_READ_OK); 1840 /* enable outbound Post Queue, outbound message0, outbell doorbell Interrupt */ 1841 mask=~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE|ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE); 1842 CHIP_REG_WRITE32(outbound_intmask, intmask_org & mask); 1843 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff; 1844 acb->acb_flags |=ACB_F_IOP_INITED; 1845 return; 1846 } 1847 /* 1848 ********************************************************************** 1849 ********************************************************************** 1850 */ 1851 static void arcmsr_map_freesrb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 1852 { 1853 struct AdapterControlBlock *acb=arg; 1854 struct CommandControlBlock *srb_tmp; 1855 u_int8_t * dma_memptr; 1856 u_int32_t i, srb_phyaddr_hi32; 1857 unsigned long srb_phyaddr=(unsigned long)segs->ds_addr; 1858 1859 dma_memptr=acb->uncacheptr; 1860 srb_phyaddr=segs->ds_addr; /* We suppose bus_addr_t high part always 0 here*/ 1861 if(((unsigned long)dma_memptr & 0x1F)!=0) { 1862 dma_memptr=dma_memptr+(0x20-((unsigned long)dma_memptr & 0x1F)); 1863 srb_phyaddr=srb_phyaddr+(0x20-((unsigned long)srb_phyaddr & 0x1F)); 1864 } 1865 srb_tmp=(struct CommandControlBlock *)dma_memptr; 1866 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++) { 1867 /*srb address must 32 (0x20) boundary*/ 1868 if(((unsigned long)srb_tmp & 0x1F)==0) { 1869 if(bus_dmamap_create(acb->dm_segs_dmat, /*flags*/0, &srb_tmp->dm_segs_dmamap)!=0) { 1870 acb->acb_flags |= ACB_F_MAPFREESRB_FAILD; 1871 printf("arcmsr%d: srb dmamap bus_dmamap_create error\n", acb->pci_unit); 1872 return; 1873 } 1874 srb_tmp->cdb_shifted_phyaddr=srb_phyaddr >> 5; 1875 srb_tmp->acb=acb; 1876 acb->srbworkingQ[i]=acb->psrb_pool[i]=srb_tmp; 1877 srb_phyaddr=srb_phyaddr+sizeof(struct CommandControlBlock); 1878 } else { 1879 acb->acb_flags |= ACB_F_MAPFREESRB_FAILD; 1880 printf("arcmsr%d: dma_memptr=%p i=%d" 1881 "this srb cross 32 bytes boundary ignored srb_tmp=%p \n" 1882 , acb->pci_unit, dma_memptr, i, srb_tmp); 1883 return; 1884 } 1885 srb_tmp++; 1886 } 1887 acb->vir2phy_offset=(unsigned long)srb_tmp-(unsigned long)srb_phyaddr; 1888 /* 1889 ******************************************************************** 1890 ** here we need to tell iop 331 our freesrb.HighPart 1891 ** if freesrb.HighPart is not zero 1892 ******************************************************************** 1893 */ 1894 srb_phyaddr_hi32=(uint32_t) ((srb_phyaddr>>16)>>16); 1895 if(srb_phyaddr_hi32!=0) { 1896 CHIP_REG_WRITE32(message_rwbuffer[0], ARCMSR_SIGNATURE_SET_CONFIG); 1897 CHIP_REG_WRITE32(message_rwbuffer[1], srb_phyaddr_hi32); 1898 CHIP_REG_WRITE32(inbound_msgaddr0, ARCMSR_INBOUND_MESG0_SET_CONFIG); 1899 if(arcmsr_wait_msgint_ready(acb)) { 1900 printf("arcmsr%d: 'set srb high part physical address' timeout \n", acb->pci_unit); 1901 } 1902 } 1903 return; 1904 } 1905 /* 1906 ************************************************************************ 1907 ** 1908 ** 1909 ************************************************************************ 1910 */ 1911 static void arcmsr_free_resource(struct AdapterControlBlock *acb) 1912 { 1913 /* remove the control device */ 1914 if(acb->ioctl_dev != NULL) { 1915 destroy_dev(acb->ioctl_dev); 1916 } 1917 bus_dmamap_unload(acb->srb_dmat, acb->srb_dmamap); 1918 bus_dmamap_destroy(acb->srb_dmat, acb->srb_dmamap); 1919 bus_dma_tag_destroy(acb->srb_dmat); 1920 bus_dma_tag_destroy(acb->dm_segs_dmat); 1921 bus_dma_tag_destroy(acb->parent_dmat); 1922 return; 1923 } 1924 /* 1925 ************************************************************************ 1926 ************************************************************************ 1927 */ 1928 static u_int32_t arcmsr_initialize(device_t dev) 1929 { 1930 struct AdapterControlBlock *acb=device_get_softc(dev); 1931 u_int32_t intmask_org, rid=PCIR_BAR(0); 1932 vm_offset_t mem_base; 1933 u_int16_t pci_command; 1934 int i, j; 1935 1936 #if __FreeBSD_version >= 502010 1937 if(bus_dma_tag_create( /*parent*/ NULL, 1938 /*alignemnt*/ 1, 1939 /*boundary*/ 0, 1940 /*lowaddr*/ BUS_SPACE_MAXADDR, 1941 /*highaddr*/ BUS_SPACE_MAXADDR, 1942 /*filter*/ NULL, 1943 /*filterarg*/ NULL, 1944 /*maxsize*/ BUS_SPACE_MAXSIZE_32BIT, 1945 /*nsegments*/ BUS_SPACE_UNRESTRICTED, 1946 /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, 1947 /*flags*/ 0, 1948 /*lockfunc*/ NULL, 1949 /*lockarg*/ NULL, 1950 &acb->parent_dmat) != 0) 1951 #else 1952 if(bus_dma_tag_create( /*parent*/ NULL, 1953 /*alignemnt*/ 1, 1954 /*boundary*/ 0, 1955 /*lowaddr*/ BUS_SPACE_MAXADDR, 1956 /*highaddr*/ BUS_SPACE_MAXADDR, 1957 /*filter*/ NULL, 1958 /*filterarg*/ NULL, 1959 /*maxsize*/ BUS_SPACE_MAXSIZE_32BIT, 1960 /*nsegments*/ BUS_SPACE_UNRESTRICTED, 1961 /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, 1962 /*flags*/ 0, 1963 &acb->parent_dmat) != 0) 1964 #endif 1965 { 1966 printf("arcmsr%d: parent_dmat bus_dma_tag_create failure!\n", acb->pci_unit); 1967 return ENOMEM; 1968 } 1969 /* Create a single tag describing a region large enough to hold all of the s/g lists we will need. */ 1970 #if __FreeBSD_version >= 502010 1971 if(bus_dma_tag_create( /*parent_dmat*/ acb->parent_dmat, 1972 /*alignment*/ 1, 1973 /*boundary*/ 0, 1974 /*lowaddr*/ BUS_SPACE_MAXADDR, 1975 /*highaddr*/ BUS_SPACE_MAXADDR, 1976 /*filter*/ NULL, 1977 /*filterarg*/ NULL, 1978 /*maxsize*/ MAXBSIZE, 1979 /*nsegments*/ ARCMSR_MAX_SG_ENTRIES, 1980 /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, 1981 /*flags*/ 0, 1982 /*lockfunc*/ busdma_lock_mutex, 1983 /*lockarg*/ &acb->qbuffer_lock, 1984 &acb->dm_segs_dmat) != 0) 1985 #else 1986 if(bus_dma_tag_create( /*parent_dmat*/ acb->parent_dmat, 1987 /*alignment*/ 1, 1988 /*boundary*/ 0, 1989 /*lowaddr*/ BUS_SPACE_MAXADDR, 1990 /*highaddr*/ BUS_SPACE_MAXADDR, 1991 /*filter*/ NULL, 1992 /*filterarg*/ NULL, 1993 /*maxsize*/ MAXBSIZE, 1994 /*nsegments*/ ARCMSR_MAX_SG_ENTRIES, 1995 /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, 1996 /*flags*/ 0, 1997 &acb->dm_segs_dmat) != 0) 1998 #endif 1999 { 2000 bus_dma_tag_destroy(acb->parent_dmat); 2001 printf("arcmsr%d: dm_segs_dmat bus_dma_tag_create failure!\n", acb->pci_unit); 2002 return ENOMEM; 2003 } 2004 /* DMA tag for our srb structures.... Allocate the freesrb memory */ 2005 #if __FreeBSD_version >= 502010 2006 if(bus_dma_tag_create( /*parent_dmat*/ acb->parent_dmat, 2007 /*alignment*/ 1, 2008 /*boundary*/ 0, 2009 /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, 2010 /*highaddr*/ BUS_SPACE_MAXADDR, 2011 /*filter*/ NULL, 2012 /*filterarg*/ NULL, 2013 /*maxsize*/ ARCMSR_SRBS_POOL_SIZE, 2014 /*nsegments*/ 1, 2015 /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, 2016 /*flags*/ 0, 2017 /*lockfunc*/ NULL, 2018 /*lockarg*/ NULL, 2019 &acb->srb_dmat) != 0) 2020 #else 2021 if(bus_dma_tag_create( /*parent_dmat*/ acb->parent_dmat, 2022 /*alignment*/ 1, 2023 /*boundary*/ 0, 2024 /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, 2025 /*highaddr*/ BUS_SPACE_MAXADDR, 2026 /*filter*/ NULL, 2027 /*filterarg*/ NULL, 2028 /*maxsize*/ ARCMSR_SRBS_POOL_SIZE, 2029 /*nsegments*/ 1, 2030 /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, 2031 /*flags*/ 0, 2032 &acb->srb_dmat) != 0) 2033 #endif 2034 { 2035 bus_dma_tag_destroy(acb->dm_segs_dmat); 2036 bus_dma_tag_destroy(acb->parent_dmat); 2037 printf("arcmsr%d: srb_dmat bus_dma_tag_create failure!\n", acb->pci_unit); 2038 return ENXIO; 2039 } 2040 /* Allocation for our srbs */ 2041 if(bus_dmamem_alloc(acb->srb_dmat, (void **)&acb->uncacheptr 2042 , BUS_DMA_WAITOK | BUS_DMA_COHERENT, &acb->srb_dmamap) != 0) { 2043 bus_dma_tag_destroy(acb->srb_dmat); 2044 bus_dma_tag_destroy(acb->dm_segs_dmat); 2045 bus_dma_tag_destroy(acb->parent_dmat); 2046 printf("arcmsr%d: srb_dmat bus_dmamem_alloc failure!\n", acb->pci_unit); 2047 return ENXIO; 2048 } 2049 /* And permanently map them */ 2050 if(bus_dmamap_load(acb->srb_dmat, acb->srb_dmamap, acb->uncacheptr 2051 , ARCMSR_SRBS_POOL_SIZE, arcmsr_map_freesrb, acb, /*flags*/0)) { 2052 bus_dma_tag_destroy(acb->srb_dmat); 2053 bus_dma_tag_destroy(acb->dm_segs_dmat); 2054 bus_dma_tag_destroy(acb->parent_dmat); 2055 printf("arcmsr%d: srb_dmat bus_dmamap_load failure!\n", acb->pci_unit); 2056 return ENXIO; 2057 } 2058 pci_command=pci_read_config(dev, PCIR_COMMAND, 2); 2059 pci_command |= PCIM_CMD_BUSMASTEREN; 2060 pci_command |= PCIM_CMD_PERRESPEN; 2061 pci_command |= PCIM_CMD_MWRICEN; 2062 /* Enable Busmaster/Mem */ 2063 pci_command |= PCIM_CMD_MEMEN; 2064 pci_write_config(dev, PCIR_COMMAND, pci_command, 2); 2065 acb->sys_res_arcmsr=bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 0ul, ~0ul, 0x1000, RF_ACTIVE); 2066 if(acb->sys_res_arcmsr == NULL) { 2067 arcmsr_free_resource(acb); 2068 printf("arcmsr%d: bus_alloc_resource failure!\n", acb->pci_unit); 2069 return ENOMEM; 2070 } 2071 if(rman_get_start(acb->sys_res_arcmsr) <= 0) { 2072 arcmsr_free_resource(acb); 2073 printf("arcmsr%d: rman_get_start failure!\n", acb->pci_unit); 2074 return ENXIO; 2075 } 2076 mem_base=(vm_offset_t) rman_get_virtual(acb->sys_res_arcmsr); 2077 if(mem_base==0) { 2078 arcmsr_free_resource(acb); 2079 printf("arcmsr%d: rman_get_virtual failure!\n", acb->pci_unit); 2080 return ENXIO; 2081 } 2082 if(acb->acb_flags & ACB_F_MAPFREESRB_FAILD) { 2083 arcmsr_free_resource(acb); 2084 printf("arcmsr%d: map free srb failure!\n", acb->pci_unit); 2085 return ENXIO; 2086 } 2087 acb->btag=rman_get_bustag(acb->sys_res_arcmsr); 2088 acb->bhandle=rman_get_bushandle(acb->sys_res_arcmsr); 2089 acb->pmu=(struct MessageUnit *)mem_base; 2090 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED 2091 |ACB_F_MESSAGE_RQBUFFER_CLEARED 2092 |ACB_F_MESSAGE_WQBUFFER_READED); 2093 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; 2094 /* 2095 ******************************************************************** 2096 ** init raid volume state 2097 ******************************************************************** 2098 */ 2099 for(i=0;i<ARCMSR_MAX_TARGETID;i++) { 2100 for(j=0;j<ARCMSR_MAX_TARGETLUN;j++) { 2101 acb->devstate[i][j]=ARECA_RAID_GOOD; 2102 } 2103 } 2104 /* disable iop all outbound interrupt */ 2105 intmask_org=CHIP_REG_READ32(outbound_intmask); 2106 CHIP_REG_WRITE32(outbound_intmask, intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE); 2107 arcmsr_iop_init(acb); 2108 return(0); 2109 } 2110 /* 2111 ************************************************************************ 2112 ************************************************************************ 2113 */ 2114 static u_int32_t arcmsr_attach(device_t dev) 2115 { 2116 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)device_get_softc(dev); 2117 u_int32_t unit=device_get_unit(dev); 2118 struct ccb_setasync csa; 2119 struct cam_devq *devq; /* Device Queue to use for this SIM */ 2120 struct resource *irqres; 2121 int rid; 2122 2123 if(acb == NULL) { 2124 printf("arcmsr%d: cannot allocate softc\n", unit); 2125 return (ENOMEM); 2126 } 2127 ARCMSR_LOCK_INIT(&acb->qbuffer_lock, "arcmsr Q buffer lock"); 2128 if(arcmsr_initialize(dev)) { 2129 printf("arcmsr%d: initialize failure!\n", unit); 2130 ARCMSR_LOCK_DESTROY(&acb->qbuffer_lock); 2131 return ENXIO; 2132 } 2133 /* After setting up the adapter, map our interrupt */ 2134 rid=0; 2135 irqres=bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, RF_SHAREABLE | RF_ACTIVE); 2136 if(irqres == NULL || 2137 bus_setup_intr(dev, irqres, INTR_TYPE_CAM|INTR_ENTROPY|INTR_MPSAFE 2138 , NULL, arcmsr_intr_handler, acb, &acb->ih)) { 2139 arcmsr_free_resource(acb); 2140 ARCMSR_LOCK_DESTROY(&acb->qbuffer_lock); 2141 printf("arcmsr%d: unable to register interrupt handler!\n", unit); 2142 return ENXIO; 2143 } 2144 acb->irqres=irqres; 2145 acb->pci_dev=dev; 2146 acb->pci_unit=unit; 2147 /* 2148 * Now let the CAM generic SCSI layer find the SCSI devices on 2149 * the bus * start queue to reset to the idle loop. * 2150 * Create device queue of SIM(s) * (MAX_START_JOB - 1) : 2151 * max_sim_transactions 2152 */ 2153 devq=cam_simq_alloc(ARCMSR_MAX_START_JOB); 2154 if(devq == NULL) { 2155 arcmsr_free_resource(acb); 2156 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres); 2157 ARCMSR_LOCK_DESTROY(&acb->qbuffer_lock); 2158 printf("arcmsr%d: cam_simq_alloc failure!\n", unit); 2159 return ENXIO; 2160 } 2161 acb->psim=cam_sim_alloc(arcmsr_action, arcmsr_poll, 2162 "arcmsr", acb, unit, &acb->qbuffer_lock, 1, 2163 ARCMSR_MAX_OUTSTANDING_CMD, devq); 2164 if(acb->psim == NULL) { 2165 arcmsr_free_resource(acb); 2166 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres); 2167 cam_simq_free(devq); 2168 ARCMSR_LOCK_DESTROY(&acb->qbuffer_lock); 2169 printf("arcmsr%d: cam_sim_alloc failure!\n", unit); 2170 return ENXIO; 2171 } 2172 ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock); 2173 if(xpt_bus_register(acb->psim, dev, 0) != CAM_SUCCESS) { 2174 arcmsr_free_resource(acb); 2175 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres); 2176 cam_sim_free(acb->psim, /*free_devq*/TRUE); 2177 ARCMSR_LOCK_DESTROY(&acb->qbuffer_lock); 2178 printf("arcmsr%d: xpt_bus_register failure!\n", unit); 2179 return ENXIO; 2180 } 2181 if(xpt_create_path(&acb->ppath, /* periph */ NULL 2182 , cam_sim_path(acb->psim) 2183 , CAM_TARGET_WILDCARD 2184 , CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 2185 arcmsr_free_resource(acb); 2186 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres); 2187 xpt_bus_deregister(cam_sim_path(acb->psim)); 2188 cam_sim_free(acb->psim, /* free_simq */ TRUE); 2189 ARCMSR_LOCK_DESTROY(&acb->qbuffer_lock); 2190 printf("arcmsr%d: xpt_create_path failure!\n", unit); 2191 return ENXIO; 2192 } 2193 /* 2194 **************************************************** 2195 */ 2196 xpt_setup_ccb(&csa.ccb_h, acb->ppath, /*priority*/5); 2197 csa.ccb_h.func_code=XPT_SASYNC_CB; 2198 csa.event_enable=AC_FOUND_DEVICE|AC_LOST_DEVICE; 2199 csa.callback=arcmsr_async; 2200 csa.callback_arg=acb->psim; 2201 xpt_action((union ccb *)&csa); 2202 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock); 2203 /* Create the control device. */ 2204 acb->ioctl_dev=make_dev(&arcmsr_cdevsw 2205 , unit 2206 , UID_ROOT 2207 , GID_WHEEL /* GID_OPERATOR */ 2208 , S_IRUSR | S_IWUSR 2209 , "arcmsr%d", unit); 2210 #if __FreeBSD_version < 503000 2211 acb->ioctl_dev->si_drv1=acb; 2212 #endif 2213 #if __FreeBSD_version > 500005 2214 (void)make_dev_alias(acb->ioctl_dev, "arc%d", unit); 2215 #endif 2216 return 0; 2217 } 2218 /* 2219 ************************************************************************ 2220 ************************************************************************ 2221 */ 2222 static u_int32_t arcmsr_probe(device_t dev) 2223 { 2224 u_int32_t id; 2225 static char buf[256]; 2226 char *type; 2227 int raid6 = 1; 2228 2229 if (pci_get_vendor(dev) != PCI_VENDOR_ID_ARECA) { 2230 return (ENXIO); 2231 } 2232 switch(id=pci_get_devid(dev)) { 2233 case PCIDevVenIDARC1110: 2234 case PCIDevVenIDARC1210: 2235 raid6 = 0; 2236 /*FALLTHRU*/ 2237 case PCIDevVenIDARC1120: 2238 case PCIDevVenIDARC1130: 2239 case PCIDevVenIDARC1160: 2240 case PCIDevVenIDARC1170: 2241 case PCIDevVenIDARC1220: 2242 case PCIDevVenIDARC1230: 2243 case PCIDevVenIDARC1260: 2244 case PCIDevVenIDARC1270: 2245 case PCIDevVenIDARC1280: 2246 type = "SATA"; 2247 break; 2248 case PCIDevVenIDARC1380: 2249 case PCIDevVenIDARC1381: 2250 case PCIDevVenIDARC1680: 2251 case PCIDevVenIDARC1681: 2252 type = "SAS"; 2253 break; 2254 default: 2255 type = "X-TYPE"; 2256 break; 2257 } 2258 sprintf(buf, "Areca %s Host Adapter RAID Controller %s\n", type, raid6 ? "(RAID6 capable)" : ""); 2259 device_set_desc_copy(dev, buf); 2260 return 0; 2261 } 2262 /* 2263 ************************************************************************ 2264 ************************************************************************ 2265 */ 2266 static void arcmsr_shutdown(device_t dev) 2267 { 2268 u_int32_t i, poll_count=0; 2269 u_int32_t intmask_org; 2270 struct CommandControlBlock *srb; 2271 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)device_get_softc(dev); 2272 2273 /* stop adapter background rebuild */ 2274 ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock); 2275 arcmsr_stop_adapter_bgrb(acb); 2276 arcmsr_flush_adapter_cache(acb); 2277 /* disable all outbound interrupt */ 2278 intmask_org=CHIP_REG_READ32(outbound_intmask); 2279 CHIP_REG_WRITE32(outbound_intmask, (intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE)); 2280 /* abort all outstanding command */ 2281 acb->acb_flags |= ACB_F_SCSISTOPADAPTER; 2282 acb->acb_flags &= ~ACB_F_IOP_INITED; 2283 if(acb->srboutstandingcount!=0) { 2284 while((acb->srboutstandingcount!=0) && (poll_count < 256)) { 2285 arcmsr_interrupt((void *)acb); 2286 UDELAY(25000); 2287 poll_count++; 2288 } 2289 if(acb->srboutstandingcount!=0) { 2290 arcmsr_abort_allcmd(acb); 2291 /*clear all outbound posted Q*/ 2292 for(i=0;i<ARCMSR_MAX_OUTSTANDING_CMD;i++) { 2293 CHIP_REG_READ32(outbound_queueport); 2294 } 2295 for(i=0;i<ARCMSR_MAX_FREESRB_NUM;i++) { 2296 srb=acb->psrb_pool[i]; 2297 if(srb->startdone==ARCMSR_SRB_START) { 2298 srb->startdone=ARCMSR_SRB_ABORTED; 2299 srb->pccb->ccb_h.status |= CAM_REQ_ABORTED; 2300 arcmsr_srb_complete(srb, 1); 2301 } 2302 } 2303 } 2304 } 2305 atomic_set_int(&acb->srboutstandingcount, 0); 2306 acb->workingsrb_doneindex=0; 2307 acb->workingsrb_startindex=0; 2308 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock); 2309 return; 2310 } 2311 /* 2312 ************************************************************************ 2313 ************************************************************************ 2314 */ 2315 static u_int32_t arcmsr_detach(device_t dev) 2316 { 2317 struct AdapterControlBlock *acb=(struct AdapterControlBlock *)device_get_softc(dev); 2318 2319 bus_teardown_intr(dev, acb->irqres, acb->ih); 2320 arcmsr_shutdown(dev); 2321 arcmsr_free_resource(acb); 2322 bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(0), acb->sys_res_arcmsr); 2323 bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres); 2324 ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock); 2325 xpt_async(AC_LOST_DEVICE, acb->ppath, NULL); 2326 xpt_free_path(acb->ppath); 2327 xpt_bus_deregister(cam_sim_path(acb->psim)); 2328 cam_sim_free(acb->psim, TRUE); 2329 ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock); 2330 ARCMSR_LOCK_DESTROY(&acb->qbuffer_lock); 2331 return (0); 2332 } 2333 2334 2335