1 /*- 2 * Copyright (c) 2017-2020 Conrad Meyer <cem@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 16 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 17 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 18 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 19 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 20 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 22 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 23 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 24 * POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 /* 28 * Driver for the AMD Family 15h and 17h CPU System Management Network. 29 */ 30 31 #include <sys/param.h> 32 #include <sys/bus.h> 33 #include <sys/conf.h> 34 #include <sys/lock.h> 35 #include <sys/kernel.h> 36 #include <sys/module.h> 37 #include <sys/mutex.h> 38 #include <sys/sysctl.h> 39 #include <sys/systm.h> 40 41 #include <machine/cpufunc.h> 42 #include <machine/cputypes.h> 43 #include <machine/md_var.h> 44 #include <machine/specialreg.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <x86/pci_cfgreg.h> 48 49 #include <dev/amdsmn/amdsmn.h> 50 51 #define F15H_SMN_ADDR_REG 0xb8 52 #define F15H_SMN_DATA_REG 0xbc 53 #define F17H_SMN_ADDR_REG 0x60 54 #define F17H_SMN_DATA_REG 0x64 55 56 #define PCI_DEVICE_ID_AMD_15H_M60H_ROOT 0x1576 57 #define PCI_DEVICE_ID_AMD_17H_ROOT 0x1450 58 #define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0 59 #define PCI_DEVICE_ID_AMD_17H_M30H_ROOT 0x1480 /* Also M70H, F19H M00H/M20H */ 60 #define PCI_DEVICE_ID_AMD_17H_M60H_ROOT 0x1630 61 #define PCI_DEVICE_ID_AMD_19H_M60H_ROOT 0x14d8 62 63 struct pciid; 64 struct amdsmn_softc { 65 struct mtx smn_lock; 66 const struct pciid *smn_pciid; 67 }; 68 69 static const struct pciid { 70 uint16_t amdsmn_vendorid; 71 uint16_t amdsmn_deviceid; 72 uint8_t amdsmn_addr_reg; 73 uint8_t amdsmn_data_reg; 74 } amdsmn_ids[] = { 75 { 76 .amdsmn_vendorid = CPU_VENDOR_AMD, 77 .amdsmn_deviceid = PCI_DEVICE_ID_AMD_15H_M60H_ROOT, 78 .amdsmn_addr_reg = F15H_SMN_ADDR_REG, 79 .amdsmn_data_reg = F15H_SMN_DATA_REG, 80 }, 81 { 82 .amdsmn_vendorid = CPU_VENDOR_AMD, 83 .amdsmn_deviceid = PCI_DEVICE_ID_AMD_17H_ROOT, 84 .amdsmn_addr_reg = F17H_SMN_ADDR_REG, 85 .amdsmn_data_reg = F17H_SMN_DATA_REG, 86 }, 87 { 88 .amdsmn_vendorid = CPU_VENDOR_AMD, 89 .amdsmn_deviceid = PCI_DEVICE_ID_AMD_17H_M10H_ROOT, 90 .amdsmn_addr_reg = F17H_SMN_ADDR_REG, 91 .amdsmn_data_reg = F17H_SMN_DATA_REG, 92 }, 93 { 94 .amdsmn_vendorid = CPU_VENDOR_AMD, 95 .amdsmn_deviceid = PCI_DEVICE_ID_AMD_17H_M30H_ROOT, 96 .amdsmn_addr_reg = F17H_SMN_ADDR_REG, 97 .amdsmn_data_reg = F17H_SMN_DATA_REG, 98 }, 99 { 100 .amdsmn_vendorid = CPU_VENDOR_AMD, 101 .amdsmn_deviceid = PCI_DEVICE_ID_AMD_17H_M60H_ROOT, 102 .amdsmn_addr_reg = F17H_SMN_ADDR_REG, 103 .amdsmn_data_reg = F17H_SMN_DATA_REG, 104 }, 105 { 106 .amdsmn_vendorid = CPU_VENDOR_AMD, 107 .amdsmn_deviceid = PCI_DEVICE_ID_AMD_19H_M60H_ROOT, 108 .amdsmn_addr_reg = F17H_SMN_ADDR_REG, 109 .amdsmn_data_reg = F17H_SMN_DATA_REG, 110 }, 111 }; 112 113 /* 114 * Device methods. 115 */ 116 static void amdsmn_identify(driver_t *driver, device_t parent); 117 static int amdsmn_probe(device_t dev); 118 static int amdsmn_attach(device_t dev); 119 static int amdsmn_detach(device_t dev); 120 121 static device_method_t amdsmn_methods[] = { 122 /* Device interface */ 123 DEVMETHOD(device_identify, amdsmn_identify), 124 DEVMETHOD(device_probe, amdsmn_probe), 125 DEVMETHOD(device_attach, amdsmn_attach), 126 DEVMETHOD(device_detach, amdsmn_detach), 127 DEVMETHOD_END 128 }; 129 130 static driver_t amdsmn_driver = { 131 "amdsmn", 132 amdsmn_methods, 133 sizeof(struct amdsmn_softc), 134 }; 135 136 DRIVER_MODULE(amdsmn, hostb, amdsmn_driver, NULL, NULL); 137 MODULE_VERSION(amdsmn, 1); 138 MODULE_PNP_INFO("U16:vendor;U16:device", pci, amdsmn, amdsmn_ids, 139 nitems(amdsmn_ids)); 140 141 static bool 142 amdsmn_match(device_t parent, const struct pciid **pciid_out) 143 { 144 uint16_t vendor, device; 145 size_t i; 146 147 vendor = pci_get_vendor(parent); 148 device = pci_get_device(parent); 149 150 for (i = 0; i < nitems(amdsmn_ids); i++) { 151 if (vendor == amdsmn_ids[i].amdsmn_vendorid && 152 device == amdsmn_ids[i].amdsmn_deviceid) { 153 if (pciid_out != NULL) 154 *pciid_out = &amdsmn_ids[i]; 155 return (true); 156 } 157 } 158 return (false); 159 } 160 161 static void 162 amdsmn_identify(driver_t *driver, device_t parent) 163 { 164 device_t child; 165 166 /* Make sure we're not being doubly invoked. */ 167 if (device_find_child(parent, "amdsmn", -1) != NULL) 168 return; 169 if (!amdsmn_match(parent, NULL)) 170 return; 171 172 child = device_add_child(parent, "amdsmn", -1); 173 if (child == NULL) 174 device_printf(parent, "add amdsmn child failed\n"); 175 } 176 177 static int 178 amdsmn_probe(device_t dev) 179 { 180 uint32_t family; 181 char buf[64]; 182 183 if (resource_disabled("amdsmn", 0)) 184 return (ENXIO); 185 if (!amdsmn_match(device_get_parent(dev), NULL)) 186 return (ENXIO); 187 188 family = CPUID_TO_FAMILY(cpu_id); 189 190 switch (family) { 191 case 0x15: 192 case 0x17: 193 case 0x19: 194 break; 195 default: 196 return (ENXIO); 197 } 198 snprintf(buf, sizeof(buf), "AMD Family %xh System Management Network", 199 family); 200 device_set_desc_copy(dev, buf); 201 202 return (BUS_PROBE_GENERIC); 203 } 204 205 static int 206 amdsmn_attach(device_t dev) 207 { 208 struct amdsmn_softc *sc = device_get_softc(dev); 209 210 if (!amdsmn_match(device_get_parent(dev), &sc->smn_pciid)) 211 return (ENXIO); 212 213 mtx_init(&sc->smn_lock, "SMN mtx", "SMN", MTX_DEF); 214 return (0); 215 } 216 217 int 218 amdsmn_detach(device_t dev) 219 { 220 struct amdsmn_softc *sc = device_get_softc(dev); 221 222 mtx_destroy(&sc->smn_lock); 223 return (0); 224 } 225 226 int 227 amdsmn_read(device_t dev, uint32_t addr, uint32_t *value) 228 { 229 struct amdsmn_softc *sc = device_get_softc(dev); 230 device_t parent; 231 232 parent = device_get_parent(dev); 233 234 mtx_lock(&sc->smn_lock); 235 pci_write_config(parent, sc->smn_pciid->amdsmn_addr_reg, addr, 4); 236 *value = pci_read_config(parent, sc->smn_pciid->amdsmn_data_reg, 4); 237 mtx_unlock(&sc->smn_lock); 238 239 return (0); 240 } 241 242 int 243 amdsmn_write(device_t dev, uint32_t addr, uint32_t value) 244 { 245 struct amdsmn_softc *sc = device_get_softc(dev); 246 device_t parent; 247 248 parent = device_get_parent(dev); 249 250 mtx_lock(&sc->smn_lock); 251 pci_write_config(parent, sc->smn_pciid->amdsmn_addr_reg, addr, 4); 252 pci_write_config(parent, sc->smn_pciid->amdsmn_data_reg, value, 4); 253 mtx_unlock(&sc->smn_lock); 254 255 return (0); 256 } 257