1 /* 2 * DO NOT EDIT - This file is automatically generated 3 * from the following source files: 4 * 5 * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#58 $ 6 * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $ 7 */ 8 9 #include <sys/cdefs.h> 10 __FBSDID("$FreeBSD$"); 11 #include <dev/aic7xxx/aic7xxx_osm.h> 12 13 static ahc_reg_parse_entry_t SCSISEQ_parse_table[] = { 14 { "SCSIRSTO", 0x01, 0x01 }, 15 { "ENAUTOATNP", 0x02, 0x02 }, 16 { "ENAUTOATNI", 0x04, 0x04 }, 17 { "ENAUTOATNO", 0x08, 0x08 }, 18 { "ENRSELI", 0x10, 0x10 }, 19 { "ENSELI", 0x20, 0x20 }, 20 { "ENSELO", 0x40, 0x40 }, 21 { "TEMODE", 0x80, 0x80 } 22 }; 23 24 int 25 ahc_scsiseq_print(u_int regvalue, u_int *cur_col, u_int wrap) 26 { 27 return (ahc_print_register(SCSISEQ_parse_table, 8, "SCSISEQ", 28 0x00, regvalue, cur_col, wrap)); 29 } 30 31 static ahc_reg_parse_entry_t SXFRCTL0_parse_table[] = { 32 { "CLRCHN", 0x02, 0x02 }, 33 { "SCAMEN", 0x04, 0x04 }, 34 { "SPIOEN", 0x08, 0x08 }, 35 { "CLRSTCNT", 0x10, 0x10 }, 36 { "FAST20", 0x20, 0x20 }, 37 { "DFPEXP", 0x40, 0x40 }, 38 { "DFON", 0x80, 0x80 } 39 }; 40 41 int 42 ahc_sxfrctl0_print(u_int regvalue, u_int *cur_col, u_int wrap) 43 { 44 return (ahc_print_register(SXFRCTL0_parse_table, 7, "SXFRCTL0", 45 0x01, regvalue, cur_col, wrap)); 46 } 47 48 static ahc_reg_parse_entry_t SXFRCTL1_parse_table[] = { 49 { "STPWEN", 0x01, 0x01 }, 50 { "ACTNEGEN", 0x02, 0x02 }, 51 { "ENSTIMER", 0x04, 0x04 }, 52 { "ENSPCHK", 0x20, 0x20 }, 53 { "SWRAPEN", 0x40, 0x40 }, 54 { "BITBUCKET", 0x80, 0x80 }, 55 { "STIMESEL", 0x18, 0x18 } 56 }; 57 58 int 59 ahc_sxfrctl1_print(u_int regvalue, u_int *cur_col, u_int wrap) 60 { 61 return (ahc_print_register(SXFRCTL1_parse_table, 7, "SXFRCTL1", 62 0x02, regvalue, cur_col, wrap)); 63 } 64 65 static ahc_reg_parse_entry_t SCSISIGI_parse_table[] = { 66 { "ACKI", 0x01, 0x01 }, 67 { "REQI", 0x02, 0x02 }, 68 { "BSYI", 0x04, 0x04 }, 69 { "SELI", 0x08, 0x08 }, 70 { "ATNI", 0x10, 0x10 }, 71 { "MSGI", 0x20, 0x20 }, 72 { "IOI", 0x40, 0x40 }, 73 { "CDI", 0x80, 0x80 }, 74 { "P_DATAOUT", 0x00, 0x00 }, 75 { "P_DATAOUT_DT", 0x20, 0x20 }, 76 { "P_DATAIN", 0x40, 0x40 }, 77 { "P_DATAIN_DT", 0x60, 0x60 }, 78 { "P_COMMAND", 0x80, 0x80 }, 79 { "P_MESGOUT", 0xa0, 0xa0 }, 80 { "P_STATUS", 0xc0, 0xc0 }, 81 { "PHASE_MASK", 0xe0, 0xe0 }, 82 { "P_MESGIN", 0xe0, 0xe0 } 83 }; 84 85 int 86 ahc_scsisigi_print(u_int regvalue, u_int *cur_col, u_int wrap) 87 { 88 return (ahc_print_register(SCSISIGI_parse_table, 17, "SCSISIGI", 89 0x03, regvalue, cur_col, wrap)); 90 } 91 92 static ahc_reg_parse_entry_t SCSISIGO_parse_table[] = { 93 { "ACKO", 0x01, 0x01 }, 94 { "REQO", 0x02, 0x02 }, 95 { "BSYO", 0x04, 0x04 }, 96 { "SELO", 0x08, 0x08 }, 97 { "ATNO", 0x10, 0x10 }, 98 { "MSGO", 0x20, 0x20 }, 99 { "IOO", 0x40, 0x40 }, 100 { "CDO", 0x80, 0x80 }, 101 { "P_DATAOUT", 0x00, 0x00 }, 102 { "P_DATAIN", 0x40, 0x40 }, 103 { "P_COMMAND", 0x80, 0x80 }, 104 { "P_MESGOUT", 0xa0, 0xa0 }, 105 { "P_STATUS", 0xc0, 0xc0 }, 106 { "PHASE_MASK", 0xe0, 0xe0 }, 107 { "P_MESGIN", 0xe0, 0xe0 } 108 }; 109 110 int 111 ahc_scsisigo_print(u_int regvalue, u_int *cur_col, u_int wrap) 112 { 113 return (ahc_print_register(SCSISIGO_parse_table, 15, "SCSISIGO", 114 0x03, regvalue, cur_col, wrap)); 115 } 116 117 static ahc_reg_parse_entry_t SCSIRATE_parse_table[] = { 118 { "SINGLE_EDGE", 0x10, 0x10 }, 119 { "ENABLE_CRC", 0x40, 0x40 }, 120 { "WIDEXFER", 0x80, 0x80 }, 121 { "SXFR_ULTRA2", 0x0f, 0x0f }, 122 { "SOFS", 0x0f, 0x0f }, 123 { "SXFR", 0x70, 0x70 } 124 }; 125 126 int 127 ahc_scsirate_print(u_int regvalue, u_int *cur_col, u_int wrap) 128 { 129 return (ahc_print_register(SCSIRATE_parse_table, 6, "SCSIRATE", 130 0x04, regvalue, cur_col, wrap)); 131 } 132 133 static ahc_reg_parse_entry_t SCSIID_parse_table[] = { 134 { "TWIN_CHNLB", 0x80, 0x80 }, 135 { "OID", 0x0f, 0x0f }, 136 { "TWIN_TID", 0x70, 0x70 }, 137 { "SOFS_ULTRA2", 0x7f, 0x7f }, 138 { "TID", 0xf0, 0xf0 } 139 }; 140 141 int 142 ahc_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap) 143 { 144 return (ahc_print_register(SCSIID_parse_table, 5, "SCSIID", 145 0x05, regvalue, cur_col, wrap)); 146 } 147 148 int 149 ahc_scsidatl_print(u_int regvalue, u_int *cur_col, u_int wrap) 150 { 151 return (ahc_print_register(NULL, 0, "SCSIDATL", 152 0x06, regvalue, cur_col, wrap)); 153 } 154 155 int 156 ahc_scsidath_print(u_int regvalue, u_int *cur_col, u_int wrap) 157 { 158 return (ahc_print_register(NULL, 0, "SCSIDATH", 159 0x07, regvalue, cur_col, wrap)); 160 } 161 162 static ahc_reg_parse_entry_t OPTIONMODE_parse_table[] = { 163 { "DIS_MSGIN_DUALEDGE", 0x01, 0x01 }, 164 { "AUTO_MSGOUT_DE", 0x02, 0x02 }, 165 { "SCSIDATL_IMGEN", 0x04, 0x04 }, 166 { "EXPPHASEDIS", 0x08, 0x08 }, 167 { "BUSFREEREV", 0x10, 0x10 }, 168 { "ATNMGMNTEN", 0x20, 0x20 }, 169 { "AUTOACKEN", 0x40, 0x40 }, 170 { "AUTORATEEN", 0x80, 0x80 }, 171 { "OPTIONMODE_DEFAULTS",0x03, 0x03 } 172 }; 173 174 int 175 ahc_optionmode_print(u_int regvalue, u_int *cur_col, u_int wrap) 176 { 177 return (ahc_print_register(OPTIONMODE_parse_table, 9, "OPTIONMODE", 178 0x08, regvalue, cur_col, wrap)); 179 } 180 181 int 182 ahc_stcnt_print(u_int regvalue, u_int *cur_col, u_int wrap) 183 { 184 return (ahc_print_register(NULL, 0, "STCNT", 185 0x08, regvalue, cur_col, wrap)); 186 } 187 188 int 189 ahc_targcrccnt_print(u_int regvalue, u_int *cur_col, u_int wrap) 190 { 191 return (ahc_print_register(NULL, 0, "TARGCRCCNT", 192 0x0a, regvalue, cur_col, wrap)); 193 } 194 195 static ahc_reg_parse_entry_t CLRSINT0_parse_table[] = { 196 { "CLRSPIORDY", 0x02, 0x02 }, 197 { "CLRSWRAP", 0x08, 0x08 }, 198 { "CLRIOERR", 0x08, 0x08 }, 199 { "CLRSELINGO", 0x10, 0x10 }, 200 { "CLRSELDI", 0x20, 0x20 }, 201 { "CLRSELDO", 0x40, 0x40 } 202 }; 203 204 int 205 ahc_clrsint0_print(u_int regvalue, u_int *cur_col, u_int wrap) 206 { 207 return (ahc_print_register(CLRSINT0_parse_table, 6, "CLRSINT0", 208 0x0b, regvalue, cur_col, wrap)); 209 } 210 211 static ahc_reg_parse_entry_t SSTAT0_parse_table[] = { 212 { "DMADONE", 0x01, 0x01 }, 213 { "SPIORDY", 0x02, 0x02 }, 214 { "SDONE", 0x04, 0x04 }, 215 { "SWRAP", 0x08, 0x08 }, 216 { "IOERR", 0x08, 0x08 }, 217 { "SELINGO", 0x10, 0x10 }, 218 { "SELDI", 0x20, 0x20 }, 219 { "SELDO", 0x40, 0x40 }, 220 { "TARGET", 0x80, 0x80 } 221 }; 222 223 int 224 ahc_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap) 225 { 226 return (ahc_print_register(SSTAT0_parse_table, 9, "SSTAT0", 227 0x0b, regvalue, cur_col, wrap)); 228 } 229 230 static ahc_reg_parse_entry_t CLRSINT1_parse_table[] = { 231 { "CLRREQINIT", 0x01, 0x01 }, 232 { "CLRPHASECHG", 0x02, 0x02 }, 233 { "CLRSCSIPERR", 0x04, 0x04 }, 234 { "CLRBUSFREE", 0x08, 0x08 }, 235 { "CLRSCSIRSTI", 0x20, 0x20 }, 236 { "CLRATNO", 0x40, 0x40 }, 237 { "CLRSELTIMEO", 0x80, 0x80 } 238 }; 239 240 int 241 ahc_clrsint1_print(u_int regvalue, u_int *cur_col, u_int wrap) 242 { 243 return (ahc_print_register(CLRSINT1_parse_table, 7, "CLRSINT1", 244 0x0c, regvalue, cur_col, wrap)); 245 } 246 247 static ahc_reg_parse_entry_t SSTAT1_parse_table[] = { 248 { "REQINIT", 0x01, 0x01 }, 249 { "PHASECHG", 0x02, 0x02 }, 250 { "SCSIPERR", 0x04, 0x04 }, 251 { "BUSFREE", 0x08, 0x08 }, 252 { "PHASEMIS", 0x10, 0x10 }, 253 { "SCSIRSTI", 0x20, 0x20 }, 254 { "ATNTARG", 0x40, 0x40 }, 255 { "SELTO", 0x80, 0x80 } 256 }; 257 258 int 259 ahc_sstat1_print(u_int regvalue, u_int *cur_col, u_int wrap) 260 { 261 return (ahc_print_register(SSTAT1_parse_table, 8, "SSTAT1", 262 0x0c, regvalue, cur_col, wrap)); 263 } 264 265 static ahc_reg_parse_entry_t SSTAT2_parse_table[] = { 266 { "DUAL_EDGE_ERR", 0x01, 0x01 }, 267 { "CRCREQERR", 0x02, 0x02 }, 268 { "CRCENDERR", 0x04, 0x04 }, 269 { "CRCVALERR", 0x08, 0x08 }, 270 { "EXP_ACTIVE", 0x10, 0x10 }, 271 { "SHVALID", 0x40, 0x40 }, 272 { "OVERRUN", 0x80, 0x80 }, 273 { "SFCNT", 0x1f, 0x1f } 274 }; 275 276 int 277 ahc_sstat2_print(u_int regvalue, u_int *cur_col, u_int wrap) 278 { 279 return (ahc_print_register(SSTAT2_parse_table, 8, "SSTAT2", 280 0x0d, regvalue, cur_col, wrap)); 281 } 282 283 static ahc_reg_parse_entry_t SSTAT3_parse_table[] = { 284 { "OFFCNT", 0x0f, 0x0f }, 285 { "U2OFFCNT", 0x7f, 0x7f }, 286 { "SCSICNT", 0xf0, 0xf0 } 287 }; 288 289 int 290 ahc_sstat3_print(u_int regvalue, u_int *cur_col, u_int wrap) 291 { 292 return (ahc_print_register(SSTAT3_parse_table, 3, "SSTAT3", 293 0x0e, regvalue, cur_col, wrap)); 294 } 295 296 static ahc_reg_parse_entry_t SCSIID_ULTRA2_parse_table[] = { 297 { "OID", 0x0f, 0x0f }, 298 { "TID", 0xf0, 0xf0 } 299 }; 300 301 int 302 ahc_scsiid_ultra2_print(u_int regvalue, u_int *cur_col, u_int wrap) 303 { 304 return (ahc_print_register(SCSIID_ULTRA2_parse_table, 2, "SCSIID_ULTRA2", 305 0x0f, regvalue, cur_col, wrap)); 306 } 307 308 static ahc_reg_parse_entry_t SIMODE0_parse_table[] = { 309 { "ENDMADONE", 0x01, 0x01 }, 310 { "ENSPIORDY", 0x02, 0x02 }, 311 { "ENSDONE", 0x04, 0x04 }, 312 { "ENSWRAP", 0x08, 0x08 }, 313 { "ENIOERR", 0x08, 0x08 }, 314 { "ENSELINGO", 0x10, 0x10 }, 315 { "ENSELDI", 0x20, 0x20 }, 316 { "ENSELDO", 0x40, 0x40 } 317 }; 318 319 int 320 ahc_simode0_print(u_int regvalue, u_int *cur_col, u_int wrap) 321 { 322 return (ahc_print_register(SIMODE0_parse_table, 8, "SIMODE0", 323 0x10, regvalue, cur_col, wrap)); 324 } 325 326 static ahc_reg_parse_entry_t SIMODE1_parse_table[] = { 327 { "ENREQINIT", 0x01, 0x01 }, 328 { "ENPHASECHG", 0x02, 0x02 }, 329 { "ENSCSIPERR", 0x04, 0x04 }, 330 { "ENBUSFREE", 0x08, 0x08 }, 331 { "ENPHASEMIS", 0x10, 0x10 }, 332 { "ENSCSIRST", 0x20, 0x20 }, 333 { "ENATNTARG", 0x40, 0x40 }, 334 { "ENSELTIMO", 0x80, 0x80 } 335 }; 336 337 int 338 ahc_simode1_print(u_int regvalue, u_int *cur_col, u_int wrap) 339 { 340 return (ahc_print_register(SIMODE1_parse_table, 8, "SIMODE1", 341 0x11, regvalue, cur_col, wrap)); 342 } 343 344 int 345 ahc_scsibusl_print(u_int regvalue, u_int *cur_col, u_int wrap) 346 { 347 return (ahc_print_register(NULL, 0, "SCSIBUSL", 348 0x12, regvalue, cur_col, wrap)); 349 } 350 351 static ahc_reg_parse_entry_t SXFRCTL2_parse_table[] = { 352 { "CMDDMAEN", 0x08, 0x08 }, 353 { "AUTORSTDIS", 0x10, 0x10 }, 354 { "ASYNC_SETUP", 0x07, 0x07 } 355 }; 356 357 int 358 ahc_sxfrctl2_print(u_int regvalue, u_int *cur_col, u_int wrap) 359 { 360 return (ahc_print_register(SXFRCTL2_parse_table, 3, "SXFRCTL2", 361 0x13, regvalue, cur_col, wrap)); 362 } 363 364 int 365 ahc_scsibush_print(u_int regvalue, u_int *cur_col, u_int wrap) 366 { 367 return (ahc_print_register(NULL, 0, "SCSIBUSH", 368 0x13, regvalue, cur_col, wrap)); 369 } 370 371 int 372 ahc_shaddr_print(u_int regvalue, u_int *cur_col, u_int wrap) 373 { 374 return (ahc_print_register(NULL, 0, "SHADDR", 375 0x14, regvalue, cur_col, wrap)); 376 } 377 378 static ahc_reg_parse_entry_t SELTIMER_parse_table[] = { 379 { "STAGE1", 0x01, 0x01 }, 380 { "STAGE2", 0x02, 0x02 }, 381 { "STAGE3", 0x04, 0x04 }, 382 { "STAGE4", 0x08, 0x08 }, 383 { "STAGE5", 0x10, 0x10 }, 384 { "STAGE6", 0x20, 0x20 } 385 }; 386 387 int 388 ahc_seltimer_print(u_int regvalue, u_int *cur_col, u_int wrap) 389 { 390 return (ahc_print_register(SELTIMER_parse_table, 6, "SELTIMER", 391 0x18, regvalue, cur_col, wrap)); 392 } 393 394 static ahc_reg_parse_entry_t SELID_parse_table[] = { 395 { "ONEBIT", 0x08, 0x08 }, 396 { "SELID_MASK", 0xf0, 0xf0 } 397 }; 398 399 int 400 ahc_selid_print(u_int regvalue, u_int *cur_col, u_int wrap) 401 { 402 return (ahc_print_register(SELID_parse_table, 2, "SELID", 403 0x19, regvalue, cur_col, wrap)); 404 } 405 406 static ahc_reg_parse_entry_t SCAMCTL_parse_table[] = { 407 { "DFLTTID", 0x10, 0x10 }, 408 { "ALTSTIM", 0x20, 0x20 }, 409 { "CLRSCAMSELID", 0x40, 0x40 }, 410 { "ENSCAMSELO", 0x80, 0x80 }, 411 { "SCAMLVL", 0x03, 0x03 } 412 }; 413 414 int 415 ahc_scamctl_print(u_int regvalue, u_int *cur_col, u_int wrap) 416 { 417 return (ahc_print_register(SCAMCTL_parse_table, 5, "SCAMCTL", 418 0x1a, regvalue, cur_col, wrap)); 419 } 420 421 int 422 ahc_targid_print(u_int regvalue, u_int *cur_col, u_int wrap) 423 { 424 return (ahc_print_register(NULL, 0, "TARGID", 425 0x1b, regvalue, cur_col, wrap)); 426 } 427 428 static ahc_reg_parse_entry_t SPIOCAP_parse_table[] = { 429 { "SSPIOCPS", 0x01, 0x01 }, 430 { "ROM", 0x02, 0x02 }, 431 { "EEPROM", 0x04, 0x04 }, 432 { "SEEPROM", 0x08, 0x08 }, 433 { "EXT_BRDCTL", 0x10, 0x10 }, 434 { "SOFTCMDEN", 0x20, 0x20 }, 435 { "SOFT0", 0x40, 0x40 }, 436 { "SOFT1", 0x80, 0x80 } 437 }; 438 439 int 440 ahc_spiocap_print(u_int regvalue, u_int *cur_col, u_int wrap) 441 { 442 return (ahc_print_register(SPIOCAP_parse_table, 8, "SPIOCAP", 443 0x1b, regvalue, cur_col, wrap)); 444 } 445 446 static ahc_reg_parse_entry_t BRDCTL_parse_table[] = { 447 { "BRDCTL0", 0x01, 0x01 }, 448 { "BRDSTB_ULTRA2", 0x01, 0x01 }, 449 { "BRDCTL1", 0x02, 0x02 }, 450 { "BRDRW_ULTRA2", 0x02, 0x02 }, 451 { "BRDRW", 0x04, 0x04 }, 452 { "BRDDAT2", 0x04, 0x04 }, 453 { "BRDCS", 0x08, 0x08 }, 454 { "BRDDAT3", 0x08, 0x08 }, 455 { "BRDSTB", 0x10, 0x10 }, 456 { "BRDDAT4", 0x10, 0x10 }, 457 { "BRDDAT5", 0x20, 0x20 }, 458 { "BRDDAT6", 0x40, 0x40 }, 459 { "BRDDAT7", 0x80, 0x80 } 460 }; 461 462 int 463 ahc_brdctl_print(u_int regvalue, u_int *cur_col, u_int wrap) 464 { 465 return (ahc_print_register(BRDCTL_parse_table, 13, "BRDCTL", 466 0x1d, regvalue, cur_col, wrap)); 467 } 468 469 static ahc_reg_parse_entry_t SEECTL_parse_table[] = { 470 { "SEEDI", 0x01, 0x01 }, 471 { "SEEDO", 0x02, 0x02 }, 472 { "SEECK", 0x04, 0x04 }, 473 { "SEECS", 0x08, 0x08 }, 474 { "SEERDY", 0x10, 0x10 }, 475 { "SEEMS", 0x20, 0x20 }, 476 { "EXTARBREQ", 0x40, 0x40 }, 477 { "EXTARBACK", 0x80, 0x80 } 478 }; 479 480 int 481 ahc_seectl_print(u_int regvalue, u_int *cur_col, u_int wrap) 482 { 483 return (ahc_print_register(SEECTL_parse_table, 8, "SEECTL", 484 0x1e, regvalue, cur_col, wrap)); 485 } 486 487 static ahc_reg_parse_entry_t SBLKCTL_parse_table[] = { 488 { "XCVR", 0x01, 0x01 }, 489 { "SELWIDE", 0x02, 0x02 }, 490 { "ENAB20", 0x04, 0x04 }, 491 { "SELBUSB", 0x08, 0x08 }, 492 { "ENAB40", 0x08, 0x08 }, 493 { "AUTOFLUSHDIS", 0x20, 0x20 }, 494 { "DIAGLEDON", 0x40, 0x40 }, 495 { "DIAGLEDEN", 0x80, 0x80 } 496 }; 497 498 int 499 ahc_sblkctl_print(u_int regvalue, u_int *cur_col, u_int wrap) 500 { 501 return (ahc_print_register(SBLKCTL_parse_table, 8, "SBLKCTL", 502 0x1f, regvalue, cur_col, wrap)); 503 } 504 505 int 506 ahc_busy_targets_print(u_int regvalue, u_int *cur_col, u_int wrap) 507 { 508 return (ahc_print_register(NULL, 0, "BUSY_TARGETS", 509 0x20, regvalue, cur_col, wrap)); 510 } 511 512 int 513 ahc_ultra_enb_print(u_int regvalue, u_int *cur_col, u_int wrap) 514 { 515 return (ahc_print_register(NULL, 0, "ULTRA_ENB", 516 0x30, regvalue, cur_col, wrap)); 517 } 518 519 int 520 ahc_disc_dsb_print(u_int regvalue, u_int *cur_col, u_int wrap) 521 { 522 return (ahc_print_register(NULL, 0, "DISC_DSB", 523 0x32, regvalue, cur_col, wrap)); 524 } 525 526 int 527 ahc_cmdsize_table_tail_print(u_int regvalue, u_int *cur_col, u_int wrap) 528 { 529 return (ahc_print_register(NULL, 0, "CMDSIZE_TABLE_TAIL", 530 0x34, regvalue, cur_col, wrap)); 531 } 532 533 int 534 ahc_mwi_residual_print(u_int regvalue, u_int *cur_col, u_int wrap) 535 { 536 return (ahc_print_register(NULL, 0, "MWI_RESIDUAL", 537 0x38, regvalue, cur_col, wrap)); 538 } 539 540 int 541 ahc_next_queued_scb_print(u_int regvalue, u_int *cur_col, u_int wrap) 542 { 543 return (ahc_print_register(NULL, 0, "NEXT_QUEUED_SCB", 544 0x39, regvalue, cur_col, wrap)); 545 } 546 547 int 548 ahc_msg_out_print(u_int regvalue, u_int *cur_col, u_int wrap) 549 { 550 return (ahc_print_register(NULL, 0, "MSG_OUT", 551 0x3a, regvalue, cur_col, wrap)); 552 } 553 554 static ahc_reg_parse_entry_t DMAPARAMS_parse_table[] = { 555 { "FIFORESET", 0x01, 0x01 }, 556 { "FIFOFLUSH", 0x02, 0x02 }, 557 { "DIRECTION", 0x04, 0x04 }, 558 { "HDMAEN", 0x08, 0x08 }, 559 { "HDMAENACK", 0x08, 0x08 }, 560 { "SDMAEN", 0x10, 0x10 }, 561 { "SDMAENACK", 0x10, 0x10 }, 562 { "SCSIEN", 0x20, 0x20 }, 563 { "WIDEODD", 0x40, 0x40 }, 564 { "PRELOADEN", 0x80, 0x80 } 565 }; 566 567 int 568 ahc_dmaparams_print(u_int regvalue, u_int *cur_col, u_int wrap) 569 { 570 return (ahc_print_register(DMAPARAMS_parse_table, 10, "DMAPARAMS", 571 0x3b, regvalue, cur_col, wrap)); 572 } 573 574 static ahc_reg_parse_entry_t SEQ_FLAGS_parse_table[] = { 575 { "NO_DISCONNECT", 0x01, 0x01 }, 576 { "SPHASE_PENDING", 0x02, 0x02 }, 577 { "DPHASE_PENDING", 0x04, 0x04 }, 578 { "CMDPHASE_PENDING", 0x08, 0x08 }, 579 { "TARG_CMD_PENDING", 0x10, 0x10 }, 580 { "DPHASE", 0x20, 0x20 }, 581 { "NO_CDB_SENT", 0x40, 0x40 }, 582 { "TARGET_CMD_IS_TAGGED",0x40, 0x40 }, 583 { "NOT_IDENTIFIED", 0x80, 0x80 } 584 }; 585 586 int 587 ahc_seq_flags_print(u_int regvalue, u_int *cur_col, u_int wrap) 588 { 589 return (ahc_print_register(SEQ_FLAGS_parse_table, 9, "SEQ_FLAGS", 590 0x3c, regvalue, cur_col, wrap)); 591 } 592 593 int 594 ahc_saved_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap) 595 { 596 return (ahc_print_register(NULL, 0, "SAVED_SCSIID", 597 0x3d, regvalue, cur_col, wrap)); 598 } 599 600 int 601 ahc_saved_lun_print(u_int regvalue, u_int *cur_col, u_int wrap) 602 { 603 return (ahc_print_register(NULL, 0, "SAVED_LUN", 604 0x3e, regvalue, cur_col, wrap)); 605 } 606 607 static ahc_reg_parse_entry_t LASTPHASE_parse_table[] = { 608 { "MSGI", 0x20, 0x20 }, 609 { "IOI", 0x40, 0x40 }, 610 { "CDI", 0x80, 0x80 }, 611 { "P_DATAOUT", 0x00, 0x00 }, 612 { "P_BUSFREE", 0x01, 0x01 }, 613 { "P_DATAIN", 0x40, 0x40 }, 614 { "P_COMMAND", 0x80, 0x80 }, 615 { "P_MESGOUT", 0xa0, 0xa0 }, 616 { "P_STATUS", 0xc0, 0xc0 }, 617 { "PHASE_MASK", 0xe0, 0xe0 }, 618 { "P_MESGIN", 0xe0, 0xe0 } 619 }; 620 621 int 622 ahc_lastphase_print(u_int regvalue, u_int *cur_col, u_int wrap) 623 { 624 return (ahc_print_register(LASTPHASE_parse_table, 11, "LASTPHASE", 625 0x3f, regvalue, cur_col, wrap)); 626 } 627 628 int 629 ahc_waiting_scbh_print(u_int regvalue, u_int *cur_col, u_int wrap) 630 { 631 return (ahc_print_register(NULL, 0, "WAITING_SCBH", 632 0x40, regvalue, cur_col, wrap)); 633 } 634 635 int 636 ahc_disconnected_scbh_print(u_int regvalue, u_int *cur_col, u_int wrap) 637 { 638 return (ahc_print_register(NULL, 0, "DISCONNECTED_SCBH", 639 0x41, regvalue, cur_col, wrap)); 640 } 641 642 int 643 ahc_free_scbh_print(u_int regvalue, u_int *cur_col, u_int wrap) 644 { 645 return (ahc_print_register(NULL, 0, "FREE_SCBH", 646 0x42, regvalue, cur_col, wrap)); 647 } 648 649 int 650 ahc_complete_scbh_print(u_int regvalue, u_int *cur_col, u_int wrap) 651 { 652 return (ahc_print_register(NULL, 0, "COMPLETE_SCBH", 653 0x43, regvalue, cur_col, wrap)); 654 } 655 656 int 657 ahc_hscb_addr_print(u_int regvalue, u_int *cur_col, u_int wrap) 658 { 659 return (ahc_print_register(NULL, 0, "HSCB_ADDR", 660 0x44, regvalue, cur_col, wrap)); 661 } 662 663 int 664 ahc_shared_data_addr_print(u_int regvalue, u_int *cur_col, u_int wrap) 665 { 666 return (ahc_print_register(NULL, 0, "SHARED_DATA_ADDR", 667 0x48, regvalue, cur_col, wrap)); 668 } 669 670 int 671 ahc_kernel_qinpos_print(u_int regvalue, u_int *cur_col, u_int wrap) 672 { 673 return (ahc_print_register(NULL, 0, "KERNEL_QINPOS", 674 0x4c, regvalue, cur_col, wrap)); 675 } 676 677 int 678 ahc_qinpos_print(u_int regvalue, u_int *cur_col, u_int wrap) 679 { 680 return (ahc_print_register(NULL, 0, "QINPOS", 681 0x4d, regvalue, cur_col, wrap)); 682 } 683 684 int 685 ahc_qoutpos_print(u_int regvalue, u_int *cur_col, u_int wrap) 686 { 687 return (ahc_print_register(NULL, 0, "QOUTPOS", 688 0x4e, regvalue, cur_col, wrap)); 689 } 690 691 int 692 ahc_kernel_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap) 693 { 694 return (ahc_print_register(NULL, 0, "KERNEL_TQINPOS", 695 0x4f, regvalue, cur_col, wrap)); 696 } 697 698 int 699 ahc_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap) 700 { 701 return (ahc_print_register(NULL, 0, "TQINPOS", 702 0x50, regvalue, cur_col, wrap)); 703 } 704 705 static ahc_reg_parse_entry_t ARG_1_parse_table[] = { 706 { "SPARE", 0x01, 0x01 }, 707 { "CONT_TARG_SESSION", 0x02, 0x02 }, 708 { "CONT_MSG_LOOP", 0x04, 0x04 }, 709 { "EXIT_MSG_LOOP", 0x08, 0x08 }, 710 { "MSGOUT_PHASEMIS", 0x10, 0x10 }, 711 { "SEND_REJ", 0x20, 0x20 }, 712 { "SEND_SENSE", 0x40, 0x40 }, 713 { "SEND_MSG", 0x80, 0x80 } 714 }; 715 716 int 717 ahc_arg_1_print(u_int regvalue, u_int *cur_col, u_int wrap) 718 { 719 return (ahc_print_register(ARG_1_parse_table, 8, "ARG_1", 720 0x51, regvalue, cur_col, wrap)); 721 } 722 723 int 724 ahc_arg_2_print(u_int regvalue, u_int *cur_col, u_int wrap) 725 { 726 return (ahc_print_register(NULL, 0, "ARG_2", 727 0x52, regvalue, cur_col, wrap)); 728 } 729 730 int 731 ahc_last_msg_print(u_int regvalue, u_int *cur_col, u_int wrap) 732 { 733 return (ahc_print_register(NULL, 0, "LAST_MSG", 734 0x53, regvalue, cur_col, wrap)); 735 } 736 737 static ahc_reg_parse_entry_t SCSISEQ_TEMPLATE_parse_table[] = { 738 { "ENAUTOATNP", 0x02, 0x02 }, 739 { "ENAUTOATNI", 0x04, 0x04 }, 740 { "ENAUTOATNO", 0x08, 0x08 }, 741 { "ENRSELI", 0x10, 0x10 }, 742 { "ENSELI", 0x20, 0x20 }, 743 { "ENSELO", 0x40, 0x40 } 744 }; 745 746 int 747 ahc_scsiseq_template_print(u_int regvalue, u_int *cur_col, u_int wrap) 748 { 749 return (ahc_print_register(SCSISEQ_TEMPLATE_parse_table, 6, "SCSISEQ_TEMPLATE", 750 0x54, regvalue, cur_col, wrap)); 751 } 752 753 static ahc_reg_parse_entry_t HA_274_BIOSGLOBAL_parse_table[] = { 754 { "HA_274_EXTENDED_TRANS",0x01, 0x01 } 755 }; 756 757 int 758 ahc_ha_274_biosglobal_print(u_int regvalue, u_int *cur_col, u_int wrap) 759 { 760 return (ahc_print_register(HA_274_BIOSGLOBAL_parse_table, 1, "HA_274_BIOSGLOBAL", 761 0x56, regvalue, cur_col, wrap)); 762 } 763 764 static ahc_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = { 765 { "SCB_DMA", 0x01, 0x01 }, 766 { "TARGET_MSG_PENDING", 0x02, 0x02 } 767 }; 768 769 int 770 ahc_seq_flags2_print(u_int regvalue, u_int *cur_col, u_int wrap) 771 { 772 return (ahc_print_register(SEQ_FLAGS2_parse_table, 2, "SEQ_FLAGS2", 773 0x57, regvalue, cur_col, wrap)); 774 } 775 776 static ahc_reg_parse_entry_t SCSICONF_parse_table[] = { 777 { "ENSPCHK", 0x20, 0x20 }, 778 { "RESET_SCSI", 0x40, 0x40 }, 779 { "TERM_ENB", 0x80, 0x80 }, 780 { "HSCSIID", 0x07, 0x07 }, 781 { "HWSCSIID", 0x0f, 0x0f } 782 }; 783 784 int 785 ahc_scsiconf_print(u_int regvalue, u_int *cur_col, u_int wrap) 786 { 787 return (ahc_print_register(SCSICONF_parse_table, 5, "SCSICONF", 788 0x5a, regvalue, cur_col, wrap)); 789 } 790 791 static ahc_reg_parse_entry_t INTDEF_parse_table[] = { 792 { "EDGE_TRIG", 0x80, 0x80 }, 793 { "VECTOR", 0x0f, 0x0f } 794 }; 795 796 int 797 ahc_intdef_print(u_int regvalue, u_int *cur_col, u_int wrap) 798 { 799 return (ahc_print_register(INTDEF_parse_table, 2, "INTDEF", 800 0x5c, regvalue, cur_col, wrap)); 801 } 802 803 int 804 ahc_hostconf_print(u_int regvalue, u_int *cur_col, u_int wrap) 805 { 806 return (ahc_print_register(NULL, 0, "HOSTCONF", 807 0x5d, regvalue, cur_col, wrap)); 808 } 809 810 static ahc_reg_parse_entry_t HA_274_BIOSCTRL_parse_table[] = { 811 { "CHANNEL_B_PRIMARY", 0x08, 0x08 }, 812 { "BIOSMODE", 0x30, 0x30 }, 813 { "BIOSDISABLED", 0x30, 0x30 } 814 }; 815 816 int 817 ahc_ha_274_biosctrl_print(u_int regvalue, u_int *cur_col, u_int wrap) 818 { 819 return (ahc_print_register(HA_274_BIOSCTRL_parse_table, 3, "HA_274_BIOSCTRL", 820 0x5f, regvalue, cur_col, wrap)); 821 } 822 823 static ahc_reg_parse_entry_t SEQCTL_parse_table[] = { 824 { "LOADRAM", 0x01, 0x01 }, 825 { "SEQRESET", 0x02, 0x02 }, 826 { "STEP", 0x04, 0x04 }, 827 { "BRKADRINTEN", 0x08, 0x08 }, 828 { "FASTMODE", 0x10, 0x10 }, 829 { "FAILDIS", 0x20, 0x20 }, 830 { "PAUSEDIS", 0x40, 0x40 }, 831 { "PERRORDIS", 0x80, 0x80 } 832 }; 833 834 int 835 ahc_seqctl_print(u_int regvalue, u_int *cur_col, u_int wrap) 836 { 837 return (ahc_print_register(SEQCTL_parse_table, 8, "SEQCTL", 838 0x60, regvalue, cur_col, wrap)); 839 } 840 841 int 842 ahc_seqram_print(u_int regvalue, u_int *cur_col, u_int wrap) 843 { 844 return (ahc_print_register(NULL, 0, "SEQRAM", 845 0x61, regvalue, cur_col, wrap)); 846 } 847 848 int 849 ahc_seqaddr0_print(u_int regvalue, u_int *cur_col, u_int wrap) 850 { 851 return (ahc_print_register(NULL, 0, "SEQADDR0", 852 0x62, regvalue, cur_col, wrap)); 853 } 854 855 static ahc_reg_parse_entry_t SEQADDR1_parse_table[] = { 856 { "SEQADDR1_MASK", 0x01, 0x01 } 857 }; 858 859 int 860 ahc_seqaddr1_print(u_int regvalue, u_int *cur_col, u_int wrap) 861 { 862 return (ahc_print_register(SEQADDR1_parse_table, 1, "SEQADDR1", 863 0x63, regvalue, cur_col, wrap)); 864 } 865 866 int 867 ahc_accum_print(u_int regvalue, u_int *cur_col, u_int wrap) 868 { 869 return (ahc_print_register(NULL, 0, "ACCUM", 870 0x64, regvalue, cur_col, wrap)); 871 } 872 873 int 874 ahc_sindex_print(u_int regvalue, u_int *cur_col, u_int wrap) 875 { 876 return (ahc_print_register(NULL, 0, "SINDEX", 877 0x65, regvalue, cur_col, wrap)); 878 } 879 880 int 881 ahc_dindex_print(u_int regvalue, u_int *cur_col, u_int wrap) 882 { 883 return (ahc_print_register(NULL, 0, "DINDEX", 884 0x66, regvalue, cur_col, wrap)); 885 } 886 887 int 888 ahc_allones_print(u_int regvalue, u_int *cur_col, u_int wrap) 889 { 890 return (ahc_print_register(NULL, 0, "ALLONES", 891 0x69, regvalue, cur_col, wrap)); 892 } 893 894 int 895 ahc_none_print(u_int regvalue, u_int *cur_col, u_int wrap) 896 { 897 return (ahc_print_register(NULL, 0, "NONE", 898 0x6a, regvalue, cur_col, wrap)); 899 } 900 901 int 902 ahc_allzeros_print(u_int regvalue, u_int *cur_col, u_int wrap) 903 { 904 return (ahc_print_register(NULL, 0, "ALLZEROS", 905 0x6a, regvalue, cur_col, wrap)); 906 } 907 908 static ahc_reg_parse_entry_t FLAGS_parse_table[] = { 909 { "CARRY", 0x01, 0x01 }, 910 { "ZERO", 0x02, 0x02 } 911 }; 912 913 int 914 ahc_flags_print(u_int regvalue, u_int *cur_col, u_int wrap) 915 { 916 return (ahc_print_register(FLAGS_parse_table, 2, "FLAGS", 917 0x6b, regvalue, cur_col, wrap)); 918 } 919 920 int 921 ahc_sindir_print(u_int regvalue, u_int *cur_col, u_int wrap) 922 { 923 return (ahc_print_register(NULL, 0, "SINDIR", 924 0x6c, regvalue, cur_col, wrap)); 925 } 926 927 int 928 ahc_dindir_print(u_int regvalue, u_int *cur_col, u_int wrap) 929 { 930 return (ahc_print_register(NULL, 0, "DINDIR", 931 0x6d, regvalue, cur_col, wrap)); 932 } 933 934 int 935 ahc_function1_print(u_int regvalue, u_int *cur_col, u_int wrap) 936 { 937 return (ahc_print_register(NULL, 0, "FUNCTION1", 938 0x6e, regvalue, cur_col, wrap)); 939 } 940 941 int 942 ahc_stack_print(u_int regvalue, u_int *cur_col, u_int wrap) 943 { 944 return (ahc_print_register(NULL, 0, "STACK", 945 0x6f, regvalue, cur_col, wrap)); 946 } 947 948 int 949 ahc_targ_offset_print(u_int regvalue, u_int *cur_col, u_int wrap) 950 { 951 return (ahc_print_register(NULL, 0, "TARG_OFFSET", 952 0x70, regvalue, cur_col, wrap)); 953 } 954 955 int 956 ahc_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap) 957 { 958 return (ahc_print_register(NULL, 0, "SRAM_BASE", 959 0x70, regvalue, cur_col, wrap)); 960 } 961 962 static ahc_reg_parse_entry_t DSCOMMAND0_parse_table[] = { 963 { "CIOPARCKEN", 0x01, 0x01 }, 964 { "USCBSIZE32", 0x02, 0x02 }, 965 { "RAMPS", 0x04, 0x04 }, 966 { "INTSCBRAMSEL", 0x08, 0x08 }, 967 { "EXTREQLCK", 0x10, 0x10 }, 968 { "MPARCKEN", 0x20, 0x20 }, 969 { "DPARCKEN", 0x40, 0x40 }, 970 { "CACHETHEN", 0x80, 0x80 } 971 }; 972 973 int 974 ahc_dscommand0_print(u_int regvalue, u_int *cur_col, u_int wrap) 975 { 976 return (ahc_print_register(DSCOMMAND0_parse_table, 8, "DSCOMMAND0", 977 0x84, regvalue, cur_col, wrap)); 978 } 979 980 static ahc_reg_parse_entry_t BCTL_parse_table[] = { 981 { "ENABLE", 0x01, 0x01 }, 982 { "ACE", 0x08, 0x08 } 983 }; 984 985 int 986 ahc_bctl_print(u_int regvalue, u_int *cur_col, u_int wrap) 987 { 988 return (ahc_print_register(BCTL_parse_table, 2, "BCTL", 989 0x84, regvalue, cur_col, wrap)); 990 } 991 992 static ahc_reg_parse_entry_t BUSTIME_parse_table[] = { 993 { "BON", 0x0f, 0x0f }, 994 { "BOFF", 0xf0, 0xf0 } 995 }; 996 997 int 998 ahc_bustime_print(u_int regvalue, u_int *cur_col, u_int wrap) 999 { 1000 return (ahc_print_register(BUSTIME_parse_table, 2, "BUSTIME", 1001 0x85, regvalue, cur_col, wrap)); 1002 } 1003 1004 static ahc_reg_parse_entry_t DSCOMMAND1_parse_table[] = { 1005 { "HADDLDSEL0", 0x01, 0x01 }, 1006 { "HADDLDSEL1", 0x02, 0x02 }, 1007 { "DSLATT", 0xfc, 0xfc } 1008 }; 1009 1010 int 1011 ahc_dscommand1_print(u_int regvalue, u_int *cur_col, u_int wrap) 1012 { 1013 return (ahc_print_register(DSCOMMAND1_parse_table, 3, "DSCOMMAND1", 1014 0x85, regvalue, cur_col, wrap)); 1015 } 1016 1017 static ahc_reg_parse_entry_t BUSSPD_parse_table[] = { 1018 { "STBON", 0x07, 0x07 }, 1019 { "STBOFF", 0x38, 0x38 }, 1020 { "DFTHRSH_75", 0x80, 0x80 }, 1021 { "DFTHRSH", 0xc0, 0xc0 }, 1022 { "DFTHRSH_100", 0xc0, 0xc0 } 1023 }; 1024 1025 int 1026 ahc_busspd_print(u_int regvalue, u_int *cur_col, u_int wrap) 1027 { 1028 return (ahc_print_register(BUSSPD_parse_table, 5, "BUSSPD", 1029 0x86, regvalue, cur_col, wrap)); 1030 } 1031 1032 static ahc_reg_parse_entry_t HS_MAILBOX_parse_table[] = { 1033 { "SEQ_MAILBOX", 0x0f, 0x0f }, 1034 { "HOST_TQINPOS", 0x80, 0x80 }, 1035 { "HOST_MAILBOX", 0xf0, 0xf0 } 1036 }; 1037 1038 int 1039 ahc_hs_mailbox_print(u_int regvalue, u_int *cur_col, u_int wrap) 1040 { 1041 return (ahc_print_register(HS_MAILBOX_parse_table, 3, "HS_MAILBOX", 1042 0x86, regvalue, cur_col, wrap)); 1043 } 1044 1045 static ahc_reg_parse_entry_t DSPCISTATUS_parse_table[] = { 1046 { "DFTHRSH_100", 0xc0, 0xc0 } 1047 }; 1048 1049 int 1050 ahc_dspcistatus_print(u_int regvalue, u_int *cur_col, u_int wrap) 1051 { 1052 return (ahc_print_register(DSPCISTATUS_parse_table, 1, "DSPCISTATUS", 1053 0x86, regvalue, cur_col, wrap)); 1054 } 1055 1056 static ahc_reg_parse_entry_t HCNTRL_parse_table[] = { 1057 { "CHIPRST", 0x01, 0x01 }, 1058 { "CHIPRSTACK", 0x01, 0x01 }, 1059 { "INTEN", 0x02, 0x02 }, 1060 { "PAUSE", 0x04, 0x04 }, 1061 { "IRQMS", 0x08, 0x08 }, 1062 { "SWINT", 0x10, 0x10 }, 1063 { "POWRDN", 0x40, 0x40 } 1064 }; 1065 1066 int 1067 ahc_hcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap) 1068 { 1069 return (ahc_print_register(HCNTRL_parse_table, 7, "HCNTRL", 1070 0x87, regvalue, cur_col, wrap)); 1071 } 1072 1073 int 1074 ahc_haddr_print(u_int regvalue, u_int *cur_col, u_int wrap) 1075 { 1076 return (ahc_print_register(NULL, 0, "HADDR", 1077 0x88, regvalue, cur_col, wrap)); 1078 } 1079 1080 int 1081 ahc_hcnt_print(u_int regvalue, u_int *cur_col, u_int wrap) 1082 { 1083 return (ahc_print_register(NULL, 0, "HCNT", 1084 0x8c, regvalue, cur_col, wrap)); 1085 } 1086 1087 int 1088 ahc_scbptr_print(u_int regvalue, u_int *cur_col, u_int wrap) 1089 { 1090 return (ahc_print_register(NULL, 0, "SCBPTR", 1091 0x90, regvalue, cur_col, wrap)); 1092 } 1093 1094 static ahc_reg_parse_entry_t INTSTAT_parse_table[] = { 1095 { "SEQINT", 0x01, 0x01 }, 1096 { "CMDCMPLT", 0x02, 0x02 }, 1097 { "SCSIINT", 0x04, 0x04 }, 1098 { "BRKADRINT", 0x08, 0x08 }, 1099 { "BAD_PHASE", 0x01, 0x01 }, 1100 { "INT_PEND", 0x0f, 0x0f }, 1101 { "SEND_REJECT", 0x11, 0x11 }, 1102 { "PROTO_VIOLATION", 0x21, 0x21 }, 1103 { "NO_MATCH", 0x31, 0x31 }, 1104 { "IGN_WIDE_RES", 0x41, 0x41 }, 1105 { "PDATA_REINIT", 0x51, 0x51 }, 1106 { "HOST_MSG_LOOP", 0x61, 0x61 }, 1107 { "BAD_STATUS", 0x71, 0x71 }, 1108 { "PERR_DETECTED", 0x81, 0x81 }, 1109 { "DATA_OVERRUN", 0x91, 0x91 }, 1110 { "MKMSG_FAILED", 0xa1, 0xa1 }, 1111 { "MISSED_BUSFREE", 0xb1, 0xb1 }, 1112 { "SCB_MISMATCH", 0xc1, 0xc1 }, 1113 { "NO_FREE_SCB", 0xd1, 0xd1 }, 1114 { "OUT_OF_RANGE", 0xe1, 0xe1 }, 1115 { "SEQINT_MASK", 0xf1, 0xf1 } 1116 }; 1117 1118 int 1119 ahc_intstat_print(u_int regvalue, u_int *cur_col, u_int wrap) 1120 { 1121 return (ahc_print_register(INTSTAT_parse_table, 21, "INTSTAT", 1122 0x91, regvalue, cur_col, wrap)); 1123 } 1124 1125 static ahc_reg_parse_entry_t ERROR_parse_table[] = { 1126 { "ILLHADDR", 0x01, 0x01 }, 1127 { "ILLSADDR", 0x02, 0x02 }, 1128 { "ILLOPCODE", 0x04, 0x04 }, 1129 { "SQPARERR", 0x08, 0x08 }, 1130 { "DPARERR", 0x10, 0x10 }, 1131 { "MPARERR", 0x20, 0x20 }, 1132 { "PCIERRSTAT", 0x40, 0x40 }, 1133 { "CIOPARERR", 0x80, 0x80 } 1134 }; 1135 1136 int 1137 ahc_error_print(u_int regvalue, u_int *cur_col, u_int wrap) 1138 { 1139 return (ahc_print_register(ERROR_parse_table, 8, "ERROR", 1140 0x92, regvalue, cur_col, wrap)); 1141 } 1142 1143 static ahc_reg_parse_entry_t CLRINT_parse_table[] = { 1144 { "CLRSEQINT", 0x01, 0x01 }, 1145 { "CLRCMDINT", 0x02, 0x02 }, 1146 { "CLRSCSIINT", 0x04, 0x04 }, 1147 { "CLRBRKADRINT", 0x08, 0x08 }, 1148 { "CLRPARERR", 0x10, 0x10 } 1149 }; 1150 1151 int 1152 ahc_clrint_print(u_int regvalue, u_int *cur_col, u_int wrap) 1153 { 1154 return (ahc_print_register(CLRINT_parse_table, 5, "CLRINT", 1155 0x92, regvalue, cur_col, wrap)); 1156 } 1157 1158 static ahc_reg_parse_entry_t DFCNTRL_parse_table[] = { 1159 { "FIFORESET", 0x01, 0x01 }, 1160 { "FIFOFLUSH", 0x02, 0x02 }, 1161 { "DIRECTION", 0x04, 0x04 }, 1162 { "HDMAEN", 0x08, 0x08 }, 1163 { "HDMAENACK", 0x08, 0x08 }, 1164 { "SDMAEN", 0x10, 0x10 }, 1165 { "SDMAENACK", 0x10, 0x10 }, 1166 { "SCSIEN", 0x20, 0x20 }, 1167 { "WIDEODD", 0x40, 0x40 }, 1168 { "PRELOADEN", 0x80, 0x80 } 1169 }; 1170 1171 int 1172 ahc_dfcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap) 1173 { 1174 return (ahc_print_register(DFCNTRL_parse_table, 10, "DFCNTRL", 1175 0x93, regvalue, cur_col, wrap)); 1176 } 1177 1178 static ahc_reg_parse_entry_t DFSTATUS_parse_table[] = { 1179 { "FIFOEMP", 0x01, 0x01 }, 1180 { "FIFOFULL", 0x02, 0x02 }, 1181 { "DFTHRESH", 0x04, 0x04 }, 1182 { "HDONE", 0x08, 0x08 }, 1183 { "MREQPEND", 0x10, 0x10 }, 1184 { "FIFOQWDEMP", 0x20, 0x20 }, 1185 { "DFCACHETH", 0x40, 0x40 }, 1186 { "PRELOAD_AVAIL", 0x80, 0x80 } 1187 }; 1188 1189 int 1190 ahc_dfstatus_print(u_int regvalue, u_int *cur_col, u_int wrap) 1191 { 1192 return (ahc_print_register(DFSTATUS_parse_table, 8, "DFSTATUS", 1193 0x94, regvalue, cur_col, wrap)); 1194 } 1195 1196 int 1197 ahc_dfwaddr_print(u_int regvalue, u_int *cur_col, u_int wrap) 1198 { 1199 return (ahc_print_register(NULL, 0, "DFWADDR", 1200 0x95, regvalue, cur_col, wrap)); 1201 } 1202 1203 int 1204 ahc_dfraddr_print(u_int regvalue, u_int *cur_col, u_int wrap) 1205 { 1206 return (ahc_print_register(NULL, 0, "DFRADDR", 1207 0x97, regvalue, cur_col, wrap)); 1208 } 1209 1210 int 1211 ahc_dfdat_print(u_int regvalue, u_int *cur_col, u_int wrap) 1212 { 1213 return (ahc_print_register(NULL, 0, "DFDAT", 1214 0x99, regvalue, cur_col, wrap)); 1215 } 1216 1217 static ahc_reg_parse_entry_t SCBCNT_parse_table[] = { 1218 { "SCBAUTO", 0x80, 0x80 }, 1219 { "SCBCNT_MASK", 0x1f, 0x1f } 1220 }; 1221 1222 int 1223 ahc_scbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap) 1224 { 1225 return (ahc_print_register(SCBCNT_parse_table, 2, "SCBCNT", 1226 0x9a, regvalue, cur_col, wrap)); 1227 } 1228 1229 int 1230 ahc_qinfifo_print(u_int regvalue, u_int *cur_col, u_int wrap) 1231 { 1232 return (ahc_print_register(NULL, 0, "QINFIFO", 1233 0x9b, regvalue, cur_col, wrap)); 1234 } 1235 1236 int 1237 ahc_qincnt_print(u_int regvalue, u_int *cur_col, u_int wrap) 1238 { 1239 return (ahc_print_register(NULL, 0, "QINCNT", 1240 0x9c, regvalue, cur_col, wrap)); 1241 } 1242 1243 static ahc_reg_parse_entry_t CRCCONTROL1_parse_table[] = { 1244 { "TARGCRCCNTEN", 0x04, 0x04 }, 1245 { "TARGCRCENDEN", 0x08, 0x08 }, 1246 { "CRCREQCHKEN", 0x10, 0x10 }, 1247 { "CRCENDCHKEN", 0x20, 0x20 }, 1248 { "CRCVALCHKEN", 0x40, 0x40 }, 1249 { "CRCONSEEN", 0x80, 0x80 } 1250 }; 1251 1252 int 1253 ahc_crccontrol1_print(u_int regvalue, u_int *cur_col, u_int wrap) 1254 { 1255 return (ahc_print_register(CRCCONTROL1_parse_table, 6, "CRCCONTROL1", 1256 0x9d, regvalue, cur_col, wrap)); 1257 } 1258 1259 int 1260 ahc_qoutfifo_print(u_int regvalue, u_int *cur_col, u_int wrap) 1261 { 1262 return (ahc_print_register(NULL, 0, "QOUTFIFO", 1263 0x9d, regvalue, cur_col, wrap)); 1264 } 1265 1266 int 1267 ahc_qoutcnt_print(u_int regvalue, u_int *cur_col, u_int wrap) 1268 { 1269 return (ahc_print_register(NULL, 0, "QOUTCNT", 1270 0x9e, regvalue, cur_col, wrap)); 1271 } 1272 1273 static ahc_reg_parse_entry_t SCSIPHASE_parse_table[] = { 1274 { "DATA_OUT_PHASE", 0x01, 0x01 }, 1275 { "DATA_IN_PHASE", 0x02, 0x02 }, 1276 { "MSG_OUT_PHASE", 0x04, 0x04 }, 1277 { "MSG_IN_PHASE", 0x08, 0x08 }, 1278 { "COMMAND_PHASE", 0x10, 0x10 }, 1279 { "STATUS_PHASE", 0x20, 0x20 }, 1280 { "DATA_PHASE_MASK", 0x03, 0x03 } 1281 }; 1282 1283 int 1284 ahc_scsiphase_print(u_int regvalue, u_int *cur_col, u_int wrap) 1285 { 1286 return (ahc_print_register(SCSIPHASE_parse_table, 7, "SCSIPHASE", 1287 0x9e, regvalue, cur_col, wrap)); 1288 } 1289 1290 static ahc_reg_parse_entry_t SFUNCT_parse_table[] = { 1291 { "ALT_MODE", 0x80, 0x80 } 1292 }; 1293 1294 int 1295 ahc_sfunct_print(u_int regvalue, u_int *cur_col, u_int wrap) 1296 { 1297 return (ahc_print_register(SFUNCT_parse_table, 1, "SFUNCT", 1298 0x9f, regvalue, cur_col, wrap)); 1299 } 1300 1301 int 1302 ahc_scb_base_print(u_int regvalue, u_int *cur_col, u_int wrap) 1303 { 1304 return (ahc_print_register(NULL, 0, "SCB_BASE", 1305 0xa0, regvalue, cur_col, wrap)); 1306 } 1307 1308 int 1309 ahc_scb_cdb_ptr_print(u_int regvalue, u_int *cur_col, u_int wrap) 1310 { 1311 return (ahc_print_register(NULL, 0, "SCB_CDB_PTR", 1312 0xa0, regvalue, cur_col, wrap)); 1313 } 1314 1315 int 1316 ahc_scb_residual_sgptr_print(u_int regvalue, u_int *cur_col, u_int wrap) 1317 { 1318 return (ahc_print_register(NULL, 0, "SCB_RESIDUAL_SGPTR", 1319 0xa4, regvalue, cur_col, wrap)); 1320 } 1321 1322 int 1323 ahc_scb_scsi_status_print(u_int regvalue, u_int *cur_col, u_int wrap) 1324 { 1325 return (ahc_print_register(NULL, 0, "SCB_SCSI_STATUS", 1326 0xa8, regvalue, cur_col, wrap)); 1327 } 1328 1329 int 1330 ahc_scb_target_phases_print(u_int regvalue, u_int *cur_col, u_int wrap) 1331 { 1332 return (ahc_print_register(NULL, 0, "SCB_TARGET_PHASES", 1333 0xa9, regvalue, cur_col, wrap)); 1334 } 1335 1336 int 1337 ahc_scb_target_data_dir_print(u_int regvalue, u_int *cur_col, u_int wrap) 1338 { 1339 return (ahc_print_register(NULL, 0, "SCB_TARGET_DATA_DIR", 1340 0xaa, regvalue, cur_col, wrap)); 1341 } 1342 1343 int 1344 ahc_scb_target_itag_print(u_int regvalue, u_int *cur_col, u_int wrap) 1345 { 1346 return (ahc_print_register(NULL, 0, "SCB_TARGET_ITAG", 1347 0xab, regvalue, cur_col, wrap)); 1348 } 1349 1350 int 1351 ahc_scb_dataptr_print(u_int regvalue, u_int *cur_col, u_int wrap) 1352 { 1353 return (ahc_print_register(NULL, 0, "SCB_DATAPTR", 1354 0xac, regvalue, cur_col, wrap)); 1355 } 1356 1357 static ahc_reg_parse_entry_t SCB_DATACNT_parse_table[] = { 1358 { "SG_LAST_SEG", 0x80, 0x80 }, 1359 { "SG_HIGH_ADDR_BITS", 0x7f, 0x7f } 1360 }; 1361 1362 int 1363 ahc_scb_datacnt_print(u_int regvalue, u_int *cur_col, u_int wrap) 1364 { 1365 return (ahc_print_register(SCB_DATACNT_parse_table, 2, "SCB_DATACNT", 1366 0xb0, regvalue, cur_col, wrap)); 1367 } 1368 1369 static ahc_reg_parse_entry_t SCB_SGPTR_parse_table[] = { 1370 { "SG_LIST_NULL", 0x01, 0x01 }, 1371 { "SG_FULL_RESID", 0x02, 0x02 }, 1372 { "SG_RESID_VALID", 0x04, 0x04 } 1373 }; 1374 1375 int 1376 ahc_scb_sgptr_print(u_int regvalue, u_int *cur_col, u_int wrap) 1377 { 1378 return (ahc_print_register(SCB_SGPTR_parse_table, 3, "SCB_SGPTR", 1379 0xb4, regvalue, cur_col, wrap)); 1380 } 1381 1382 static ahc_reg_parse_entry_t SCB_CONTROL_parse_table[] = { 1383 { "DISCONNECTED", 0x04, 0x04 }, 1384 { "ULTRAENB", 0x08, 0x08 }, 1385 { "MK_MESSAGE", 0x10, 0x10 }, 1386 { "TAG_ENB", 0x20, 0x20 }, 1387 { "DISCENB", 0x40, 0x40 }, 1388 { "TARGET_SCB", 0x80, 0x80 }, 1389 { "STATUS_RCVD", 0x80, 0x80 }, 1390 { "SCB_TAG_TYPE", 0x03, 0x03 } 1391 }; 1392 1393 int 1394 ahc_scb_control_print(u_int regvalue, u_int *cur_col, u_int wrap) 1395 { 1396 return (ahc_print_register(SCB_CONTROL_parse_table, 8, "SCB_CONTROL", 1397 0xb8, regvalue, cur_col, wrap)); 1398 } 1399 1400 static ahc_reg_parse_entry_t SCB_SCSIID_parse_table[] = { 1401 { "TWIN_CHNLB", 0x80, 0x80 }, 1402 { "OID", 0x0f, 0x0f }, 1403 { "TWIN_TID", 0x70, 0x70 }, 1404 { "TID", 0xf0, 0xf0 } 1405 }; 1406 1407 int 1408 ahc_scb_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap) 1409 { 1410 return (ahc_print_register(SCB_SCSIID_parse_table, 4, "SCB_SCSIID", 1411 0xb9, regvalue, cur_col, wrap)); 1412 } 1413 1414 static ahc_reg_parse_entry_t SCB_LUN_parse_table[] = { 1415 { "SCB_XFERLEN_ODD", 0x80, 0x80 }, 1416 { "LID", 0x3f, 0x3f } 1417 }; 1418 1419 int 1420 ahc_scb_lun_print(u_int regvalue, u_int *cur_col, u_int wrap) 1421 { 1422 return (ahc_print_register(SCB_LUN_parse_table, 2, "SCB_LUN", 1423 0xba, regvalue, cur_col, wrap)); 1424 } 1425 1426 int 1427 ahc_scb_tag_print(u_int regvalue, u_int *cur_col, u_int wrap) 1428 { 1429 return (ahc_print_register(NULL, 0, "SCB_TAG", 1430 0xbb, regvalue, cur_col, wrap)); 1431 } 1432 1433 int 1434 ahc_scb_cdb_len_print(u_int regvalue, u_int *cur_col, u_int wrap) 1435 { 1436 return (ahc_print_register(NULL, 0, "SCB_CDB_LEN", 1437 0xbc, regvalue, cur_col, wrap)); 1438 } 1439 1440 int 1441 ahc_scb_scsirate_print(u_int regvalue, u_int *cur_col, u_int wrap) 1442 { 1443 return (ahc_print_register(NULL, 0, "SCB_SCSIRATE", 1444 0xbd, regvalue, cur_col, wrap)); 1445 } 1446 1447 int 1448 ahc_scb_scsioffset_print(u_int regvalue, u_int *cur_col, u_int wrap) 1449 { 1450 return (ahc_print_register(NULL, 0, "SCB_SCSIOFFSET", 1451 0xbe, regvalue, cur_col, wrap)); 1452 } 1453 1454 int 1455 ahc_scb_next_print(u_int regvalue, u_int *cur_col, u_int wrap) 1456 { 1457 return (ahc_print_register(NULL, 0, "SCB_NEXT", 1458 0xbf, regvalue, cur_col, wrap)); 1459 } 1460 1461 int 1462 ahc_scb_64_spare_print(u_int regvalue, u_int *cur_col, u_int wrap) 1463 { 1464 return (ahc_print_register(NULL, 0, "SCB_64_SPARE", 1465 0xc0, regvalue, cur_col, wrap)); 1466 } 1467 1468 static ahc_reg_parse_entry_t SEECTL_2840_parse_table[] = { 1469 { "DO_2840", 0x01, 0x01 }, 1470 { "CK_2840", 0x02, 0x02 }, 1471 { "CS_2840", 0x04, 0x04 } 1472 }; 1473 1474 int 1475 ahc_seectl_2840_print(u_int regvalue, u_int *cur_col, u_int wrap) 1476 { 1477 return (ahc_print_register(SEECTL_2840_parse_table, 3, "SEECTL_2840", 1478 0xc0, regvalue, cur_col, wrap)); 1479 } 1480 1481 static ahc_reg_parse_entry_t STATUS_2840_parse_table[] = { 1482 { "DI_2840", 0x01, 0x01 }, 1483 { "EEPROM_TF", 0x80, 0x80 }, 1484 { "ADSEL", 0x1e, 0x1e }, 1485 { "BIOS_SEL", 0x60, 0x60 } 1486 }; 1487 1488 int 1489 ahc_status_2840_print(u_int regvalue, u_int *cur_col, u_int wrap) 1490 { 1491 return (ahc_print_register(STATUS_2840_parse_table, 4, "STATUS_2840", 1492 0xc1, regvalue, cur_col, wrap)); 1493 } 1494 1495 int 1496 ahc_scb_64_btt_print(u_int regvalue, u_int *cur_col, u_int wrap) 1497 { 1498 return (ahc_print_register(NULL, 0, "SCB_64_BTT", 1499 0xd0, regvalue, cur_col, wrap)); 1500 } 1501 1502 int 1503 ahc_cchaddr_print(u_int regvalue, u_int *cur_col, u_int wrap) 1504 { 1505 return (ahc_print_register(NULL, 0, "CCHADDR", 1506 0xe0, regvalue, cur_col, wrap)); 1507 } 1508 1509 int 1510 ahc_cchcnt_print(u_int regvalue, u_int *cur_col, u_int wrap) 1511 { 1512 return (ahc_print_register(NULL, 0, "CCHCNT", 1513 0xe8, regvalue, cur_col, wrap)); 1514 } 1515 1516 int 1517 ahc_ccsgram_print(u_int regvalue, u_int *cur_col, u_int wrap) 1518 { 1519 return (ahc_print_register(NULL, 0, "CCSGRAM", 1520 0xe9, regvalue, cur_col, wrap)); 1521 } 1522 1523 int 1524 ahc_ccsgaddr_print(u_int regvalue, u_int *cur_col, u_int wrap) 1525 { 1526 return (ahc_print_register(NULL, 0, "CCSGADDR", 1527 0xea, regvalue, cur_col, wrap)); 1528 } 1529 1530 static ahc_reg_parse_entry_t CCSGCTL_parse_table[] = { 1531 { "CCSGRESET", 0x01, 0x01 }, 1532 { "SG_FETCH_NEEDED", 0x02, 0x02 }, 1533 { "CCSGEN", 0x08, 0x08 }, 1534 { "CCSGDONE", 0x80, 0x80 } 1535 }; 1536 1537 int 1538 ahc_ccsgctl_print(u_int regvalue, u_int *cur_col, u_int wrap) 1539 { 1540 return (ahc_print_register(CCSGCTL_parse_table, 4, "CCSGCTL", 1541 0xeb, regvalue, cur_col, wrap)); 1542 } 1543 1544 int 1545 ahc_ccscbram_print(u_int regvalue, u_int *cur_col, u_int wrap) 1546 { 1547 return (ahc_print_register(NULL, 0, "CCSCBRAM", 1548 0xec, regvalue, cur_col, wrap)); 1549 } 1550 1551 int 1552 ahc_ccscbaddr_print(u_int regvalue, u_int *cur_col, u_int wrap) 1553 { 1554 return (ahc_print_register(NULL, 0, "CCSCBADDR", 1555 0xed, regvalue, cur_col, wrap)); 1556 } 1557 1558 static ahc_reg_parse_entry_t CCSCBCTL_parse_table[] = { 1559 { "CCSCBRESET", 0x01, 0x01 }, 1560 { "CCSCBDIR", 0x04, 0x04 }, 1561 { "CCSCBEN", 0x08, 0x08 }, 1562 { "CCARREN", 0x10, 0x10 }, 1563 { "ARRDONE", 0x40, 0x40 }, 1564 { "CCSCBDONE", 0x80, 0x80 } 1565 }; 1566 1567 int 1568 ahc_ccscbctl_print(u_int regvalue, u_int *cur_col, u_int wrap) 1569 { 1570 return (ahc_print_register(CCSCBCTL_parse_table, 6, "CCSCBCTL", 1571 0xee, regvalue, cur_col, wrap)); 1572 } 1573 1574 int 1575 ahc_ccscbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap) 1576 { 1577 return (ahc_print_register(NULL, 0, "CCSCBCNT", 1578 0xef, regvalue, cur_col, wrap)); 1579 } 1580 1581 int 1582 ahc_scbbaddr_print(u_int regvalue, u_int *cur_col, u_int wrap) 1583 { 1584 return (ahc_print_register(NULL, 0, "SCBBADDR", 1585 0xf0, regvalue, cur_col, wrap)); 1586 } 1587 1588 int 1589 ahc_ccscbptr_print(u_int regvalue, u_int *cur_col, u_int wrap) 1590 { 1591 return (ahc_print_register(NULL, 0, "CCSCBPTR", 1592 0xf1, regvalue, cur_col, wrap)); 1593 } 1594 1595 int 1596 ahc_hnscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap) 1597 { 1598 return (ahc_print_register(NULL, 0, "HNSCB_QOFF", 1599 0xf4, regvalue, cur_col, wrap)); 1600 } 1601 1602 int 1603 ahc_snscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap) 1604 { 1605 return (ahc_print_register(NULL, 0, "SNSCB_QOFF", 1606 0xf6, regvalue, cur_col, wrap)); 1607 } 1608 1609 int 1610 ahc_sdscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap) 1611 { 1612 return (ahc_print_register(NULL, 0, "SDSCB_QOFF", 1613 0xf8, regvalue, cur_col, wrap)); 1614 } 1615 1616 static ahc_reg_parse_entry_t QOFF_CTLSTA_parse_table[] = { 1617 { "SDSCB_ROLLOVER", 0x10, 0x10 }, 1618 { "SNSCB_ROLLOVER", 0x20, 0x20 }, 1619 { "SCB_AVAIL", 0x40, 0x40 }, 1620 { "SCB_QSIZE_256", 0x06, 0x06 }, 1621 { "SCB_QSIZE", 0x07, 0x07 } 1622 }; 1623 1624 int 1625 ahc_qoff_ctlsta_print(u_int regvalue, u_int *cur_col, u_int wrap) 1626 { 1627 return (ahc_print_register(QOFF_CTLSTA_parse_table, 5, "QOFF_CTLSTA", 1628 0xfa, regvalue, cur_col, wrap)); 1629 } 1630 1631 static ahc_reg_parse_entry_t DFF_THRSH_parse_table[] = { 1632 { "RD_DFTHRSH_MIN", 0x00, 0x00 }, 1633 { "WR_DFTHRSH_MIN", 0x00, 0x00 }, 1634 { "RD_DFTHRSH_25", 0x01, 0x01 }, 1635 { "RD_DFTHRSH_50", 0x02, 0x02 }, 1636 { "RD_DFTHRSH_63", 0x03, 0x03 }, 1637 { "RD_DFTHRSH_75", 0x04, 0x04 }, 1638 { "RD_DFTHRSH_85", 0x05, 0x05 }, 1639 { "RD_DFTHRSH_90", 0x06, 0x06 }, 1640 { "RD_DFTHRSH", 0x07, 0x07 }, 1641 { "RD_DFTHRSH_MAX", 0x07, 0x07 }, 1642 { "WR_DFTHRSH_25", 0x10, 0x10 }, 1643 { "WR_DFTHRSH_50", 0x20, 0x20 }, 1644 { "WR_DFTHRSH_63", 0x30, 0x30 }, 1645 { "WR_DFTHRSH_75", 0x40, 0x40 }, 1646 { "WR_DFTHRSH_85", 0x50, 0x50 }, 1647 { "WR_DFTHRSH_90", 0x60, 0x60 }, 1648 { "WR_DFTHRSH", 0x70, 0x70 }, 1649 { "WR_DFTHRSH_MAX", 0x70, 0x70 } 1650 }; 1651 1652 int 1653 ahc_dff_thrsh_print(u_int regvalue, u_int *cur_col, u_int wrap) 1654 { 1655 return (ahc_print_register(DFF_THRSH_parse_table, 18, "DFF_THRSH", 1656 0xfb, regvalue, cur_col, wrap)); 1657 } 1658 1659 static ahc_reg_parse_entry_t SG_CACHE_SHADOW_parse_table[] = { 1660 { "LAST_SEG_DONE", 0x01, 0x01 }, 1661 { "LAST_SEG", 0x02, 0x02 }, 1662 { "SG_ADDR_MASK", 0xf8, 0xf8 } 1663 }; 1664 1665 int 1666 ahc_sg_cache_shadow_print(u_int regvalue, u_int *cur_col, u_int wrap) 1667 { 1668 return (ahc_print_register(SG_CACHE_SHADOW_parse_table, 3, "SG_CACHE_SHADOW", 1669 0xfc, regvalue, cur_col, wrap)); 1670 } 1671 1672 static ahc_reg_parse_entry_t SG_CACHE_PRE_parse_table[] = { 1673 { "LAST_SEG_DONE", 0x01, 0x01 }, 1674 { "LAST_SEG", 0x02, 0x02 }, 1675 { "SG_ADDR_MASK", 0xf8, 0xf8 } 1676 }; 1677 1678 int 1679 ahc_sg_cache_pre_print(u_int regvalue, u_int *cur_col, u_int wrap) 1680 { 1681 return (ahc_print_register(SG_CACHE_PRE_parse_table, 3, "SG_CACHE_PRE", 1682 0xfc, regvalue, cur_col, wrap)); 1683 } 1684