1 /* 2 * FreeBSD, PCI product support functions 3 * 4 * Copyright (c) 1995-2001 Justin T. Gibbs 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. The name of the author may not be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * Alternatively, this software may be distributed under the terms of the 17 * GNU Public License ("GPL"). 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * $Id: //depot/aic7xxx/freebsd/dev/aic7xxx/ahc_pci.c#9 $ 32 * 33 * $FreeBSD$ 34 */ 35 36 #include <dev/aic7xxx/aic7xxx_osm.h> 37 38 #define AHC_PCI_IOADDR PCIR_MAPS /* I/O Address */ 39 #define AHC_PCI_MEMADDR (PCIR_MAPS + 4) /* Mem I/O Address */ 40 41 static int ahc_pci_probe(device_t dev); 42 static int ahc_pci_attach(device_t dev); 43 44 static device_method_t ahc_pci_device_methods[] = { 45 /* Device interface */ 46 DEVMETHOD(device_probe, ahc_pci_probe), 47 DEVMETHOD(device_attach, ahc_pci_attach), 48 DEVMETHOD(device_detach, ahc_detach), 49 { 0, 0 } 50 }; 51 52 static driver_t ahc_pci_driver = { 53 "ahc", 54 ahc_pci_device_methods, 55 sizeof(struct ahc_softc) 56 }; 57 58 DRIVER_MODULE(ahc_pci, pci, ahc_pci_driver, ahc_devclass, 0, 0); 59 DRIVER_MODULE(ahc_pci, cardbus, ahc_pci_driver, ahc_devclass, 0, 0); 60 MODULE_DEPEND(ahc_pci, ahc, 1, 1, 1); 61 MODULE_VERSION(ahc_pci, 1); 62 63 static int 64 ahc_pci_probe(device_t dev) 65 { 66 struct ahc_pci_identity *entry; 67 68 entry = ahc_find_pci_device(dev); 69 if (entry != NULL) { 70 device_set_desc(dev, entry->name); 71 return (0); 72 } 73 return (ENXIO); 74 } 75 76 static int 77 ahc_pci_attach(device_t dev) 78 { 79 struct ahc_pci_identity *entry; 80 struct ahc_softc *ahc; 81 char *name; 82 int error; 83 84 entry = ahc_find_pci_device(dev); 85 if (entry == NULL) 86 return (ENXIO); 87 88 /* 89 * Allocate a softc for this card and 90 * set it up for attachment by our 91 * common detect routine. 92 */ 93 name = malloc(strlen(device_get_nameunit(dev)) + 1, M_DEVBUF, M_NOWAIT); 94 if (name == NULL) 95 return (ENOMEM); 96 strcpy(name, device_get_nameunit(dev)); 97 ahc = ahc_alloc(dev, name); 98 if (ahc == NULL) 99 return (ENOMEM); 100 101 ahc_set_unit(ahc, device_get_unit(dev)); 102 103 /* 104 * Should we bother disabling 39Bit addressing 105 * based on installed memory? 106 */ 107 if (sizeof(bus_addr_t) > 4) 108 ahc->flags |= AHC_39BIT_ADDRESSING; 109 110 /* Allocate a dmatag for our SCB DMA maps */ 111 /* XXX Should be a child of the PCI bus dma tag */ 112 error = bus_dma_tag_create(/*parent*/NULL, /*alignment*/1, 113 /*boundary*/0, 114 (ahc->flags & AHC_39BIT_ADDRESSING) 115 ? 0x7FFFFFFFFF 116 : BUS_SPACE_MAXADDR_32BIT, 117 /*highaddr*/BUS_SPACE_MAXADDR, 118 /*filter*/NULL, /*filterarg*/NULL, 119 /*maxsize*/MAXBSIZE, /*nsegments*/AHC_NSEG, 120 /*maxsegsz*/AHC_MAXTRANSFER_SIZE, 121 /*flags*/BUS_DMA_ALLOCNOW, 122 &ahc->parent_dmat); 123 124 if (error != 0) { 125 printf("ahc_pci_attach: Could not allocate DMA tag " 126 "- error %d\n", error); 127 ahc_free(ahc); 128 return (ENOMEM); 129 } 130 ahc->dev_softc = dev; 131 error = ahc_pci_config(ahc, entry); 132 if (error != 0) { 133 ahc_free(ahc); 134 return (error); 135 } 136 137 ahc_attach(ahc); 138 return (0); 139 } 140 141 int 142 ahc_pci_map_registers(struct ahc_softc *ahc) 143 { 144 struct resource *regs; 145 u_int command; 146 int regs_type; 147 int regs_id; 148 149 command = ahc_pci_read_config(ahc->dev_softc, PCIR_COMMAND, /*bytes*/1); 150 regs = NULL; 151 regs_type = 0; 152 regs_id = 0; 153 #ifdef AHC_ALLOW_MEMIO 154 if ((command & PCIM_CMD_MEMEN) != 0) { 155 156 regs_type = SYS_RES_MEMORY; 157 regs_id = AHC_PCI_MEMADDR; 158 regs = bus_alloc_resource(ahc->dev_softc, regs_type, 159 ®s_id, 0, ~0, 1, RF_ACTIVE); 160 if (regs != NULL) { 161 ahc->tag = rman_get_bustag(regs); 162 ahc->bsh = rman_get_bushandle(regs); 163 164 /* 165 * Do a quick test to see if memory mapped 166 * I/O is functioning correctly. 167 */ 168 if (ahc_inb(ahc, HCNTRL) == 0xFF) { 169 device_printf(ahc->dev_softc, 170 "PCI Device %d:%d:%d failed memory " 171 "mapped test. Using PIO.\n", 172 ahc_get_pci_bus(ahc->dev_softc), 173 ahc_get_pci_slot(ahc->dev_softc), 174 ahc_get_pci_function(ahc->dev_softc)); 175 bus_release_resource(ahc->dev_softc, regs_type, 176 regs_id, regs); 177 regs = NULL; 178 } else { 179 command &= ~PCIM_CMD_PORTEN; 180 ahc_pci_write_config(ahc->dev_softc, 181 PCIR_COMMAND, 182 command, /*bytes*/1); 183 } 184 } 185 } 186 #endif 187 if (regs == NULL && (command & PCIM_CMD_PORTEN) != 0) { 188 regs_type = SYS_RES_IOPORT; 189 regs_id = AHC_PCI_IOADDR; 190 regs = bus_alloc_resource(ahc->dev_softc, regs_type, 191 ®s_id, 0, ~0, 1, RF_ACTIVE); 192 if (regs != NULL) { 193 ahc->tag = rman_get_bustag(regs); 194 ahc->bsh = rman_get_bushandle(regs); 195 command &= ~PCIM_CMD_MEMEN; 196 ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND, 197 command, /*bytes*/1); 198 } 199 } 200 if (regs == NULL) { 201 device_printf(ahc->dev_softc, 202 "can't allocate register resources\n"); 203 return (ENOMEM); 204 } 205 ahc->platform_data->regs_res_type = regs_type; 206 ahc->platform_data->regs_res_id = regs_id; 207 ahc->platform_data->regs = regs; 208 return (0); 209 } 210 211 int 212 ahc_pci_map_int(struct ahc_softc *ahc) 213 { 214 int zero; 215 216 zero = 0; 217 ahc->platform_data->irq = 218 bus_alloc_resource(ahc->dev_softc, SYS_RES_IRQ, &zero, 219 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 220 if (ahc->platform_data->irq == NULL) { 221 device_printf(ahc->dev_softc, 222 "bus_alloc_resource() failed to allocate IRQ\n"); 223 return (ENOMEM); 224 } 225 ahc->platform_data->irq_res_type = SYS_RES_IRQ; 226 return (ahc_map_int(ahc)); 227 } 228 229 void 230 ahc_power_state_change(struct ahc_softc *ahc, ahc_power_state new_state) 231 { 232 uint32_t cap; 233 u_int cap_offset; 234 235 /* 236 * Traverse the capability list looking for 237 * the power management capability. 238 */ 239 cap = 0; 240 cap_offset = ahc_pci_read_config(ahc->dev_softc, 241 PCIR_CAP_PTR, /*bytes*/1); 242 while (cap_offset != 0) { 243 244 cap = ahc_pci_read_config(ahc->dev_softc, 245 cap_offset, /*bytes*/4); 246 if ((cap & 0xFF) == 1 247 && ((cap >> 16) & 0x3) > 0) { 248 uint32_t pm_control; 249 250 pm_control = ahc_pci_read_config(ahc->dev_softc, 251 cap_offset + 4, 252 /*bytes*/2); 253 pm_control &= ~0x3; 254 pm_control |= new_state; 255 ahc_pci_write_config(ahc->dev_softc, 256 cap_offset + 4, 257 pm_control, /*bytes*/2); 258 break; 259 } 260 cap_offset = (cap >> 8) & 0xFF; 261 } 262 } 263