1 /*- 2 * Copyright (c) 2009-2012 Alexander Motin <mav@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/module.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/bus.h> 35 #include <sys/conf.h> 36 #include <sys/endian.h> 37 #include <sys/malloc.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <machine/stdarg.h> 41 #include <machine/resource.h> 42 #include <machine/bus.h> 43 #include <sys/rman.h> 44 #include <dev/pci/pcivar.h> 45 #include <dev/pci/pcireg.h> 46 #include "ahci.h" 47 48 static int force_ahci = 1; 49 TUNABLE_INT("hw.ahci.force", &force_ahci); 50 51 static const struct { 52 uint32_t id; 53 uint8_t rev; 54 const char *name; 55 int quirks; 56 } ahci_ids[] = { 57 {0x43801002, 0x00, "AMD SB600", 58 AHCI_Q_NOMSI | AHCI_Q_ATI_PMP_BUG | AHCI_Q_MAXIO_64K}, 59 {0x43901002, 0x00, "AMD SB7x0/SB8x0/SB9x0", 60 AHCI_Q_ATI_PMP_BUG | AHCI_Q_1MSI}, 61 {0x43911002, 0x00, "AMD SB7x0/SB8x0/SB9x0", 62 AHCI_Q_ATI_PMP_BUG | AHCI_Q_1MSI}, 63 {0x43921002, 0x00, "AMD SB7x0/SB8x0/SB9x0", 64 AHCI_Q_ATI_PMP_BUG | AHCI_Q_1MSI}, 65 {0x43931002, 0x00, "AMD SB7x0/SB8x0/SB9x0", 66 AHCI_Q_ATI_PMP_BUG | AHCI_Q_1MSI}, 67 {0x43941002, 0x00, "AMD SB7x0/SB8x0/SB9x0", 68 AHCI_Q_ATI_PMP_BUG | AHCI_Q_1MSI}, 69 /* Not sure SB8x0/SB9x0 needs this quirk. Be conservative though */ 70 {0x43951002, 0x00, "AMD SB8x0/SB9x0", AHCI_Q_ATI_PMP_BUG}, 71 {0x78001022, 0x00, "AMD Hudson-2", 0}, 72 {0x78011022, 0x00, "AMD Hudson-2", 0}, 73 {0x78021022, 0x00, "AMD Hudson-2", 0}, 74 {0x78031022, 0x00, "AMD Hudson-2", 0}, 75 {0x78041022, 0x00, "AMD Hudson-2", 0}, 76 {0x06011b21, 0x00, "ASMedia ASM1060", 0}, 77 {0x06021b21, 0x00, "ASMedia ASM1060", 0}, 78 {0x06111b21, 0x00, "ASMedia ASM1061", 0}, 79 {0x06121b21, 0x00, "ASMedia ASM1062", 0}, 80 {0x06201b21, 0x00, "ASMedia ASM106x", 0}, 81 {0x06211b21, 0x00, "ASMedia ASM106x", 0}, 82 {0x06221b21, 0x00, "ASMedia ASM106x", 0}, 83 {0x06241b21, 0x00, "ASMedia ASM106x", 0}, 84 {0x06251b21, 0x00, "ASMedia ASM106x", 0}, 85 {0x26528086, 0x00, "Intel ICH6", AHCI_Q_NOFORCE}, 86 {0x26538086, 0x00, "Intel ICH6M", AHCI_Q_NOFORCE}, 87 {0x26818086, 0x00, "Intel ESB2", 0}, 88 {0x26828086, 0x00, "Intel ESB2", 0}, 89 {0x26838086, 0x00, "Intel ESB2", 0}, 90 {0x27c18086, 0x00, "Intel ICH7", 0}, 91 {0x27c38086, 0x00, "Intel ICH7", 0}, 92 {0x27c58086, 0x00, "Intel ICH7M", 0}, 93 {0x27c68086, 0x00, "Intel ICH7M", 0}, 94 {0x28218086, 0x00, "Intel ICH8", 0}, 95 {0x28228086, 0x00, "Intel ICH8", 0}, 96 {0x28248086, 0x00, "Intel ICH8", 0}, 97 {0x28298086, 0x00, "Intel ICH8M", 0}, 98 {0x282a8086, 0x00, "Intel ICH8M", 0}, 99 {0x29228086, 0x00, "Intel ICH9", 0}, 100 {0x29238086, 0x00, "Intel ICH9", 0}, 101 {0x29248086, 0x00, "Intel ICH9", 0}, 102 {0x29258086, 0x00, "Intel ICH9", 0}, 103 {0x29278086, 0x00, "Intel ICH9", 0}, 104 {0x29298086, 0x00, "Intel ICH9M", 0}, 105 {0x292a8086, 0x00, "Intel ICH9M", 0}, 106 {0x292b8086, 0x00, "Intel ICH9M", 0}, 107 {0x292c8086, 0x00, "Intel ICH9M", 0}, 108 {0x292f8086, 0x00, "Intel ICH9M", 0}, 109 {0x294d8086, 0x00, "Intel ICH9", 0}, 110 {0x294e8086, 0x00, "Intel ICH9M", 0}, 111 {0x3a058086, 0x00, "Intel ICH10", 0}, 112 {0x3a228086, 0x00, "Intel ICH10", 0}, 113 {0x3a258086, 0x00, "Intel ICH10", 0}, 114 {0x3b228086, 0x00, "Intel 5 Series/3400 Series", 0}, 115 {0x3b238086, 0x00, "Intel 5 Series/3400 Series", 0}, 116 {0x3b258086, 0x00, "Intel 5 Series/3400 Series", 0}, 117 {0x3b298086, 0x00, "Intel 5 Series/3400 Series", 0}, 118 {0x3b2c8086, 0x00, "Intel 5 Series/3400 Series", 0}, 119 {0x3b2f8086, 0x00, "Intel 5 Series/3400 Series", 0}, 120 {0x1c028086, 0x00, "Intel Cougar Point", 0}, 121 {0x1c038086, 0x00, "Intel Cougar Point", 0}, 122 {0x1c048086, 0x00, "Intel Cougar Point", 0}, 123 {0x1c058086, 0x00, "Intel Cougar Point", 0}, 124 {0x1d028086, 0x00, "Intel Patsburg", 0}, 125 {0x1d048086, 0x00, "Intel Patsburg", 0}, 126 {0x1d068086, 0x00, "Intel Patsburg", 0}, 127 {0x28268086, 0x00, "Intel Patsburg (RAID)", 0}, 128 {0x1e028086, 0x00, "Intel Panther Point", 0}, 129 {0x1e038086, 0x00, "Intel Panther Point", 0}, 130 {0x1e048086, 0x00, "Intel Panther Point (RAID)", 0}, 131 {0x1e058086, 0x00, "Intel Panther Point (RAID)", 0}, 132 {0x1e068086, 0x00, "Intel Panther Point (RAID)", 0}, 133 {0x1e078086, 0x00, "Intel Panther Point (RAID)", 0}, 134 {0x1e0e8086, 0x00, "Intel Panther Point (RAID)", 0}, 135 {0x1e0f8086, 0x00, "Intel Panther Point (RAID)", 0}, 136 {0x1f228086, 0x00, "Intel Avoton", 0}, 137 {0x1f238086, 0x00, "Intel Avoton", 0}, 138 {0x1f248086, 0x00, "Intel Avoton (RAID)", 0}, 139 {0x1f258086, 0x00, "Intel Avoton (RAID)", 0}, 140 {0x1f268086, 0x00, "Intel Avoton (RAID)", 0}, 141 {0x1f278086, 0x00, "Intel Avoton (RAID)", 0}, 142 {0x1f2e8086, 0x00, "Intel Avoton (RAID)", 0}, 143 {0x1f2f8086, 0x00, "Intel Avoton (RAID)", 0}, 144 {0x1f328086, 0x00, "Intel Avoton", 0}, 145 {0x1f338086, 0x00, "Intel Avoton", 0}, 146 {0x1f348086, 0x00, "Intel Avoton (RAID)", 0}, 147 {0x1f358086, 0x00, "Intel Avoton (RAID)", 0}, 148 {0x1f368086, 0x00, "Intel Avoton (RAID)", 0}, 149 {0x1f378086, 0x00, "Intel Avoton (RAID)", 0}, 150 {0x1f3e8086, 0x00, "Intel Avoton (RAID)", 0}, 151 {0x1f3f8086, 0x00, "Intel Avoton (RAID)", 0}, 152 {0x23a38086, 0x00, "Intel Coleto Creek", 0}, 153 {0x28238086, 0x00, "Intel Wellsburg (RAID)", 0}, 154 {0x28278086, 0x00, "Intel Wellsburg (RAID)", 0}, 155 {0x8c028086, 0x00, "Intel Lynx Point", 0}, 156 {0x8c038086, 0x00, "Intel Lynx Point", 0}, 157 {0x8c048086, 0x00, "Intel Lynx Point (RAID)", 0}, 158 {0x8c058086, 0x00, "Intel Lynx Point (RAID)", 0}, 159 {0x8c068086, 0x00, "Intel Lynx Point (RAID)", 0}, 160 {0x8c078086, 0x00, "Intel Lynx Point (RAID)", 0}, 161 {0x8c0e8086, 0x00, "Intel Lynx Point (RAID)", 0}, 162 {0x8c0f8086, 0x00, "Intel Lynx Point (RAID)", 0}, 163 {0x8c828086, 0x00, "Intel Wildcat Point", 0}, 164 {0x8c838086, 0x00, "Intel Wildcat Point", 0}, 165 {0x8c848086, 0x00, "Intel Wildcat Point (RAID)", 0}, 166 {0x8c858086, 0x00, "Intel Wildcat Point (RAID)", 0}, 167 {0x8c868086, 0x00, "Intel Wildcat Point (RAID)", 0}, 168 {0x8c878086, 0x00, "Intel Wildcat Point (RAID)", 0}, 169 {0x8c8e8086, 0x00, "Intel Wildcat Point (RAID)", 0}, 170 {0x8c8f8086, 0x00, "Intel Wildcat Point (RAID)", 0}, 171 {0x8d028086, 0x00, "Intel Wellsburg", 0}, 172 {0x8d048086, 0x00, "Intel Wellsburg (RAID)", 0}, 173 {0x8d068086, 0x00, "Intel Wellsburg (RAID)", 0}, 174 {0x8d628086, 0x00, "Intel Wellsburg", 0}, 175 {0x8d648086, 0x00, "Intel Wellsburg (RAID)", 0}, 176 {0x8d668086, 0x00, "Intel Wellsburg (RAID)", 0}, 177 {0x8d6e8086, 0x00, "Intel Wellsburg (RAID)", 0}, 178 {0x9c028086, 0x00, "Intel Lynx Point-LP", 0}, 179 {0x9c038086, 0x00, "Intel Lynx Point-LP", 0}, 180 {0x9c048086, 0x00, "Intel Lynx Point-LP (RAID)", 0}, 181 {0x9c058086, 0x00, "Intel Lynx Point-LP (RAID)", 0}, 182 {0x9c068086, 0x00, "Intel Lynx Point-LP (RAID)", 0}, 183 {0x9c078086, 0x00, "Intel Lynx Point-LP (RAID)", 0}, 184 {0x9c0e8086, 0x00, "Intel Lynx Point-LP (RAID)", 0}, 185 {0x9c0f8086, 0x00, "Intel Lynx Point-LP (RAID)", 0}, 186 {0x9d038086, 0x00, "Intel Sunrise Point-LP", 0}, 187 {0x9d058086, 0x00, "Intel Sunrise Point-LP (RAID)", 0}, 188 {0x9d078086, 0x00, "Intel Sunrise Point-LP (RAID)", 0}, 189 {0xa1028086, 0x00, "Intel Sunrise Point", 0}, 190 {0xa1038086, 0x00, "Intel Sunrise Point", 0}, 191 {0xa1058086, 0x00, "Intel Sunrise Point (RAID)", 0}, 192 {0xa1068086, 0x00, "Intel Sunrise Point (RAID)", 0}, 193 {0xa1078086, 0x00, "Intel Sunrise Point (RAID)", 0}, 194 {0xa10f8086, 0x00, "Intel Sunrise Point (RAID)", 0}, 195 {0x23238086, 0x00, "Intel DH89xxCC", 0}, 196 {0x2360197b, 0x00, "JMicron JMB360", 0}, 197 {0x2361197b, 0x00, "JMicron JMB361", AHCI_Q_NOFORCE | AHCI_Q_1CH}, 198 {0x2362197b, 0x00, "JMicron JMB362", 0}, 199 {0x2363197b, 0x00, "JMicron JMB363", AHCI_Q_NOFORCE}, 200 {0x2365197b, 0x00, "JMicron JMB365", AHCI_Q_NOFORCE}, 201 {0x2366197b, 0x00, "JMicron JMB366", AHCI_Q_NOFORCE}, 202 {0x2368197b, 0x00, "JMicron JMB368", AHCI_Q_NOFORCE}, 203 {0x611111ab, 0x00, "Marvell 88SE6111", AHCI_Q_NOFORCE | AHCI_Q_NOPMP | 204 AHCI_Q_1CH | AHCI_Q_EDGEIS}, 205 {0x612111ab, 0x00, "Marvell 88SE6121", AHCI_Q_NOFORCE | AHCI_Q_NOPMP | 206 AHCI_Q_2CH | AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT}, 207 {0x614111ab, 0x00, "Marvell 88SE6141", AHCI_Q_NOFORCE | AHCI_Q_NOPMP | 208 AHCI_Q_4CH | AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT}, 209 {0x614511ab, 0x00, "Marvell 88SE6145", AHCI_Q_NOFORCE | AHCI_Q_NOPMP | 210 AHCI_Q_4CH | AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT}, 211 {0x91201b4b, 0x00, "Marvell 88SE912x", AHCI_Q_EDGEIS}, 212 {0x91231b4b, 0x11, "Marvell 88SE912x", AHCI_Q_ALTSIG}, 213 {0x91231b4b, 0x00, "Marvell 88SE912x", AHCI_Q_EDGEIS|AHCI_Q_SATA2}, 214 {0x91251b4b, 0x00, "Marvell 88SE9125", 0}, 215 {0x91281b4b, 0x00, "Marvell 88SE9128", AHCI_Q_ALTSIG}, 216 {0x91301b4b, 0x00, "Marvell 88SE9130", AHCI_Q_ALTSIG}, 217 {0x91721b4b, 0x00, "Marvell 88SE9172", 0}, 218 {0x91821b4b, 0x00, "Marvell 88SE9182", 0}, 219 {0x91831b4b, 0x00, "Marvell 88SS9183", 0}, 220 {0x91a01b4b, 0x00, "Marvell 88SE91Ax", 0}, 221 {0x92151b4b, 0x00, "Marvell 88SE9215", 0}, 222 {0x92201b4b, 0x00, "Marvell 88SE9220", AHCI_Q_ALTSIG}, 223 {0x92301b4b, 0x00, "Marvell 88SE9230", AHCI_Q_ALTSIG}, 224 {0x92351b4b, 0x00, "Marvell 88SE9235", 0}, 225 {0x06201103, 0x00, "HighPoint RocketRAID 620", 0}, 226 {0x06201b4b, 0x00, "HighPoint RocketRAID 620", 0}, 227 {0x06221103, 0x00, "HighPoint RocketRAID 622", 0}, 228 {0x06221b4b, 0x00, "HighPoint RocketRAID 622", 0}, 229 {0x06401103, 0x00, "HighPoint RocketRAID 640", 0}, 230 {0x06401b4b, 0x00, "HighPoint RocketRAID 640", 0}, 231 {0x06441103, 0x00, "HighPoint RocketRAID 644", 0}, 232 {0x06441b4b, 0x00, "HighPoint RocketRAID 644", 0}, 233 {0x06411103, 0x00, "HighPoint RocketRAID 640L", 0}, 234 {0x06421103, 0x00, "HighPoint RocketRAID 642L", 0}, 235 {0x06451103, 0x00, "HighPoint RocketRAID 644L", 0}, 236 {0x044c10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 237 {0x044d10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 238 {0x044e10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 239 {0x044f10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 240 {0x045c10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 241 {0x045d10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 242 {0x045e10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 243 {0x045f10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 244 {0x055010de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 245 {0x055110de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 246 {0x055210de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 247 {0x055310de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 248 {0x055410de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 249 {0x055510de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 250 {0x055610de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 251 {0x055710de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 252 {0x055810de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 253 {0x055910de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 254 {0x055A10de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 255 {0x055B10de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 256 {0x058410de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 257 {0x07f010de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 258 {0x07f110de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 259 {0x07f210de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 260 {0x07f310de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 261 {0x07f410de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 262 {0x07f510de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 263 {0x07f610de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 264 {0x07f710de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 265 {0x07f810de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 266 {0x07f910de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 267 {0x07fa10de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 268 {0x07fb10de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 269 {0x0ad010de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 270 {0x0ad110de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 271 {0x0ad210de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 272 {0x0ad310de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 273 {0x0ad410de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 274 {0x0ad510de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 275 {0x0ad610de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 276 {0x0ad710de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 277 {0x0ad810de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 278 {0x0ad910de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 279 {0x0ada10de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 280 {0x0adb10de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 281 {0x0ab410de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 282 {0x0ab510de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 283 {0x0ab610de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 284 {0x0ab710de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 285 {0x0ab810de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 286 {0x0ab910de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 287 {0x0aba10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 288 {0x0abb10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 289 {0x0abc10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 290 {0x0abd10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 291 {0x0abe10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 292 {0x0abf10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 293 {0x0d8410de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 294 {0x0d8510de, 0x00, "NVIDIA MCP89", AHCI_Q_NOFORCE|AHCI_Q_NOAA}, 295 {0x0d8610de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 296 {0x0d8710de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 297 {0x0d8810de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 298 {0x0d8910de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 299 {0x0d8a10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 300 {0x0d8b10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 301 {0x0d8c10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 302 {0x0d8d10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 303 {0x0d8e10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 304 {0x0d8f10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 305 {0x3781105a, 0x00, "Promise TX8660", 0}, 306 {0x33491106, 0x00, "VIA VT8251", AHCI_Q_NOPMP|AHCI_Q_NONCQ}, 307 {0x62871106, 0x00, "VIA VT8251", AHCI_Q_NOPMP|AHCI_Q_NONCQ}, 308 {0x11841039, 0x00, "SiS 966", 0}, 309 {0x11851039, 0x00, "SiS 968", 0}, 310 {0x01861039, 0x00, "SiS 968", 0}, 311 {0xa01c177d, 0x00, "ThunderX", AHCI_Q_ABAR0|AHCI_Q_1MSI}, 312 {0x00311c36, 0x00, "Annapurna", AHCI_Q_FORCE_PI|AHCI_Q_RESTORE_CAP|AHCI_Q_NOMSIX}, 313 {0x00000000, 0x00, NULL, 0} 314 }; 315 316 static int 317 ahci_pci_ctlr_reset(device_t dev) 318 { 319 320 if (pci_read_config(dev, PCIR_DEVVENDOR, 4) == 0x28298086 && 321 (pci_read_config(dev, 0x92, 1) & 0xfe) == 0x04) 322 pci_write_config(dev, 0x92, 0x01, 1); 323 return ahci_ctlr_reset(dev); 324 } 325 326 static int 327 ahci_probe(device_t dev) 328 { 329 char buf[64]; 330 int i, valid = 0; 331 uint32_t devid = pci_get_devid(dev); 332 uint8_t revid = pci_get_revid(dev); 333 334 /* 335 * Ensure it is not a PCI bridge (some vendors use 336 * the same PID and VID in PCI bridge and AHCI cards). 337 */ 338 if (pci_get_class(dev) == PCIC_BRIDGE) 339 return (ENXIO); 340 341 /* Is this a possible AHCI candidate? */ 342 if (pci_get_class(dev) == PCIC_STORAGE && 343 pci_get_subclass(dev) == PCIS_STORAGE_SATA && 344 pci_get_progif(dev) == PCIP_STORAGE_SATA_AHCI_1_0) 345 valid = 1; 346 else if (pci_get_class(dev) == PCIC_STORAGE && 347 pci_get_subclass(dev) == PCIS_STORAGE_RAID) 348 valid = 2; 349 /* Is this a known AHCI chip? */ 350 for (i = 0; ahci_ids[i].id != 0; i++) { 351 if (ahci_ids[i].id == devid && 352 ahci_ids[i].rev <= revid && 353 (valid || (force_ahci == 1 && 354 !(ahci_ids[i].quirks & AHCI_Q_NOFORCE)))) { 355 /* Do not attach JMicrons with single PCI function. */ 356 if (pci_get_vendor(dev) == 0x197b && 357 (pci_read_config(dev, 0xdf, 1) & 0x40) == 0) 358 return (ENXIO); 359 snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 360 ahci_ids[i].name); 361 device_set_desc_copy(dev, buf); 362 return (BUS_PROBE_DEFAULT); 363 } 364 } 365 if (valid != 1) 366 return (ENXIO); 367 device_set_desc_copy(dev, "AHCI SATA controller"); 368 return (BUS_PROBE_DEFAULT); 369 } 370 371 static int 372 ahci_ata_probe(device_t dev) 373 { 374 char buf[64]; 375 int i; 376 uint32_t devid = pci_get_devid(dev); 377 uint8_t revid = pci_get_revid(dev); 378 379 if ((intptr_t)device_get_ivars(dev) >= 0) 380 return (ENXIO); 381 /* Is this a known AHCI chip? */ 382 for (i = 0; ahci_ids[i].id != 0; i++) { 383 if (ahci_ids[i].id == devid && 384 ahci_ids[i].rev <= revid) { 385 snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 386 ahci_ids[i].name); 387 device_set_desc_copy(dev, buf); 388 return (BUS_PROBE_DEFAULT); 389 } 390 } 391 device_set_desc_copy(dev, "AHCI SATA controller"); 392 return (BUS_PROBE_DEFAULT); 393 } 394 395 static int 396 ahci_pci_read_msix_bars(device_t dev, uint8_t *table_bar, uint8_t *pba_bar) 397 { 398 int cap_offset = 0, ret; 399 uint32_t val; 400 401 if ((table_bar == NULL) || (pba_bar == NULL)) 402 return (EINVAL); 403 404 ret = pci_find_cap(dev, PCIY_MSIX, &cap_offset); 405 if (ret != 0) 406 return (EINVAL); 407 408 val = pci_read_config(dev, cap_offset + PCIR_MSIX_TABLE, 4); 409 *table_bar = PCIR_BAR(val & PCIM_MSIX_BIR_MASK); 410 411 val = pci_read_config(dev, cap_offset + PCIR_MSIX_PBA, 4); 412 *pba_bar = PCIR_BAR(val & PCIM_MSIX_BIR_MASK); 413 414 return (0); 415 } 416 417 static int 418 ahci_pci_attach(device_t dev) 419 { 420 struct ahci_controller *ctlr = device_get_softc(dev); 421 int error, i; 422 uint32_t devid = pci_get_devid(dev); 423 uint8_t revid = pci_get_revid(dev); 424 int msi_count, msix_count; 425 uint8_t table_bar = 0, pba_bar = 0; 426 427 msi_count = pci_msi_count(dev); 428 msix_count = pci_msix_count(dev); 429 430 i = 0; 431 while (ahci_ids[i].id != 0 && 432 (ahci_ids[i].id != devid || 433 ahci_ids[i].rev > revid)) 434 i++; 435 ctlr->quirks = ahci_ids[i].quirks; 436 /* Limit speed for my onboard JMicron external port. 437 * It is not eSATA really, limit to SATA 1 */ 438 if (pci_get_devid(dev) == 0x2363197b && 439 pci_get_subvendor(dev) == 0x1043 && 440 pci_get_subdevice(dev) == 0x81e4) 441 ctlr->quirks |= AHCI_Q_SATA1_UNIT0; 442 resource_int_value(device_get_name(dev), device_get_unit(dev), 443 "quirks", &ctlr->quirks); 444 ctlr->vendorid = pci_get_vendor(dev); 445 ctlr->deviceid = pci_get_device(dev); 446 ctlr->subvendorid = pci_get_subvendor(dev); 447 ctlr->subdeviceid = pci_get_subdevice(dev); 448 449 /* Default AHCI Base Address is BAR(5), Cavium uses BAR(0) */ 450 if (ctlr->quirks & AHCI_Q_ABAR0) 451 ctlr->r_rid = PCIR_BAR(0); 452 else 453 ctlr->r_rid = PCIR_BAR(5); 454 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 455 &ctlr->r_rid, RF_ACTIVE))) 456 return ENXIO; 457 458 if (ctlr->quirks & AHCI_Q_NOMSIX) 459 msix_count = 0; 460 461 /* Read MSI-x BAR IDs if supported */ 462 if (msix_count > 0) { 463 error = ahci_pci_read_msix_bars(dev, &table_bar, &pba_bar); 464 if (error == 0) { 465 ctlr->r_msix_tab_rid = table_bar; 466 ctlr->r_msix_pba_rid = pba_bar; 467 } else { 468 /* Failed to read BARs, disable MSI-x */ 469 msix_count = 0; 470 } 471 } 472 473 /* Allocate resources for MSI-x table and PBA */ 474 if (msix_count > 0) { 475 /* 476 * Allocate new MSI-x table only if not 477 * allocated before. 478 */ 479 ctlr->r_msix_table = NULL; 480 if (ctlr->r_msix_tab_rid != ctlr->r_rid) { 481 /* Separate BAR for MSI-x */ 482 ctlr->r_msix_table = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 483 &ctlr->r_msix_tab_rid, RF_ACTIVE); 484 if (ctlr->r_msix_table == NULL) { 485 ahci_free_mem(dev); 486 return (ENXIO); 487 } 488 } 489 490 /* 491 * Allocate new PBA table only if not 492 * allocated before. 493 */ 494 ctlr->r_msix_pba = NULL; 495 if ((ctlr->r_msix_pba_rid != ctlr->r_msix_tab_rid) && 496 (ctlr->r_msix_pba_rid != ctlr->r_rid)) { 497 /* Separate BAR for PBA */ 498 ctlr->r_msix_pba = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 499 &ctlr->r_msix_pba_rid, RF_ACTIVE); 500 if (ctlr->r_msix_pba == NULL) { 501 ahci_free_mem(dev); 502 return (ENXIO); 503 } 504 } 505 } 506 507 pci_enable_busmaster(dev); 508 /* Reset controller */ 509 if ((error = ahci_pci_ctlr_reset(dev)) != 0) { 510 ahci_free_mem(dev); 511 return (error); 512 } 513 514 /* Setup interrupts. */ 515 516 /* Setup MSI register parameters */ 517 /* Process hints. */ 518 if (ctlr->quirks & AHCI_Q_NOMSI) 519 ctlr->msi = 0; 520 else if (ctlr->quirks & AHCI_Q_1MSI) 521 ctlr->msi = 1; 522 else 523 ctlr->msi = 2; 524 resource_int_value(device_get_name(dev), 525 device_get_unit(dev), "msi", &ctlr->msi); 526 ctlr->numirqs = 1; 527 if (msi_count == 0 && msix_count == 0) 528 ctlr->msi = 0; 529 if (ctlr->msi < 0) 530 ctlr->msi = 0; 531 else if (ctlr->msi == 1) { 532 msi_count = min(1, msi_count); 533 msix_count = min(1, msix_count); 534 } else if (ctlr->msi > 1) 535 ctlr->msi = 2; 536 537 /* Allocate MSI/MSI-x if needed/present. */ 538 if (ctlr->msi > 0) { 539 error = ENXIO; 540 541 /* Try to allocate MSI-x first */ 542 if (msix_count > 0) { 543 error = pci_alloc_msix(dev, &msix_count); 544 if (error == 0) 545 ctlr->numirqs = msix_count; 546 } 547 548 /* 549 * Try to allocate MSI if msi_count is greater than 0 550 * and if MSI-x allocation failed. 551 */ 552 if ((error != 0) && (msi_count > 0)) { 553 error = pci_alloc_msi(dev, &msi_count); 554 if (error == 0) 555 ctlr->numirqs = msi_count; 556 } 557 558 /* Both MSI and MSI-x allocations failed */ 559 if (error != 0) { 560 ctlr->msi = 0; 561 device_printf(dev, "Failed to allocate MSI/MSI-x, " 562 "falling back to INTx\n"); 563 } 564 } 565 566 error = ahci_attach(dev); 567 if (error != 0) { 568 if (ctlr->msi > 0) 569 pci_release_msi(dev); 570 ahci_free_mem(dev); 571 } 572 return error; 573 } 574 575 static int 576 ahci_pci_detach(device_t dev) 577 { 578 579 ahci_detach(dev); 580 pci_release_msi(dev); 581 return (0); 582 } 583 584 static int 585 ahci_pci_suspend(device_t dev) 586 { 587 struct ahci_controller *ctlr = device_get_softc(dev); 588 589 bus_generic_suspend(dev); 590 /* Disable interupts, so the state change(s) doesn't trigger */ 591 ATA_OUTL(ctlr->r_mem, AHCI_GHC, 592 ATA_INL(ctlr->r_mem, AHCI_GHC) & (~AHCI_GHC_IE)); 593 return 0; 594 } 595 596 static int 597 ahci_pci_resume(device_t dev) 598 { 599 int res; 600 601 if ((res = ahci_pci_ctlr_reset(dev)) != 0) 602 return (res); 603 ahci_ctlr_setup(dev); 604 return (bus_generic_resume(dev)); 605 } 606 607 devclass_t ahci_devclass; 608 static device_method_t ahci_methods[] = { 609 DEVMETHOD(device_probe, ahci_probe), 610 DEVMETHOD(device_attach, ahci_pci_attach), 611 DEVMETHOD(device_detach, ahci_pci_detach), 612 DEVMETHOD(device_suspend, ahci_pci_suspend), 613 DEVMETHOD(device_resume, ahci_pci_resume), 614 DEVMETHOD(bus_print_child, ahci_print_child), 615 DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 616 DEVMETHOD(bus_release_resource, ahci_release_resource), 617 DEVMETHOD(bus_setup_intr, ahci_setup_intr), 618 DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 619 DEVMETHOD(bus_child_location_str, ahci_child_location_str), 620 DEVMETHOD(bus_get_dma_tag, ahci_get_dma_tag), 621 DEVMETHOD_END 622 }; 623 static driver_t ahci_driver = { 624 "ahci", 625 ahci_methods, 626 sizeof(struct ahci_controller) 627 }; 628 DRIVER_MODULE(ahci, pci, ahci_driver, ahci_devclass, NULL, NULL); 629 static device_method_t ahci_ata_methods[] = { 630 DEVMETHOD(device_probe, ahci_ata_probe), 631 DEVMETHOD(device_attach, ahci_pci_attach), 632 DEVMETHOD(device_detach, ahci_pci_detach), 633 DEVMETHOD(device_suspend, ahci_pci_suspend), 634 DEVMETHOD(device_resume, ahci_pci_resume), 635 DEVMETHOD(bus_print_child, ahci_print_child), 636 DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 637 DEVMETHOD(bus_release_resource, ahci_release_resource), 638 DEVMETHOD(bus_setup_intr, ahci_setup_intr), 639 DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 640 DEVMETHOD(bus_child_location_str, ahci_child_location_str), 641 DEVMETHOD_END 642 }; 643 static driver_t ahci_ata_driver = { 644 "ahci", 645 ahci_ata_methods, 646 sizeof(struct ahci_controller) 647 }; 648 DRIVER_MODULE(ahci, atapci, ahci_ata_driver, ahci_devclass, NULL, NULL); 649