xref: /freebsd/sys/dev/ahci/ahci_pci.c (revision 47dd1d1b619cc035b82b49a91a25544309ff95ae)
1 /*-
2  * Copyright (c) 2009-2012 Alexander Motin <mav@FreeBSD.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer,
10  *    without modification, immediately at the beginning of the file.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 #include <sys/param.h>
31 #include <sys/module.h>
32 #include <sys/systm.h>
33 #include <sys/kernel.h>
34 #include <sys/bus.h>
35 #include <sys/conf.h>
36 #include <sys/endian.h>
37 #include <sys/malloc.h>
38 #include <sys/lock.h>
39 #include <sys/mutex.h>
40 #include <machine/stdarg.h>
41 #include <machine/resource.h>
42 #include <machine/bus.h>
43 #include <sys/rman.h>
44 #include <dev/pci/pcivar.h>
45 #include <dev/pci/pcireg.h>
46 #include "ahci.h"
47 
48 static int force_ahci = 1;
49 TUNABLE_INT("hw.ahci.force", &force_ahci);
50 
51 static const struct {
52 	uint32_t	id;
53 	uint8_t		rev;
54 	const char	*name;
55 	int		quirks;
56 } ahci_ids[] = {
57 	{0x43801002, 0x00, "AMD SB600",
58 	    AHCI_Q_NOMSI | AHCI_Q_ATI_PMP_BUG | AHCI_Q_MAXIO_64K},
59 	{0x43901002, 0x00, "AMD SB7x0/SB8x0/SB9x0",
60 	    AHCI_Q_ATI_PMP_BUG | AHCI_Q_1MSI},
61 	{0x43911002, 0x00, "AMD SB7x0/SB8x0/SB9x0",
62 	    AHCI_Q_ATI_PMP_BUG | AHCI_Q_1MSI},
63 	{0x43921002, 0x00, "AMD SB7x0/SB8x0/SB9x0",
64 	    AHCI_Q_ATI_PMP_BUG | AHCI_Q_1MSI},
65 	{0x43931002, 0x00, "AMD SB7x0/SB8x0/SB9x0",
66 	    AHCI_Q_ATI_PMP_BUG | AHCI_Q_1MSI},
67 	{0x43941002, 0x00, "AMD SB7x0/SB8x0/SB9x0",
68 	    AHCI_Q_ATI_PMP_BUG | AHCI_Q_1MSI},
69 	/* Not sure SB8x0/SB9x0 needs this quirk. Be conservative though */
70 	{0x43951002, 0x00, "AMD SB8x0/SB9x0",	AHCI_Q_ATI_PMP_BUG},
71 	{0x43b61022, 0x00, "AMD X399",		0},
72 	{0x43b71022, 0x00, "AMD 300 Series",	0},
73 	{0x78001022, 0x00, "AMD Hudson-2",	0},
74 	{0x78011022, 0x00, "AMD Hudson-2",	0},
75 	{0x78021022, 0x00, "AMD Hudson-2",	0},
76 	{0x78031022, 0x00, "AMD Hudson-2",	0},
77 	{0x78041022, 0x00, "AMD Hudson-2",	0},
78 	{0x79001022, 0x00, "AMD KERNCZ",	0},
79 	{0x79011022, 0x00, "AMD KERNCZ",	0},
80 	{0x79021022, 0x00, "AMD KERNCZ",	0},
81 	{0x79031022, 0x00, "AMD KERNCZ",	0},
82 	{0x79041022, 0x00, "AMD KERNCZ",	0},
83 	{0x06011b21, 0x00, "ASMedia ASM1060",	AHCI_Q_NOCCS|AHCI_Q_NOAUX},
84 	{0x06021b21, 0x00, "ASMedia ASM1060",	AHCI_Q_NOCCS|AHCI_Q_NOAUX},
85 	{0x06111b21, 0x00, "ASMedia ASM1061",	AHCI_Q_NOCCS|AHCI_Q_NOAUX},
86 	{0x06121b21, 0x00, "ASMedia ASM1062",	AHCI_Q_NOCCS|AHCI_Q_NOAUX},
87 	{0x06201b21, 0x00, "ASMedia ASM106x",	AHCI_Q_NOCCS|AHCI_Q_NOAUX},
88 	{0x06211b21, 0x00, "ASMedia ASM106x",	AHCI_Q_NOCCS|AHCI_Q_NOAUX},
89 	{0x06221b21, 0x00, "ASMedia ASM106x",	AHCI_Q_NOCCS|AHCI_Q_NOAUX},
90 	{0x06241b21, 0x00, "ASMedia ASM106x",	AHCI_Q_NOCCS|AHCI_Q_NOAUX},
91 	{0x06251b21, 0x00, "ASMedia ASM106x",	AHCI_Q_NOCCS|AHCI_Q_NOAUX},
92 	{0x26528086, 0x00, "Intel ICH6",	AHCI_Q_NOFORCE},
93 	{0x26538086, 0x00, "Intel ICH6M",	AHCI_Q_NOFORCE},
94 	{0x26818086, 0x00, "Intel ESB2",	0},
95 	{0x26828086, 0x00, "Intel ESB2",	0},
96 	{0x26838086, 0x00, "Intel ESB2",	0},
97 	{0x27c18086, 0x00, "Intel ICH7",	0},
98 	{0x27c38086, 0x00, "Intel ICH7",	0},
99 	{0x27c58086, 0x00, "Intel ICH7M",	0},
100 	{0x27c68086, 0x00, "Intel ICH7M",	0},
101 	{0x28218086, 0x00, "Intel ICH8",	0},
102 	{0x28228086, 0x00, "Intel ICH8+ (RAID)",	0},
103 	{0x28248086, 0x00, "Intel ICH8",	0},
104 	{0x28298086, 0x00, "Intel ICH8M",	0},
105 	{0x282a8086, 0x00, "Intel ICH8M+ (RAID)",	0},
106 	{0x29228086, 0x00, "Intel ICH9",	0},
107 	{0x29238086, 0x00, "Intel ICH9",	0},
108 	{0x29248086, 0x00, "Intel ICH9",	0},
109 	{0x29258086, 0x00, "Intel ICH9",	0},
110 	{0x29278086, 0x00, "Intel ICH9",	0},
111 	{0x29298086, 0x00, "Intel ICH9M",	0},
112 	{0x292a8086, 0x00, "Intel ICH9M",	0},
113 	{0x292b8086, 0x00, "Intel ICH9M",	0},
114 	{0x292c8086, 0x00, "Intel ICH9M",	0},
115 	{0x292f8086, 0x00, "Intel ICH9M",	0},
116 	{0x294d8086, 0x00, "Intel ICH9",	0},
117 	{0x294e8086, 0x00, "Intel ICH9M",	0},
118 	{0x3a058086, 0x00, "Intel ICH10 (RAID)",	0},
119 	{0x3a228086, 0x00, "Intel ICH10",	0},
120 	{0x3a258086, 0x00, "Intel ICH10 (RAID)",	0},
121 	{0x3b228086, 0x00, "Intel Ibex Peak",	0},
122 	{0x3b238086, 0x00, "Intel Ibex Peak",	0},
123 	{0x3b258086, 0x00, "Intel Ibex Peak (RAID)",	0},
124 	{0x3b298086, 0x00, "Intel Ibex Peak-M",	0},
125 	{0x3b2c8086, 0x00, "Intel Ibex Peak-M (RAID)",	0},
126 	{0x3b2f8086, 0x00, "Intel Ibex Peak-M",	0},
127 	{0x19b08086, 0x00, "Intel Denverton",	0},
128 	{0x19b18086, 0x00, "Intel Denverton",	0},
129 	{0x19b28086, 0x00, "Intel Denverton",	0},
130 	{0x19b38086, 0x00, "Intel Denverton",	0},
131 	{0x19b48086, 0x00, "Intel Denverton",	0},
132 	{0x19b58086, 0x00, "Intel Denverton",	0},
133 	{0x19b68086, 0x00, "Intel Denverton",	0},
134 	{0x19b78086, 0x00, "Intel Denverton",	0},
135 	{0x19be8086, 0x00, "Intel Denverton",	0},
136 	{0x19bf8086, 0x00, "Intel Denverton",	0},
137 	{0x19c08086, 0x00, "Intel Denverton",	0},
138 	{0x19c18086, 0x00, "Intel Denverton",	0},
139 	{0x19c28086, 0x00, "Intel Denverton",	0},
140 	{0x19c38086, 0x00, "Intel Denverton",	0},
141 	{0x19c48086, 0x00, "Intel Denverton",	0},
142 	{0x19c58086, 0x00, "Intel Denverton",	0},
143 	{0x19c68086, 0x00, "Intel Denverton",	0},
144 	{0x19c78086, 0x00, "Intel Denverton",	0},
145 	{0x19ce8086, 0x00, "Intel Denverton",	0},
146 	{0x19cf8086, 0x00, "Intel Denverton",	0},
147 	{0x1c028086, 0x00, "Intel Cougar Point",	0},
148 	{0x1c038086, 0x00, "Intel Cougar Point",	0},
149 	{0x1c048086, 0x00, "Intel Cougar Point (RAID)",	0},
150 	{0x1c058086, 0x00, "Intel Cougar Point (RAID)",	0},
151 	{0x1c068086, 0x00, "Intel Cougar Point (RAID)",	0},
152 	{0x1d028086, 0x00, "Intel Patsburg",	0},
153 	{0x1d048086, 0x00, "Intel Patsburg",	0},
154 	{0x1d068086, 0x00, "Intel Patsburg",	0},
155 	{0x28268086, 0x00, "Intel Patsburg+ (RAID)",	0},
156 	{0x1e028086, 0x00, "Intel Panther Point",	0},
157 	{0x1e038086, 0x00, "Intel Panther Point",	0},
158 	{0x1e048086, 0x00, "Intel Panther Point (RAID)",	0},
159 	{0x1e058086, 0x00, "Intel Panther Point (RAID)",	0},
160 	{0x1e068086, 0x00, "Intel Panther Point (RAID)",	0},
161 	{0x1e078086, 0x00, "Intel Panther Point (RAID)",	0},
162 	{0x1e0e8086, 0x00, "Intel Panther Point (RAID)",	0},
163 	{0x1e0f8086, 0x00, "Intel Panther Point (RAID)",	0},
164 	{0x1f228086, 0x00, "Intel Avoton",	0},
165 	{0x1f238086, 0x00, "Intel Avoton",	0},
166 	{0x1f248086, 0x00, "Intel Avoton (RAID)",	0},
167 	{0x1f258086, 0x00, "Intel Avoton (RAID)",	0},
168 	{0x1f268086, 0x00, "Intel Avoton (RAID)",	0},
169 	{0x1f278086, 0x00, "Intel Avoton (RAID)",	0},
170 	{0x1f2e8086, 0x00, "Intel Avoton (RAID)",	0},
171 	{0x1f2f8086, 0x00, "Intel Avoton (RAID)",	0},
172 	{0x1f328086, 0x00, "Intel Avoton",	0},
173 	{0x1f338086, 0x00, "Intel Avoton",	0},
174 	{0x1f348086, 0x00, "Intel Avoton (RAID)",	0},
175 	{0x1f358086, 0x00, "Intel Avoton (RAID)",	0},
176 	{0x1f368086, 0x00, "Intel Avoton (RAID)",	0},
177 	{0x1f378086, 0x00, "Intel Avoton (RAID)",	0},
178 	{0x1f3e8086, 0x00, "Intel Avoton (RAID)",	0},
179 	{0x1f3f8086, 0x00, "Intel Avoton (RAID)",	0},
180 	{0x23a38086, 0x00, "Intel Coleto Creek",	0},
181 	{0x8c028086, 0x00, "Intel Lynx Point",	0},
182 	{0x8c038086, 0x00, "Intel Lynx Point",	0},
183 	{0x8c048086, 0x00, "Intel Lynx Point (RAID)",	0},
184 	{0x8c058086, 0x00, "Intel Lynx Point (RAID)",	0},
185 	{0x8c068086, 0x00, "Intel Lynx Point (RAID)",	0},
186 	{0x8c078086, 0x00, "Intel Lynx Point (RAID)",	0},
187 	{0x8c0e8086, 0x00, "Intel Lynx Point (RAID)",	0},
188 	{0x8c0f8086, 0x00, "Intel Lynx Point (RAID)",	0},
189 	{0x8c828086, 0x00, "Intel Wildcat Point",	0},
190 	{0x8c838086, 0x00, "Intel Wildcat Point",	0},
191 	{0x8c848086, 0x00, "Intel Wildcat Point (RAID)",	0},
192 	{0x8c858086, 0x00, "Intel Wildcat Point (RAID)",	0},
193 	{0x8c868086, 0x00, "Intel Wildcat Point (RAID)",	0},
194 	{0x8c878086, 0x00, "Intel Wildcat Point (RAID)",	0},
195 	{0x8c8e8086, 0x00, "Intel Wildcat Point (RAID)",	0},
196 	{0x8c8f8086, 0x00, "Intel Wildcat Point (RAID)",	0},
197 	{0x8d028086, 0x00, "Intel Wellsburg",	0},
198 	{0x8d048086, 0x00, "Intel Wellsburg (RAID)",	0},
199 	{0x8d068086, 0x00, "Intel Wellsburg (RAID)",	0},
200 	{0x8d628086, 0x00, "Intel Wellsburg",	0},
201 	{0x8d648086, 0x00, "Intel Wellsburg (RAID)",	0},
202 	{0x8d668086, 0x00, "Intel Wellsburg (RAID)",	0},
203 	{0x8d6e8086, 0x00, "Intel Wellsburg (RAID)",	0},
204 	{0x28238086, 0x00, "Intel Wellsburg+ (RAID)",	0},
205 	{0x28278086, 0x00, "Intel Wellsburg+ (RAID)",	0},
206 	{0x9c028086, 0x00, "Intel Lynx Point-LP",	0},
207 	{0x9c038086, 0x00, "Intel Lynx Point-LP",	0},
208 	{0x9c048086, 0x00, "Intel Lynx Point-LP (RAID)",	0},
209 	{0x9c058086, 0x00, "Intel Lynx Point-LP (RAID)",	0},
210 	{0x9c068086, 0x00, "Intel Lynx Point-LP (RAID)",	0},
211 	{0x9c078086, 0x00, "Intel Lynx Point-LP (RAID)",	0},
212 	{0x9c0e8086, 0x00, "Intel Lynx Point-LP (RAID)",	0},
213 	{0x9c0f8086, 0x00, "Intel Lynx Point-LP (RAID)",	0},
214 	{0x9d038086, 0x00, "Intel Sunrise Point-LP",	0},
215 	{0x9d058086, 0x00, "Intel Sunrise Point-LP (RAID)",	0},
216 	{0x9d078086, 0x00, "Intel Sunrise Point-LP (RAID)",	0},
217 	{0xa1028086, 0x00, "Intel Sunrise Point",	0},
218 	{0xa1038086, 0x00, "Intel Sunrise Point",	0},
219 	{0xa1058086, 0x00, "Intel Sunrise Point (RAID)",	0},
220 	{0xa1068086, 0x00, "Intel Sunrise Point (RAID)",	0},
221 	{0xa1078086, 0x00, "Intel Sunrise Point (RAID)",	0},
222 	{0xa10f8086, 0x00, "Intel Sunrise Point (RAID)",	0},
223 	{0xa1828086, 0x00, "Intel Lewisburg",	0},
224 	{0xa1868086, 0x00, "Intel Lewisburg (RAID)",	0},
225 	{0xa1d28086, 0x00, "Intel Lewisburg",	0},
226 	{0xa1d68086, 0x00, "Intel Lewisburg (RAID)",	0},
227 	{0xa2028086, 0x00, "Intel Lewisburg",	0},
228 	{0xa2068086, 0x00, "Intel Lewisburg (RAID)",	0},
229 	{0xa2528086, 0x00, "Intel Lewisburg",	0},
230 	{0xa2568086, 0x00, "Intel Lewisburg (RAID)",	0},
231 	{0xa2828086, 0x00, "Intel Union Point",	0},
232 	{0xa2868086, 0x00, "Intel Union Point (RAID)",	0},
233 	{0xa28e8086, 0x00, "Intel Union Point (RAID)",	0},
234 	{0x23238086, 0x00, "Intel DH89xxCC",	0},
235 	{0x2360197b, 0x00, "JMicron JMB360",	0},
236 	{0x2361197b, 0x00, "JMicron JMB361",	AHCI_Q_NOFORCE | AHCI_Q_1CH},
237 	{0x2362197b, 0x00, "JMicron JMB362",	0},
238 	{0x2363197b, 0x00, "JMicron JMB363",	AHCI_Q_NOFORCE},
239 	{0x2365197b, 0x00, "JMicron JMB365",	AHCI_Q_NOFORCE},
240 	{0x2366197b, 0x00, "JMicron JMB366",	AHCI_Q_NOFORCE},
241 	{0x2368197b, 0x00, "JMicron JMB368",	AHCI_Q_NOFORCE},
242 	{0x611111ab, 0x00, "Marvell 88SE6111",	AHCI_Q_NOFORCE | AHCI_Q_NOPMP |
243 	    AHCI_Q_1CH | AHCI_Q_EDGEIS},
244 	{0x612111ab, 0x00, "Marvell 88SE6121",	AHCI_Q_NOFORCE | AHCI_Q_NOPMP |
245 	    AHCI_Q_2CH | AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT},
246 	{0x614111ab, 0x00, "Marvell 88SE6141",	AHCI_Q_NOFORCE | AHCI_Q_NOPMP |
247 	    AHCI_Q_4CH | AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT},
248 	{0x614511ab, 0x00, "Marvell 88SE6145",	AHCI_Q_NOFORCE | AHCI_Q_NOPMP |
249 	    AHCI_Q_4CH | AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT},
250 	{0x91201b4b, 0x00, "Marvell 88SE912x",	AHCI_Q_EDGEIS},
251 	{0x91231b4b, 0x11, "Marvell 88SE912x",	AHCI_Q_ALTSIG},
252 	{0x91231b4b, 0x00, "Marvell 88SE912x",	AHCI_Q_EDGEIS|AHCI_Q_SATA2},
253 	{0x91251b4b, 0x00, "Marvell 88SE9125",	0},
254 	{0x91281b4b, 0x00, "Marvell 88SE9128",	AHCI_Q_ALTSIG},
255 	{0x91301b4b, 0x00, "Marvell 88SE9130",  AHCI_Q_ALTSIG},
256 	{0x91721b4b, 0x00, "Marvell 88SE9172",	0},
257 	{0x91821b4b, 0x00, "Marvell 88SE9182",	0},
258 	{0x91831b4b, 0x00, "Marvell 88SS9183",	0},
259 	{0x91a01b4b, 0x00, "Marvell 88SE91Ax",	0},
260 	{0x92151b4b, 0x00, "Marvell 88SE9215",  0},
261 	{0x92201b4b, 0x00, "Marvell 88SE9220",  AHCI_Q_ALTSIG},
262 	{0x92301b4b, 0x00, "Marvell 88SE9230",  AHCI_Q_ALTSIG},
263 	{0x92351b4b, 0x00, "Marvell 88SE9235",  0},
264 	{0x06201103, 0x00, "HighPoint RocketRAID 620",	0},
265 	{0x06201b4b, 0x00, "HighPoint RocketRAID 620",	0},
266 	{0x06221103, 0x00, "HighPoint RocketRAID 622",	0},
267 	{0x06221b4b, 0x00, "HighPoint RocketRAID 622",	0},
268 	{0x06401103, 0x00, "HighPoint RocketRAID 640",	0},
269 	{0x06401b4b, 0x00, "HighPoint RocketRAID 640",	0},
270 	{0x06441103, 0x00, "HighPoint RocketRAID 644",	0},
271 	{0x06441b4b, 0x00, "HighPoint RocketRAID 644",	0},
272 	{0x06411103, 0x00, "HighPoint RocketRAID 640L",	0},
273 	{0x06421103, 0x00, "HighPoint RocketRAID 642L",	0},
274 	{0x06451103, 0x00, "HighPoint RocketRAID 644L",	0},
275 	{0x044c10de, 0x00, "NVIDIA MCP65",	AHCI_Q_NOAA},
276 	{0x044d10de, 0x00, "NVIDIA MCP65",	AHCI_Q_NOAA},
277 	{0x044e10de, 0x00, "NVIDIA MCP65",	AHCI_Q_NOAA},
278 	{0x044f10de, 0x00, "NVIDIA MCP65",	AHCI_Q_NOAA},
279 	{0x045c10de, 0x00, "NVIDIA MCP65",	AHCI_Q_NOAA},
280 	{0x045d10de, 0x00, "NVIDIA MCP65",	AHCI_Q_NOAA},
281 	{0x045e10de, 0x00, "NVIDIA MCP65",	AHCI_Q_NOAA},
282 	{0x045f10de, 0x00, "NVIDIA MCP65",	AHCI_Q_NOAA},
283 	{0x055010de, 0x00, "NVIDIA MCP67",	AHCI_Q_NOAA},
284 	{0x055110de, 0x00, "NVIDIA MCP67",	AHCI_Q_NOAA},
285 	{0x055210de, 0x00, "NVIDIA MCP67",	AHCI_Q_NOAA},
286 	{0x055310de, 0x00, "NVIDIA MCP67",	AHCI_Q_NOAA},
287 	{0x055410de, 0x00, "NVIDIA MCP67",	AHCI_Q_NOAA},
288 	{0x055510de, 0x00, "NVIDIA MCP67",	AHCI_Q_NOAA},
289 	{0x055610de, 0x00, "NVIDIA MCP67",	AHCI_Q_NOAA},
290 	{0x055710de, 0x00, "NVIDIA MCP67",	AHCI_Q_NOAA},
291 	{0x055810de, 0x00, "NVIDIA MCP67",	AHCI_Q_NOAA},
292 	{0x055910de, 0x00, "NVIDIA MCP67",	AHCI_Q_NOAA},
293 	{0x055A10de, 0x00, "NVIDIA MCP67",	AHCI_Q_NOAA},
294 	{0x055B10de, 0x00, "NVIDIA MCP67",	AHCI_Q_NOAA},
295 	{0x058410de, 0x00, "NVIDIA MCP67",	AHCI_Q_NOAA},
296 	{0x07f010de, 0x00, "NVIDIA MCP73",	AHCI_Q_NOAA},
297 	{0x07f110de, 0x00, "NVIDIA MCP73",	AHCI_Q_NOAA},
298 	{0x07f210de, 0x00, "NVIDIA MCP73",	AHCI_Q_NOAA},
299 	{0x07f310de, 0x00, "NVIDIA MCP73",	AHCI_Q_NOAA},
300 	{0x07f410de, 0x00, "NVIDIA MCP73",	AHCI_Q_NOAA},
301 	{0x07f510de, 0x00, "NVIDIA MCP73",	AHCI_Q_NOAA},
302 	{0x07f610de, 0x00, "NVIDIA MCP73",	AHCI_Q_NOAA},
303 	{0x07f710de, 0x00, "NVIDIA MCP73",	AHCI_Q_NOAA},
304 	{0x07f810de, 0x00, "NVIDIA MCP73",	AHCI_Q_NOAA},
305 	{0x07f910de, 0x00, "NVIDIA MCP73",	AHCI_Q_NOAA},
306 	{0x07fa10de, 0x00, "NVIDIA MCP73",	AHCI_Q_NOAA},
307 	{0x07fb10de, 0x00, "NVIDIA MCP73",	AHCI_Q_NOAA},
308 	{0x0ad010de, 0x00, "NVIDIA MCP77",	AHCI_Q_NOAA},
309 	{0x0ad110de, 0x00, "NVIDIA MCP77",	AHCI_Q_NOAA},
310 	{0x0ad210de, 0x00, "NVIDIA MCP77",	AHCI_Q_NOAA},
311 	{0x0ad310de, 0x00, "NVIDIA MCP77",	AHCI_Q_NOAA},
312 	{0x0ad410de, 0x00, "NVIDIA MCP77",	AHCI_Q_NOAA},
313 	{0x0ad510de, 0x00, "NVIDIA MCP77",	AHCI_Q_NOAA},
314 	{0x0ad610de, 0x00, "NVIDIA MCP77",	AHCI_Q_NOAA},
315 	{0x0ad710de, 0x00, "NVIDIA MCP77",	AHCI_Q_NOAA},
316 	{0x0ad810de, 0x00, "NVIDIA MCP77",	AHCI_Q_NOAA},
317 	{0x0ad910de, 0x00, "NVIDIA MCP77",	AHCI_Q_NOAA},
318 	{0x0ada10de, 0x00, "NVIDIA MCP77",	AHCI_Q_NOAA},
319 	{0x0adb10de, 0x00, "NVIDIA MCP77",	AHCI_Q_NOAA},
320 	{0x0ab410de, 0x00, "NVIDIA MCP79",	AHCI_Q_NOAA},
321 	{0x0ab510de, 0x00, "NVIDIA MCP79",	AHCI_Q_NOAA},
322 	{0x0ab610de, 0x00, "NVIDIA MCP79",	AHCI_Q_NOAA},
323 	{0x0ab710de, 0x00, "NVIDIA MCP79",	AHCI_Q_NOAA},
324 	{0x0ab810de, 0x00, "NVIDIA MCP79",	AHCI_Q_NOAA},
325 	{0x0ab910de, 0x00, "NVIDIA MCP79",	AHCI_Q_NOAA},
326 	{0x0aba10de, 0x00, "NVIDIA MCP79",	AHCI_Q_NOAA},
327 	{0x0abb10de, 0x00, "NVIDIA MCP79",	AHCI_Q_NOAA},
328 	{0x0abc10de, 0x00, "NVIDIA MCP79",	AHCI_Q_NOAA},
329 	{0x0abd10de, 0x00, "NVIDIA MCP79",	AHCI_Q_NOAA},
330 	{0x0abe10de, 0x00, "NVIDIA MCP79",	AHCI_Q_NOAA},
331 	{0x0abf10de, 0x00, "NVIDIA MCP79",	AHCI_Q_NOAA},
332 	{0x0d8410de, 0x00, "NVIDIA MCP89",	AHCI_Q_NOAA},
333 	{0x0d8510de, 0x00, "NVIDIA MCP89",	AHCI_Q_NOFORCE|AHCI_Q_NOAA},
334 	{0x0d8610de, 0x00, "NVIDIA MCP89",	AHCI_Q_NOAA},
335 	{0x0d8710de, 0x00, "NVIDIA MCP89",	AHCI_Q_NOAA},
336 	{0x0d8810de, 0x00, "NVIDIA MCP89",	AHCI_Q_NOAA},
337 	{0x0d8910de, 0x00, "NVIDIA MCP89",	AHCI_Q_NOAA},
338 	{0x0d8a10de, 0x00, "NVIDIA MCP89",	AHCI_Q_NOAA},
339 	{0x0d8b10de, 0x00, "NVIDIA MCP89",	AHCI_Q_NOAA},
340 	{0x0d8c10de, 0x00, "NVIDIA MCP89",	AHCI_Q_NOAA},
341 	{0x0d8d10de, 0x00, "NVIDIA MCP89",	AHCI_Q_NOAA},
342 	{0x0d8e10de, 0x00, "NVIDIA MCP89",	AHCI_Q_NOAA},
343 	{0x0d8f10de, 0x00, "NVIDIA MCP89",	AHCI_Q_NOAA},
344 	{0x3781105a, 0x00, "Promise TX8660",	0},
345 	{0x33491106, 0x00, "VIA VT8251",	AHCI_Q_NOPMP|AHCI_Q_NONCQ},
346 	{0x62871106, 0x00, "VIA VT8251",	AHCI_Q_NOPMP|AHCI_Q_NONCQ},
347 	{0x11841039, 0x00, "SiS 966",		0},
348 	{0x11851039, 0x00, "SiS 968",		0},
349 	{0x01861039, 0x00, "SiS 968",		0},
350 	{0xa01c177d, 0x00, "ThunderX",		AHCI_Q_ABAR0|AHCI_Q_1MSI},
351 	{0x00311c36, 0x00, "Annapurna",		AHCI_Q_FORCE_PI|AHCI_Q_RESTORE_CAP|AHCI_Q_NOMSIX},
352 	{0x00000000, 0x00, NULL,		0}
353 };
354 
355 static int
356 ahci_pci_ctlr_reset(device_t dev)
357 {
358 
359 	if (pci_read_config(dev, PCIR_DEVVENDOR, 4) == 0x28298086 &&
360 	    (pci_read_config(dev, 0x92, 1) & 0xfe) == 0x04)
361 		pci_write_config(dev, 0x92, 0x01, 1);
362 	return ahci_ctlr_reset(dev);
363 }
364 
365 static int
366 ahci_probe(device_t dev)
367 {
368 	char buf[64];
369 	int i, valid = 0;
370 	uint32_t devid = pci_get_devid(dev);
371 	uint8_t revid = pci_get_revid(dev);
372 
373 	/*
374 	 * Ensure it is not a PCI bridge (some vendors use
375 	 * the same PID and VID in PCI bridge and AHCI cards).
376 	 */
377 	if (pci_get_class(dev) == PCIC_BRIDGE)
378 		return (ENXIO);
379 
380 	/* Is this a possible AHCI candidate? */
381 	if (pci_get_class(dev) == PCIC_STORAGE &&
382 	    pci_get_subclass(dev) == PCIS_STORAGE_SATA &&
383 	    pci_get_progif(dev) == PCIP_STORAGE_SATA_AHCI_1_0)
384 		valid = 1;
385 	else if (pci_get_class(dev) == PCIC_STORAGE &&
386 	    pci_get_subclass(dev) == PCIS_STORAGE_RAID)
387 		valid = 2;
388 	/* Is this a known AHCI chip? */
389 	for (i = 0; ahci_ids[i].id != 0; i++) {
390 		if (ahci_ids[i].id == devid &&
391 		    ahci_ids[i].rev <= revid &&
392 		    (valid || (force_ahci == 1 &&
393 		     !(ahci_ids[i].quirks & AHCI_Q_NOFORCE)))) {
394 			/* Do not attach JMicrons with single PCI function. */
395 			if (pci_get_vendor(dev) == 0x197b &&
396 			    (pci_read_config(dev, 0xdf, 1) & 0x40) == 0)
397 				return (ENXIO);
398 			snprintf(buf, sizeof(buf), "%s AHCI SATA controller",
399 			    ahci_ids[i].name);
400 			device_set_desc_copy(dev, buf);
401 			return (BUS_PROBE_DEFAULT);
402 		}
403 	}
404 	if (valid != 1)
405 		return (ENXIO);
406 	device_set_desc_copy(dev, "AHCI SATA controller");
407 	return (BUS_PROBE_DEFAULT);
408 }
409 
410 static int
411 ahci_ata_probe(device_t dev)
412 {
413 	char buf[64];
414 	int i;
415 	uint32_t devid = pci_get_devid(dev);
416 	uint8_t revid = pci_get_revid(dev);
417 
418 	if ((intptr_t)device_get_ivars(dev) >= 0)
419 		return (ENXIO);
420 	/* Is this a known AHCI chip? */
421 	for (i = 0; ahci_ids[i].id != 0; i++) {
422 		if (ahci_ids[i].id == devid &&
423 		    ahci_ids[i].rev <= revid) {
424 			snprintf(buf, sizeof(buf), "%s AHCI SATA controller",
425 			    ahci_ids[i].name);
426 			device_set_desc_copy(dev, buf);
427 			return (BUS_PROBE_DEFAULT);
428 		}
429 	}
430 	device_set_desc_copy(dev, "AHCI SATA controller");
431 	return (BUS_PROBE_DEFAULT);
432 }
433 
434 static int
435 ahci_pci_read_msix_bars(device_t dev, uint8_t *table_bar, uint8_t *pba_bar)
436 {
437 	int cap_offset = 0, ret;
438 	uint32_t val;
439 
440 	if ((table_bar == NULL) || (pba_bar == NULL))
441 		return (EINVAL);
442 
443 	ret = pci_find_cap(dev, PCIY_MSIX, &cap_offset);
444 	if (ret != 0)
445 		return (EINVAL);
446 
447 	val = pci_read_config(dev, cap_offset + PCIR_MSIX_TABLE, 4);
448 	*table_bar = PCIR_BAR(val & PCIM_MSIX_BIR_MASK);
449 
450 	val = pci_read_config(dev, cap_offset + PCIR_MSIX_PBA, 4);
451 	*pba_bar = PCIR_BAR(val & PCIM_MSIX_BIR_MASK);
452 
453 	return (0);
454 }
455 
456 static int
457 ahci_pci_attach(device_t dev)
458 {
459 	struct ahci_controller *ctlr = device_get_softc(dev);
460 	int	error, i;
461 	uint32_t devid = pci_get_devid(dev);
462 	uint8_t revid = pci_get_revid(dev);
463 	int msi_count, msix_count;
464 	uint8_t table_bar = 0, pba_bar = 0;
465 
466 	msi_count = pci_msi_count(dev);
467 	msix_count = pci_msix_count(dev);
468 
469 	i = 0;
470 	while (ahci_ids[i].id != 0 &&
471 	    (ahci_ids[i].id != devid ||
472 	     ahci_ids[i].rev > revid))
473 		i++;
474 	ctlr->quirks = ahci_ids[i].quirks;
475 	/* Limit speed for my onboard JMicron external port.
476 	 * It is not eSATA really, limit to SATA 1 */
477 	if (pci_get_devid(dev) == 0x2363197b &&
478 	    pci_get_subvendor(dev) == 0x1043 &&
479 	    pci_get_subdevice(dev) == 0x81e4)
480 		ctlr->quirks |= AHCI_Q_SATA1_UNIT0;
481 	resource_int_value(device_get_name(dev), device_get_unit(dev),
482 	    "quirks", &ctlr->quirks);
483 	ctlr->vendorid = pci_get_vendor(dev);
484 	ctlr->deviceid = pci_get_device(dev);
485 	ctlr->subvendorid = pci_get_subvendor(dev);
486 	ctlr->subdeviceid = pci_get_subdevice(dev);
487 
488 	/* Default AHCI Base Address is BAR(5), Cavium uses BAR(0) */
489 	if (ctlr->quirks & AHCI_Q_ABAR0)
490 		ctlr->r_rid = PCIR_BAR(0);
491 	else
492 		ctlr->r_rid = PCIR_BAR(5);
493 	if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
494 	    &ctlr->r_rid, RF_ACTIVE)))
495 		return ENXIO;
496 
497 	if (ctlr->quirks & AHCI_Q_NOMSIX)
498 		msix_count = 0;
499 
500 	/* Read MSI-x BAR IDs if supported */
501 	if (msix_count > 0) {
502 		error = ahci_pci_read_msix_bars(dev, &table_bar, &pba_bar);
503 		if (error == 0) {
504 			ctlr->r_msix_tab_rid = table_bar;
505 			ctlr->r_msix_pba_rid = pba_bar;
506 		} else {
507 			/* Failed to read BARs, disable MSI-x */
508 			msix_count = 0;
509 		}
510 	}
511 
512 	/* Allocate resources for MSI-x table and PBA */
513 	if (msix_count > 0) {
514 		/*
515 		 * Allocate new MSI-x table only if not
516 		 * allocated before.
517 		 */
518 		ctlr->r_msix_table = NULL;
519 		if (ctlr->r_msix_tab_rid != ctlr->r_rid) {
520 			/* Separate BAR for MSI-x */
521 			ctlr->r_msix_table = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
522 			    &ctlr->r_msix_tab_rid, RF_ACTIVE);
523 			if (ctlr->r_msix_table == NULL) {
524 				ahci_free_mem(dev);
525 				return (ENXIO);
526 			}
527 		}
528 
529 		/*
530 		 * Allocate new PBA table only if not
531 		 * allocated before.
532 		 */
533 		ctlr->r_msix_pba = NULL;
534 		if ((ctlr->r_msix_pba_rid != ctlr->r_msix_tab_rid) &&
535 		    (ctlr->r_msix_pba_rid != ctlr->r_rid)) {
536 			/* Separate BAR for PBA */
537 			ctlr->r_msix_pba = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
538 			    &ctlr->r_msix_pba_rid, RF_ACTIVE);
539 			if (ctlr->r_msix_pba == NULL) {
540 				ahci_free_mem(dev);
541 				return (ENXIO);
542 			}
543 		}
544 	}
545 
546 	pci_enable_busmaster(dev);
547 	/* Reset controller */
548 	if ((error = ahci_pci_ctlr_reset(dev)) != 0) {
549 		ahci_free_mem(dev);
550 		return (error);
551 	}
552 
553 	/* Setup interrupts. */
554 
555 	/* Setup MSI register parameters */
556 	/* Process hints. */
557 	if (ctlr->quirks & AHCI_Q_NOMSI)
558 		ctlr->msi = 0;
559 	else if (ctlr->quirks & AHCI_Q_1MSI)
560 		ctlr->msi = 1;
561 	else
562 		ctlr->msi = 2;
563 	resource_int_value(device_get_name(dev),
564 	    device_get_unit(dev), "msi", &ctlr->msi);
565 	ctlr->numirqs = 1;
566 	if (msi_count == 0 && msix_count == 0)
567 		ctlr->msi = 0;
568 	if (ctlr->msi < 0)
569 		ctlr->msi = 0;
570 	else if (ctlr->msi == 1) {
571 		msi_count = min(1, msi_count);
572 		msix_count = min(1, msix_count);
573 	} else if (ctlr->msi > 1)
574 		ctlr->msi = 2;
575 
576 	/* Allocate MSI/MSI-x if needed/present. */
577 	if (ctlr->msi > 0) {
578 		error = ENXIO;
579 
580 		/* Try to allocate MSI-x first */
581 		if (msix_count > 0) {
582 			error = pci_alloc_msix(dev, &msix_count);
583 			if (error == 0)
584 				ctlr->numirqs = msix_count;
585 		}
586 
587 		/*
588 		 * Try to allocate MSI if msi_count is greater than 0
589 		 * and if MSI-x allocation failed.
590 		 */
591 		if ((error != 0) && (msi_count > 0)) {
592 			error = pci_alloc_msi(dev, &msi_count);
593 			if (error == 0)
594 				ctlr->numirqs = msi_count;
595 		}
596 
597 		/* Both MSI and MSI-x allocations failed */
598 		if (error != 0) {
599 			ctlr->msi = 0;
600 			device_printf(dev, "Failed to allocate MSI/MSI-x, "
601 			    "falling back to INTx\n");
602 		}
603 	}
604 
605 	error = ahci_attach(dev);
606 	if (error != 0) {
607 		if (ctlr->msi > 0)
608 			pci_release_msi(dev);
609 		ahci_free_mem(dev);
610 	}
611 	return error;
612 }
613 
614 static int
615 ahci_pci_detach(device_t dev)
616 {
617 
618 	ahci_detach(dev);
619 	pci_release_msi(dev);
620 	return (0);
621 }
622 
623 static int
624 ahci_pci_suspend(device_t dev)
625 {
626 	struct ahci_controller *ctlr = device_get_softc(dev);
627 
628 	bus_generic_suspend(dev);
629 	/* Disable interupts, so the state change(s) doesn't trigger */
630 	ATA_OUTL(ctlr->r_mem, AHCI_GHC,
631 	     ATA_INL(ctlr->r_mem, AHCI_GHC) & (~AHCI_GHC_IE));
632 	return 0;
633 }
634 
635 static int
636 ahci_pci_resume(device_t dev)
637 {
638 	int res;
639 
640 	if ((res = ahci_pci_ctlr_reset(dev)) != 0)
641 		return (res);
642 	ahci_ctlr_setup(dev);
643 	return (bus_generic_resume(dev));
644 }
645 
646 static device_method_t ahci_methods[] = {
647 	DEVMETHOD(device_probe,     ahci_probe),
648 	DEVMETHOD(device_attach,    ahci_pci_attach),
649 	DEVMETHOD(device_detach,    ahci_pci_detach),
650 	DEVMETHOD(device_suspend,   ahci_pci_suspend),
651 	DEVMETHOD(device_resume,    ahci_pci_resume),
652 	DEVMETHOD(bus_print_child,  ahci_print_child),
653 	DEVMETHOD(bus_alloc_resource,       ahci_alloc_resource),
654 	DEVMETHOD(bus_release_resource,     ahci_release_resource),
655 	DEVMETHOD(bus_setup_intr,   ahci_setup_intr),
656 	DEVMETHOD(bus_teardown_intr,ahci_teardown_intr),
657 	DEVMETHOD(bus_child_location_str, ahci_child_location_str),
658 	DEVMETHOD(bus_get_dma_tag,  ahci_get_dma_tag),
659 	DEVMETHOD_END
660 };
661 static driver_t ahci_driver = {
662         "ahci",
663         ahci_methods,
664         sizeof(struct ahci_controller)
665 };
666 DRIVER_MODULE(ahci, pci, ahci_driver, ahci_devclass, NULL, NULL);
667 static device_method_t ahci_ata_methods[] = {
668 	DEVMETHOD(device_probe,     ahci_ata_probe),
669 	DEVMETHOD(device_attach,    ahci_pci_attach),
670 	DEVMETHOD(device_detach,    ahci_pci_detach),
671 	DEVMETHOD(device_suspend,   ahci_pci_suspend),
672 	DEVMETHOD(device_resume,    ahci_pci_resume),
673 	DEVMETHOD(bus_print_child,  ahci_print_child),
674 	DEVMETHOD(bus_alloc_resource,       ahci_alloc_resource),
675 	DEVMETHOD(bus_release_resource,     ahci_release_resource),
676 	DEVMETHOD(bus_setup_intr,   ahci_setup_intr),
677 	DEVMETHOD(bus_teardown_intr,ahci_teardown_intr),
678 	DEVMETHOD(bus_child_location_str, ahci_child_location_str),
679 	DEVMETHOD_END
680 };
681 static driver_t ahci_ata_driver = {
682         "ahci",
683         ahci_ata_methods,
684         sizeof(struct ahci_controller)
685 };
686 DRIVER_MODULE(ahci, atapci, ahci_ata_driver, ahci_devclass, NULL, NULL);
687