1 /* 2 * Copyright (c) 2017 Semihalf. 3 * Copyright (c) 2017 Stormshield. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 #include <sys/stdint.h> 30 #include <sys/stddef.h> 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/bus.h> 35 #include <sys/module.h> 36 #include <sys/sysctl.h> 37 #include <sys/rman.h> 38 #include <sys/unistd.h> 39 40 #include <machine/bus.h> 41 #include <machine/resource.h> 42 43 #include <dev/ofw/ofw_bus.h> 44 #include <dev/ofw/ofw_bus_subr.h> 45 46 #include <dev/ahci/ahci.h> 47 48 #define AHCI_VENDOR_SPECIFIC_0_ADDR 0xa0 49 #define AHCI_VENDOR_SPECIFIC_0_DATA 0xa4 50 51 #define AHCI_HC_DEVSTR "Marvell AHCI Controller" 52 #define AHCI_HC_VENDOR "Marvell" 53 54 static device_attach_t ahci_mv_fdt_attach; 55 56 static struct ofw_compat_data compatible_data[] = { 57 {"marvell,armada-380-ahci", true}, 58 {NULL, false} 59 }; 60 61 static void 62 ahci_mv_regret_config(struct ahci_controller *ctlr) 63 { 64 65 /* 66 * Enable the regret bit to allow the SATA unit to regret 67 * a request that didn't receive an acknowledge 68 * and a avoid deadlock 69 */ 70 ATA_OUTL(ctlr->r_mem, AHCI_VENDOR_SPECIFIC_0_ADDR, 0x4); 71 ATA_OUTL(ctlr->r_mem, AHCI_VENDOR_SPECIFIC_0_DATA, 0x80); 72 } 73 74 static int 75 ahci_mv_fdt_probe(device_t dev) 76 { 77 78 if (!ofw_bus_status_okay(dev)) 79 return (ENXIO); 80 81 if (!ofw_bus_search_compatible(dev, compatible_data)->ocd_data) 82 return (ENXIO); 83 84 device_set_desc(dev, AHCI_HC_DEVSTR); 85 86 return (BUS_PROBE_DEFAULT); 87 } 88 89 static int 90 ahci_mv_fdt_attach(device_t dev) 91 { 92 struct ahci_controller *ctlr; 93 int rc; 94 95 ctlr = device_get_softc(dev); 96 ctlr->dev = dev; 97 ctlr->r_rid = 0; 98 ctlr->quirks = AHCI_Q_2CH; 99 ctlr->numirqs = 1; 100 101 if (ofw_bus_is_compatible(dev, "marvell,armada-380-ahci")) 102 ctlr->quirks |= AHCI_Q_MRVL_SR_DEL; 103 104 /* Allocate memory for controller */ 105 ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 106 &ctlr->r_rid, RF_ACTIVE | RF_SHAREABLE); 107 if (ctlr->r_mem == NULL) { 108 device_printf(dev, "Failed to alloc memory for controller\n"); 109 return (ENOMEM); 110 } 111 112 /* Reset controller */ 113 rc = ahci_ctlr_reset(dev); 114 if (rc != 0) { 115 device_printf(dev, "Failed to reset controller\n"); 116 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 117 return (ENXIO); 118 } 119 120 ahci_mv_regret_config(ctlr); 121 122 rc = ahci_attach(dev); 123 if (rc != 0) { 124 device_printf(dev, "Failed to initialize AHCI, with error %d\n", rc); 125 return (ENXIO); 126 } 127 128 return (0); 129 } 130 131 static device_method_t ahci_methods[] = { 132 /* Device interface */ 133 DEVMETHOD(device_probe, ahci_mv_fdt_probe), 134 DEVMETHOD(device_attach, ahci_mv_fdt_attach), 135 DEVMETHOD(device_detach, ahci_detach), 136 DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 137 DEVMETHOD(bus_release_resource, ahci_release_resource), 138 DEVMETHOD(bus_setup_intr, ahci_setup_intr), 139 DEVMETHOD(bus_teardown_intr, ahci_teardown_intr), 140 DEVMETHOD(bus_print_child, ahci_print_child), 141 DEVMETHOD(bus_child_location, ahci_child_location), 142 DEVMETHOD(bus_get_dma_tag, ahci_get_dma_tag), 143 DEVMETHOD_END 144 }; 145 146 static driver_t ahci_driver = { 147 "ahci", 148 ahci_methods, 149 sizeof(struct ahci_controller) 150 }; 151 152 DRIVER_MODULE(ahci_mv, simplebus, ahci_driver, NULL, NULL); 153 DRIVER_MODULE(ahci_mv, ofwbus, ahci_driver, NULL, NULL); 154