1 /*- 2 * Copyright (c) 2000 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include "opt_bus.h" 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/malloc.h> 35 #include <sys/kernel.h> 36 #include <sys/module.h> 37 #include <sys/bus.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/proc.h> 41 42 #include <dev/pci/pcivar.h> 43 #include <dev/pci/pcireg.h> 44 #include <pci/agppriv.h> 45 #include <pci/agpreg.h> 46 47 #include <vm/vm.h> 48 #include <vm/vm_object.h> 49 #include <vm/pmap.h> 50 51 #define REG_GARTCTRL 0 52 #define REG_APSIZE 1 53 #define REG_ATTBASE 2 54 55 struct agp_via_softc { 56 struct agp_softc agp; 57 u_int32_t initial_aperture; /* aperture size at startup */ 58 struct agp_gatt *gatt; 59 int *regs; 60 }; 61 62 static int via_v2_regs[] = { AGP_VIA_GARTCTRL, AGP_VIA_APSIZE, 63 AGP_VIA_ATTBASE }; 64 static int via_v3_regs[] = { AGP3_VIA_GARTCTRL, AGP3_VIA_APSIZE, 65 AGP3_VIA_ATTBASE }; 66 67 static const char* 68 agp_via_match(device_t dev) 69 { 70 if (pci_get_class(dev) != PCIC_BRIDGE 71 || pci_get_subclass(dev) != PCIS_BRIDGE_HOST) 72 return NULL; 73 74 if (agp_find_caps(dev) == 0) 75 return NULL; 76 77 switch (pci_get_devid(dev)) { 78 case 0x01981106: 79 return ("VIA 8763 (P4X600) host to PCI bridge"); 80 case 0x02591106: 81 return ("VIA PM800/PN800/PM880/PN880 host to PCI bridge"); 82 case 0x02691106: 83 return ("VIA KT880 host to PCI bridge"); 84 case 0x02961106: 85 return ("VIA 3296 (P4M800) host to PCI bridge"); 86 case 0x03051106: 87 return ("VIA 82C8363 (Apollo KT133x/KM133) host to PCI bridge"); 88 case 0x03241106: 89 return ("VIA VT3324 (CX700) host to PCI bridge"); 90 case 0x03911106: 91 return ("VIA 8371 (Apollo KX133) host to PCI bridge"); 92 case 0x05011106: 93 return ("VIA 8501 (Apollo MVP4) host to PCI bridge"); 94 case 0x05971106: 95 return ("VIA 82C597 (Apollo VP3) host to PCI bridge"); 96 case 0x05981106: 97 return ("VIA 82C598 (Apollo MVP3) host to PCI bridge"); 98 case 0x06011106: 99 return ("VIA 8601 (Apollo ProMedia/PLE133Ta) host to PCI bridge"); 100 case 0x06051106: 101 return ("VIA 82C694X (Apollo Pro 133A) host to PCI bridge"); 102 case 0x06911106: 103 return ("VIA 82C691 (Apollo Pro) host to PCI bridge"); 104 case 0x30911106: 105 return ("VIA 8633 (Pro 266) host to PCI bridge"); 106 case 0x30991106: 107 return ("VIA 8367 (KT266/KY266x/KT333) host to PCI bridge"); 108 case 0x31011106: 109 return ("VIA 8653 (Pro266T) host to PCI bridge"); 110 case 0x31121106: 111 return ("VIA 8361 (KLE133) host to PCI bridge"); 112 case 0x31161106: 113 return ("VIA XM266 (PM266/KM266) host to PCI bridge"); 114 case 0x31231106: 115 return ("VIA 862x (CLE266) host to PCI bridge"); 116 case 0x31281106: 117 return ("VIA 8753 (P4X266) host to PCI bridge"); 118 case 0x31481106: 119 return ("VIA 8703 (P4M266x/P4N266) host to PCI bridge"); 120 case 0x31561106: 121 return ("VIA XN266 (Apollo Pro266) host to PCI bridge"); 122 case 0x31681106: 123 return ("VIA 8754 (PT800) host to PCI bridge"); 124 case 0x31891106: 125 return ("VIA 8377 (Apollo KT400/KT400A/KT600) host to PCI bridge"); 126 case 0x32051106: 127 return ("VIA 8235/8237 (Apollo KM400/KM400A) host to PCI bridge"); 128 case 0x32081106: 129 return ("VIA 8783 (PT890) host to PCI bridge"); 130 case 0x32581106: 131 return ("VIA PT880 host to PCI bridge"); 132 case 0xb1981106: 133 return ("VIA VT83xx/VT87xx/KTxxx/Px8xx host to PCI bridge"); 134 }; 135 136 return NULL; 137 } 138 139 static int 140 agp_via_probe(device_t dev) 141 { 142 const char *desc; 143 144 if (resource_disabled("agp", device_get_unit(dev))) 145 return (ENXIO); 146 desc = agp_via_match(dev); 147 if (desc) { 148 device_set_desc(dev, desc); 149 return BUS_PROBE_DEFAULT; 150 } 151 152 return ENXIO; 153 } 154 155 static int 156 agp_via_attach(device_t dev) 157 { 158 struct agp_via_softc *sc = device_get_softc(dev); 159 struct agp_gatt *gatt; 160 int error; 161 u_int32_t agpsel; 162 163 /* XXX: This should be keying off of whether the bridge is AGP3 capable, 164 * rather than a bunch of device ids for chipsets that happen to do 8x. 165 */ 166 switch (pci_get_devid(dev)) { 167 case 0x01981106: 168 case 0x02591106: 169 case 0x02691106: 170 case 0x02961106: 171 case 0x03241106: 172 case 0x31231106: 173 case 0x31681106: 174 case 0x31891106: 175 case 0x32051106: 176 case 0x32581106: 177 case 0xb1981106: 178 /* The newer VIA chipsets will select the AGP version based on 179 * what AGP versions the card supports. We still have to 180 * program it using the v2 registers if it has chosen to use 181 * compatibility mode. 182 */ 183 agpsel = pci_read_config(dev, AGP_VIA_AGPSEL, 1); 184 if ((agpsel & (1 << 1)) == 0) 185 sc->regs = via_v3_regs; 186 else 187 sc->regs = via_v2_regs; 188 break; 189 default: 190 sc->regs = via_v2_regs; 191 break; 192 } 193 194 error = agp_generic_attach(dev); 195 if (error) 196 return error; 197 198 sc->initial_aperture = AGP_GET_APERTURE(dev); 199 200 for (;;) { 201 gatt = agp_alloc_gatt(dev); 202 if (gatt) 203 break; 204 205 /* 206 * Probably contigmalloc failure. Try reducing the 207 * aperture so that the gatt size reduces. 208 */ 209 if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) { 210 agp_generic_detach(dev); 211 return ENOMEM; 212 } 213 } 214 sc->gatt = gatt; 215 216 if (sc->regs == via_v2_regs) { 217 /* Install the gatt. */ 218 pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical | 3, 4); 219 220 /* Enable the aperture. */ 221 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4); 222 } else { 223 u_int32_t gartctrl; 224 225 /* Install the gatt. */ 226 pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical, 4); 227 228 /* Enable the aperture. */ 229 gartctrl = pci_read_config(dev, sc->regs[REG_ATTBASE], 4); 230 pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl | (3 << 7), 4); 231 } 232 233 device_printf(dev, "aperture size is %dM\n", 234 sc->initial_aperture / 1024 / 1024); 235 236 return 0; 237 } 238 239 static int 240 agp_via_detach(device_t dev) 241 { 242 struct agp_via_softc *sc = device_get_softc(dev); 243 int error; 244 245 error = agp_generic_detach(dev); 246 if (error) 247 return error; 248 249 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0, 4); 250 pci_write_config(dev, sc->regs[REG_ATTBASE], 0, 4); 251 AGP_SET_APERTURE(dev, sc->initial_aperture); 252 agp_free_gatt(sc->gatt); 253 254 return 0; 255 } 256 257 static u_int32_t 258 agp_via_get_aperture(device_t dev) 259 { 260 struct agp_via_softc *sc = device_get_softc(dev); 261 u_int32_t apsize; 262 263 if (sc->regs == via_v2_regs) { 264 apsize = pci_read_config(dev, sc->regs[REG_APSIZE], 1) & 0x1f; 265 266 /* 267 * The size is determined by the number of low bits of 268 * register APBASE which are forced to zero. The low 20 bits 269 * are always forced to zero and each zero bit in the apsize 270 * field just read forces the corresponding bit in the 27:20 271 * to be zero. We calculate the aperture size accordingly. 272 */ 273 return (((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1; 274 } else { 275 apsize = pci_read_config(dev, sc->regs[REG_APSIZE], 2) & 0xfff; 276 switch (apsize) { 277 case 0x800: 278 return 0x80000000; 279 case 0xc00: 280 return 0x40000000; 281 case 0xe00: 282 return 0x20000000; 283 case 0xf00: 284 return 0x10000000; 285 case 0xf20: 286 return 0x08000000; 287 case 0xf30: 288 return 0x04000000; 289 case 0xf38: 290 return 0x02000000; 291 default: 292 device_printf(dev, "Invalid aperture setting 0x%x", 293 pci_read_config(dev, sc->regs[REG_APSIZE], 2)); 294 return 0; 295 } 296 } 297 } 298 299 static int 300 agp_via_set_aperture(device_t dev, u_int32_t aperture) 301 { 302 struct agp_via_softc *sc = device_get_softc(dev); 303 u_int32_t apsize, key, val; 304 305 if (sc->regs == via_v2_regs) { 306 /* 307 * Reverse the magic from get_aperture. 308 */ 309 apsize = ((aperture - 1) >> 20) ^ 0xff; 310 311 /* 312 * Double check for sanity. 313 */ 314 if ((((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1 != aperture) 315 return EINVAL; 316 317 pci_write_config(dev, sc->regs[REG_APSIZE], apsize, 1); 318 } else { 319 switch (aperture) { 320 case 0x80000000: 321 key = 0x800; 322 break; 323 case 0x40000000: 324 key = 0xc00; 325 break; 326 case 0x20000000: 327 key = 0xe00; 328 break; 329 case 0x10000000: 330 key = 0xf00; 331 break; 332 case 0x08000000: 333 key = 0xf20; 334 break; 335 case 0x04000000: 336 key = 0xf30; 337 break; 338 case 0x02000000: 339 key = 0xf38; 340 break; 341 default: 342 device_printf(dev, "Invalid aperture size (%dMb)\n", 343 aperture / 1024 / 1024); 344 return EINVAL; 345 } 346 val = pci_read_config(dev, sc->regs[REG_APSIZE], 2); 347 pci_write_config(dev, sc->regs[REG_APSIZE], 348 ((val & ~0xfff) | key), 2); 349 } 350 return 0; 351 } 352 353 static int 354 agp_via_bind_page(device_t dev, int offset, vm_offset_t physical) 355 { 356 struct agp_via_softc *sc = device_get_softc(dev); 357 358 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 359 return EINVAL; 360 361 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical; 362 return 0; 363 } 364 365 static int 366 agp_via_unbind_page(device_t dev, int offset) 367 { 368 struct agp_via_softc *sc = device_get_softc(dev); 369 370 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 371 return EINVAL; 372 373 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0; 374 return 0; 375 } 376 377 static void 378 agp_via_flush_tlb(device_t dev) 379 { 380 struct agp_via_softc *sc = device_get_softc(dev); 381 u_int32_t gartctrl; 382 383 if (sc->regs == via_v2_regs) { 384 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x8f, 4); 385 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4); 386 } else { 387 gartctrl = pci_read_config(dev, sc->regs[REG_GARTCTRL], 4); 388 pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl & 389 ~(1 << 7), 4); 390 pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl, 4); 391 } 392 393 } 394 395 static device_method_t agp_via_methods[] = { 396 /* Device interface */ 397 DEVMETHOD(device_probe, agp_via_probe), 398 DEVMETHOD(device_attach, agp_via_attach), 399 DEVMETHOD(device_detach, agp_via_detach), 400 DEVMETHOD(device_shutdown, bus_generic_shutdown), 401 DEVMETHOD(device_suspend, bus_generic_suspend), 402 DEVMETHOD(device_resume, bus_generic_resume), 403 404 /* AGP interface */ 405 DEVMETHOD(agp_get_aperture, agp_via_get_aperture), 406 DEVMETHOD(agp_set_aperture, agp_via_set_aperture), 407 DEVMETHOD(agp_bind_page, agp_via_bind_page), 408 DEVMETHOD(agp_unbind_page, agp_via_unbind_page), 409 DEVMETHOD(agp_flush_tlb, agp_via_flush_tlb), 410 DEVMETHOD(agp_enable, agp_generic_enable), 411 DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory), 412 DEVMETHOD(agp_free_memory, agp_generic_free_memory), 413 DEVMETHOD(agp_bind_memory, agp_generic_bind_memory), 414 DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory), 415 416 { 0, 0 } 417 }; 418 419 static driver_t agp_via_driver = { 420 "agp", 421 agp_via_methods, 422 sizeof(struct agp_via_softc), 423 }; 424 425 static devclass_t agp_devclass; 426 427 DRIVER_MODULE(agp_via, hostb, agp_via_driver, agp_devclass, 0, 0); 428 MODULE_DEPEND(agp_via, agp, 1, 1, 1); 429 MODULE_DEPEND(agp_via, pci, 1, 1, 1); 430