1 /*- 2 * Copyright (c) 2000 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #include "opt_bus.h" 30 #include "opt_pci.h" 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/malloc.h> 35 #include <sys/kernel.h> 36 #include <sys/bus.h> 37 #include <sys/lock.h> 38 39 #include <pci/pcivar.h> 40 #include <pci/pcireg.h> 41 #include <pci/agppriv.h> 42 #include <pci/agpreg.h> 43 44 #include <vm/vm.h> 45 #include <vm/vm_object.h> 46 #include <vm/pmap.h> 47 48 struct agp_intel_softc { 49 struct agp_softc agp; 50 u_int32_t initial_aperture; /* aperture size at startup */ 51 struct agp_gatt *gatt; 52 }; 53 54 static const char* 55 agp_intel_match(device_t dev) 56 { 57 if (pci_get_class(dev) != PCIC_BRIDGE 58 || pci_get_subclass(dev) != PCIS_BRIDGE_HOST) 59 return NULL; 60 61 if (agp_find_caps(dev) == 0) 62 return NULL; 63 64 switch (pci_get_devid(dev)) { 65 /* Intel -- vendor 0x8086 */ 66 case 0x71808086: 67 return ("Intel 82443LX (440 LX) host to PCI bridge"); 68 69 case 0x71908086: 70 return ("Intel 82443BX (440 BX) host to PCI bridge"); 71 72 case 0x71a08086: 73 return ("Intel 82443GX host to PCI bridge"); 74 75 case 0x71a18086: 76 return ("Intel 82443GX host to AGP bridge"); 77 78 case 0x11308086: 79 return ("Intel 82815 (i815 GMCH) host to PCI bridge"); 80 }; 81 82 if (pci_get_vendor(dev) == 0x8086) 83 return ("Intel Generic host to PCI bridge"); 84 85 return NULL; 86 } 87 88 static int 89 agp_intel_probe(device_t dev) 90 { 91 const char *desc; 92 93 desc = agp_intel_match(dev); 94 if (desc) { 95 device_verbose(dev); 96 device_set_desc(dev, desc); 97 return 0; 98 } 99 100 return ENXIO; 101 } 102 103 static int 104 agp_intel_attach(device_t dev) 105 { 106 struct agp_intel_softc *sc = device_get_softc(dev); 107 struct agp_gatt *gatt; 108 int error; 109 110 error = agp_generic_attach(dev); 111 if (error) 112 return error; 113 114 sc->initial_aperture = AGP_GET_APERTURE(dev); 115 116 for (;;) { 117 gatt = agp_alloc_gatt(dev); 118 if (gatt) 119 break; 120 121 /* 122 * Probably contigmalloc failure. Try reducing the 123 * aperture so that the gatt size reduces. 124 */ 125 if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) { 126 agp_generic_detach(dev); 127 return ENOMEM; 128 } 129 } 130 sc->gatt = gatt; 131 132 /* Install the gatt. */ 133 pci_write_config(dev, AGP_INTEL_ATTBASE, gatt->ag_physical, 4); 134 135 /* Enable things, clear errors etc. */ 136 pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2280, 4); 137 pci_write_config(dev, AGP_INTEL_NBXCFG, 138 (pci_read_config(dev, AGP_INTEL_NBXCFG, 4) 139 & ~(1 << 10)) | (1 << 9), 4); 140 pci_write_config(dev, AGP_INTEL_ERRSTS + 1, 7, 1); 141 142 return 0; 143 } 144 145 static int 146 agp_intel_detach(device_t dev) 147 { 148 struct agp_intel_softc *sc = device_get_softc(dev); 149 int error; 150 151 error = agp_generic_detach(dev); 152 if (error) 153 return error; 154 155 printf("%s: set NBXCFG to %x\n", __FUNCTION__, 156 (pci_read_config(dev, AGP_INTEL_NBXCFG, 4) 157 & ~(1 << 9))); 158 pci_write_config(dev, AGP_INTEL_NBXCFG, 159 (pci_read_config(dev, AGP_INTEL_NBXCFG, 4) 160 & ~(1 << 9)), 4); 161 pci_write_config(dev, AGP_INTEL_ATTBASE, 0, 4); 162 AGP_SET_APERTURE(dev, sc->initial_aperture); 163 agp_free_gatt(sc->gatt); 164 165 return 0; 166 } 167 168 static u_int32_t 169 agp_intel_get_aperture(device_t dev) 170 { 171 u_int32_t apsize; 172 173 apsize = pci_read_config(dev, AGP_INTEL_APSIZE, 1) & 0x1f; 174 175 /* 176 * The size is determined by the number of low bits of 177 * register APBASE which are forced to zero. The low 22 bits 178 * are always forced to zero and each zero bit in the apsize 179 * field just read forces the corresponding bit in the 27:22 180 * to be zero. We calculate the aperture size accordingly. 181 */ 182 return (((apsize ^ 0x1f) << 22) | ((1 << 22) - 1)) + 1; 183 } 184 185 static int 186 agp_intel_set_aperture(device_t dev, u_int32_t aperture) 187 { 188 u_int32_t apsize; 189 190 /* 191 * Reverse the magic from get_aperture. 192 */ 193 apsize = ((aperture - 1) >> 22) ^ 0x1f; 194 195 /* 196 * Double check for sanity. 197 */ 198 if ((((apsize ^ 0x1f) << 22) | ((1 << 22) - 1)) + 1 != aperture) 199 return EINVAL; 200 201 pci_write_config(dev, AGP_INTEL_APSIZE, apsize, 1); 202 203 return 0; 204 } 205 206 static int 207 agp_intel_bind_page(device_t dev, int offset, vm_offset_t physical) 208 { 209 struct agp_intel_softc *sc = device_get_softc(dev); 210 211 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 212 return EINVAL; 213 214 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 0x17; 215 return 0; 216 } 217 218 static int 219 agp_intel_unbind_page(device_t dev, int offset) 220 { 221 struct agp_intel_softc *sc = device_get_softc(dev); 222 223 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 224 return EINVAL; 225 226 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0; 227 return 0; 228 } 229 230 static void 231 agp_intel_flush_tlb(device_t dev) 232 { 233 pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2200, 4); 234 pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2280, 4); 235 } 236 237 static device_method_t agp_intel_methods[] = { 238 /* Device interface */ 239 DEVMETHOD(device_probe, agp_intel_probe), 240 DEVMETHOD(device_attach, agp_intel_attach), 241 DEVMETHOD(device_detach, agp_intel_detach), 242 DEVMETHOD(device_shutdown, bus_generic_shutdown), 243 DEVMETHOD(device_suspend, bus_generic_suspend), 244 DEVMETHOD(device_resume, bus_generic_resume), 245 246 /* AGP interface */ 247 DEVMETHOD(agp_get_aperture, agp_intel_get_aperture), 248 DEVMETHOD(agp_set_aperture, agp_intel_set_aperture), 249 DEVMETHOD(agp_bind_page, agp_intel_bind_page), 250 DEVMETHOD(agp_unbind_page, agp_intel_unbind_page), 251 DEVMETHOD(agp_flush_tlb, agp_intel_flush_tlb), 252 DEVMETHOD(agp_enable, agp_generic_enable), 253 DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory), 254 DEVMETHOD(agp_free_memory, agp_generic_free_memory), 255 DEVMETHOD(agp_bind_memory, agp_generic_bind_memory), 256 DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory), 257 258 { 0, 0 } 259 }; 260 261 static driver_t agp_intel_driver = { 262 "agp", 263 agp_intel_methods, 264 sizeof(struct agp_intel_softc), 265 }; 266 267 static devclass_t agp_devclass; 268 269 DRIVER_MODULE(agp_intel, pci, agp_intel_driver, agp_devclass, 0, 0); 270