1 /*- 2 * Copyright (c) 2000 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #include "opt_bus.h" 30 #include "opt_pci.h" 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/malloc.h> 35 #include <sys/kernel.h> 36 #include <sys/bus.h> 37 #include <sys/lock.h> 38 #include <sys/mutex.h> 39 #include <sys/proc.h> 40 41 #include <pci/pcivar.h> 42 #include <pci/pcireg.h> 43 #include <pci/agppriv.h> 44 #include <pci/agpreg.h> 45 46 #include <vm/vm.h> 47 #include <vm/vm_object.h> 48 #include <vm/pmap.h> 49 50 struct agp_intel_softc { 51 struct agp_softc agp; 52 u_int32_t initial_aperture; /* aperture size at startup */ 53 struct agp_gatt *gatt; 54 }; 55 56 static const char* 57 agp_intel_match(device_t dev) 58 { 59 if (pci_get_class(dev) != PCIC_BRIDGE 60 || pci_get_subclass(dev) != PCIS_BRIDGE_HOST) 61 return NULL; 62 63 if (agp_find_caps(dev) == 0) 64 return NULL; 65 66 switch (pci_get_devid(dev)) { 67 /* Intel -- vendor 0x8086 */ 68 case 0x71808086: 69 return ("Intel 82443LX (440 LX) host to PCI bridge"); 70 71 case 0x71908086: 72 return ("Intel 82443BX (440 BX) host to PCI bridge"); 73 74 case 0x71a08086: 75 return ("Intel 82443GX host to PCI bridge"); 76 77 case 0x71a18086: 78 return ("Intel 82443GX host to AGP bridge"); 79 80 case 0x11308086: 81 return ("Intel 82815 (i815 GMCH) host to PCI bridge"); 82 }; 83 84 if (pci_get_vendor(dev) == 0x8086) 85 return ("Intel Generic host to PCI bridge"); 86 87 return NULL; 88 } 89 90 static int 91 agp_intel_probe(device_t dev) 92 { 93 const char *desc; 94 95 desc = agp_intel_match(dev); 96 if (desc) { 97 device_verbose(dev); 98 device_set_desc(dev, desc); 99 return 0; 100 } 101 102 return ENXIO; 103 } 104 105 static int 106 agp_intel_attach(device_t dev) 107 { 108 struct agp_intel_softc *sc = device_get_softc(dev); 109 struct agp_gatt *gatt; 110 int error; 111 112 error = agp_generic_attach(dev); 113 if (error) 114 return error; 115 116 sc->initial_aperture = AGP_GET_APERTURE(dev); 117 118 for (;;) { 119 gatt = agp_alloc_gatt(dev); 120 if (gatt) 121 break; 122 123 /* 124 * Probably contigmalloc failure. Try reducing the 125 * aperture so that the gatt size reduces. 126 */ 127 if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) { 128 agp_generic_detach(dev); 129 return ENOMEM; 130 } 131 } 132 sc->gatt = gatt; 133 134 /* Install the gatt. */ 135 pci_write_config(dev, AGP_INTEL_ATTBASE, gatt->ag_physical, 4); 136 137 /* Enable things, clear errors etc. */ 138 pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2280, 4); 139 pci_write_config(dev, AGP_INTEL_NBXCFG, 140 (pci_read_config(dev, AGP_INTEL_NBXCFG, 4) 141 & ~(1 << 10)) | (1 << 9), 4); 142 pci_write_config(dev, AGP_INTEL_ERRSTS + 1, 7, 1); 143 144 return 0; 145 } 146 147 static int 148 agp_intel_detach(device_t dev) 149 { 150 struct agp_intel_softc *sc = device_get_softc(dev); 151 int error; 152 153 error = agp_generic_detach(dev); 154 if (error) 155 return error; 156 157 printf("%s: set NBXCFG to %x\n", __FUNCTION__, 158 (pci_read_config(dev, AGP_INTEL_NBXCFG, 4) 159 & ~(1 << 9))); 160 pci_write_config(dev, AGP_INTEL_NBXCFG, 161 (pci_read_config(dev, AGP_INTEL_NBXCFG, 4) 162 & ~(1 << 9)), 4); 163 pci_write_config(dev, AGP_INTEL_ATTBASE, 0, 4); 164 AGP_SET_APERTURE(dev, sc->initial_aperture); 165 agp_free_gatt(sc->gatt); 166 167 return 0; 168 } 169 170 static u_int32_t 171 agp_intel_get_aperture(device_t dev) 172 { 173 u_int32_t apsize; 174 175 apsize = pci_read_config(dev, AGP_INTEL_APSIZE, 1) & 0x1f; 176 177 /* 178 * The size is determined by the number of low bits of 179 * register APBASE which are forced to zero. The low 22 bits 180 * are always forced to zero and each zero bit in the apsize 181 * field just read forces the corresponding bit in the 27:22 182 * to be zero. We calculate the aperture size accordingly. 183 */ 184 return (((apsize ^ 0x1f) << 22) | ((1 << 22) - 1)) + 1; 185 } 186 187 static int 188 agp_intel_set_aperture(device_t dev, u_int32_t aperture) 189 { 190 u_int32_t apsize; 191 192 /* 193 * Reverse the magic from get_aperture. 194 */ 195 apsize = ((aperture - 1) >> 22) ^ 0x1f; 196 197 /* 198 * Double check for sanity. 199 */ 200 if ((((apsize ^ 0x1f) << 22) | ((1 << 22) - 1)) + 1 != aperture) 201 return EINVAL; 202 203 pci_write_config(dev, AGP_INTEL_APSIZE, apsize, 1); 204 205 return 0; 206 } 207 208 static int 209 agp_intel_bind_page(device_t dev, int offset, vm_offset_t physical) 210 { 211 struct agp_intel_softc *sc = device_get_softc(dev); 212 213 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 214 return EINVAL; 215 216 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 0x17; 217 return 0; 218 } 219 220 static int 221 agp_intel_unbind_page(device_t dev, int offset) 222 { 223 struct agp_intel_softc *sc = device_get_softc(dev); 224 225 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 226 return EINVAL; 227 228 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0; 229 return 0; 230 } 231 232 static void 233 agp_intel_flush_tlb(device_t dev) 234 { 235 pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2200, 4); 236 pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2280, 4); 237 } 238 239 static device_method_t agp_intel_methods[] = { 240 /* Device interface */ 241 DEVMETHOD(device_probe, agp_intel_probe), 242 DEVMETHOD(device_attach, agp_intel_attach), 243 DEVMETHOD(device_detach, agp_intel_detach), 244 DEVMETHOD(device_shutdown, bus_generic_shutdown), 245 DEVMETHOD(device_suspend, bus_generic_suspend), 246 DEVMETHOD(device_resume, bus_generic_resume), 247 248 /* AGP interface */ 249 DEVMETHOD(agp_get_aperture, agp_intel_get_aperture), 250 DEVMETHOD(agp_set_aperture, agp_intel_set_aperture), 251 DEVMETHOD(agp_bind_page, agp_intel_bind_page), 252 DEVMETHOD(agp_unbind_page, agp_intel_unbind_page), 253 DEVMETHOD(agp_flush_tlb, agp_intel_flush_tlb), 254 DEVMETHOD(agp_enable, agp_generic_enable), 255 DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory), 256 DEVMETHOD(agp_free_memory, agp_generic_free_memory), 257 DEVMETHOD(agp_bind_memory, agp_generic_bind_memory), 258 DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory), 259 260 { 0, 0 } 261 }; 262 263 static driver_t agp_intel_driver = { 264 "agp", 265 agp_intel_methods, 266 sizeof(struct agp_intel_softc), 267 }; 268 269 static devclass_t agp_devclass; 270 271 DRIVER_MODULE(agp_intel, pci, agp_intel_driver, agp_devclass, 0, 0); 272