1 /*- 2 * Copyright (c) 2000 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #include "opt_bus.h" 30 #include "opt_pci.h" 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/malloc.h> 35 #include <sys/kernel.h> 36 #include <sys/bus.h> 37 #include <sys/lock.h> 38 #include <sys/mutex.h> 39 40 #include <pci/pcivar.h> 41 #include <pci/pcireg.h> 42 #include <pci/agppriv.h> 43 #include <pci/agpreg.h> 44 45 #include <vm/vm.h> 46 #include <vm/vm_object.h> 47 #include <vm/pmap.h> 48 49 struct agp_intel_softc { 50 struct agp_softc agp; 51 u_int32_t initial_aperture; /* aperture size at startup */ 52 struct agp_gatt *gatt; 53 }; 54 55 static const char* 56 agp_intel_match(device_t dev) 57 { 58 if (pci_get_class(dev) != PCIC_BRIDGE 59 || pci_get_subclass(dev) != PCIS_BRIDGE_HOST) 60 return NULL; 61 62 if (agp_find_caps(dev) == 0) 63 return NULL; 64 65 switch (pci_get_devid(dev)) { 66 /* Intel -- vendor 0x8086 */ 67 case 0x71808086: 68 return ("Intel 82443LX (440 LX) host to PCI bridge"); 69 70 case 0x71908086: 71 return ("Intel 82443BX (440 BX) host to PCI bridge"); 72 73 case 0x71a08086: 74 return ("Intel 82443GX host to PCI bridge"); 75 76 case 0x71a18086: 77 return ("Intel 82443GX host to AGP bridge"); 78 79 case 0x11308086: 80 return ("Intel 82815 (i815 GMCH) host to PCI bridge"); 81 }; 82 83 if (pci_get_vendor(dev) == 0x8086) 84 return ("Intel Generic host to PCI bridge"); 85 86 return NULL; 87 } 88 89 static int 90 agp_intel_probe(device_t dev) 91 { 92 const char *desc; 93 94 desc = agp_intel_match(dev); 95 if (desc) { 96 device_verbose(dev); 97 device_set_desc(dev, desc); 98 return 0; 99 } 100 101 return ENXIO; 102 } 103 104 static int 105 agp_intel_attach(device_t dev) 106 { 107 struct agp_intel_softc *sc = device_get_softc(dev); 108 struct agp_gatt *gatt; 109 int error; 110 111 error = agp_generic_attach(dev); 112 if (error) 113 return error; 114 115 sc->initial_aperture = AGP_GET_APERTURE(dev); 116 117 for (;;) { 118 gatt = agp_alloc_gatt(dev); 119 if (gatt) 120 break; 121 122 /* 123 * Probably contigmalloc failure. Try reducing the 124 * aperture so that the gatt size reduces. 125 */ 126 if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) { 127 agp_generic_detach(dev); 128 return ENOMEM; 129 } 130 } 131 sc->gatt = gatt; 132 133 /* Install the gatt. */ 134 pci_write_config(dev, AGP_INTEL_ATTBASE, gatt->ag_physical, 4); 135 136 /* Enable things, clear errors etc. */ 137 pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2280, 4); 138 pci_write_config(dev, AGP_INTEL_NBXCFG, 139 (pci_read_config(dev, AGP_INTEL_NBXCFG, 4) 140 & ~(1 << 10)) | (1 << 9), 4); 141 pci_write_config(dev, AGP_INTEL_ERRSTS + 1, 7, 1); 142 143 return 0; 144 } 145 146 static int 147 agp_intel_detach(device_t dev) 148 { 149 struct agp_intel_softc *sc = device_get_softc(dev); 150 int error; 151 152 error = agp_generic_detach(dev); 153 if (error) 154 return error; 155 156 printf("%s: set NBXCFG to %x\n", __FUNCTION__, 157 (pci_read_config(dev, AGP_INTEL_NBXCFG, 4) 158 & ~(1 << 9))); 159 pci_write_config(dev, AGP_INTEL_NBXCFG, 160 (pci_read_config(dev, AGP_INTEL_NBXCFG, 4) 161 & ~(1 << 9)), 4); 162 pci_write_config(dev, AGP_INTEL_ATTBASE, 0, 4); 163 AGP_SET_APERTURE(dev, sc->initial_aperture); 164 agp_free_gatt(sc->gatt); 165 166 return 0; 167 } 168 169 static u_int32_t 170 agp_intel_get_aperture(device_t dev) 171 { 172 u_int32_t apsize; 173 174 apsize = pci_read_config(dev, AGP_INTEL_APSIZE, 1) & 0x1f; 175 176 /* 177 * The size is determined by the number of low bits of 178 * register APBASE which are forced to zero. The low 22 bits 179 * are always forced to zero and each zero bit in the apsize 180 * field just read forces the corresponding bit in the 27:22 181 * to be zero. We calculate the aperture size accordingly. 182 */ 183 return (((apsize ^ 0x1f) << 22) | ((1 << 22) - 1)) + 1; 184 } 185 186 static int 187 agp_intel_set_aperture(device_t dev, u_int32_t aperture) 188 { 189 u_int32_t apsize; 190 191 /* 192 * Reverse the magic from get_aperture. 193 */ 194 apsize = ((aperture - 1) >> 22) ^ 0x1f; 195 196 /* 197 * Double check for sanity. 198 */ 199 if ((((apsize ^ 0x1f) << 22) | ((1 << 22) - 1)) + 1 != aperture) 200 return EINVAL; 201 202 pci_write_config(dev, AGP_INTEL_APSIZE, apsize, 1); 203 204 return 0; 205 } 206 207 static int 208 agp_intel_bind_page(device_t dev, int offset, vm_offset_t physical) 209 { 210 struct agp_intel_softc *sc = device_get_softc(dev); 211 212 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 213 return EINVAL; 214 215 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 0x17; 216 return 0; 217 } 218 219 static int 220 agp_intel_unbind_page(device_t dev, int offset) 221 { 222 struct agp_intel_softc *sc = device_get_softc(dev); 223 224 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 225 return EINVAL; 226 227 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0; 228 return 0; 229 } 230 231 static void 232 agp_intel_flush_tlb(device_t dev) 233 { 234 pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2200, 4); 235 pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2280, 4); 236 } 237 238 static device_method_t agp_intel_methods[] = { 239 /* Device interface */ 240 DEVMETHOD(device_probe, agp_intel_probe), 241 DEVMETHOD(device_attach, agp_intel_attach), 242 DEVMETHOD(device_detach, agp_intel_detach), 243 DEVMETHOD(device_shutdown, bus_generic_shutdown), 244 DEVMETHOD(device_suspend, bus_generic_suspend), 245 DEVMETHOD(device_resume, bus_generic_resume), 246 247 /* AGP interface */ 248 DEVMETHOD(agp_get_aperture, agp_intel_get_aperture), 249 DEVMETHOD(agp_set_aperture, agp_intel_set_aperture), 250 DEVMETHOD(agp_bind_page, agp_intel_bind_page), 251 DEVMETHOD(agp_unbind_page, agp_intel_unbind_page), 252 DEVMETHOD(agp_flush_tlb, agp_intel_flush_tlb), 253 DEVMETHOD(agp_enable, agp_generic_enable), 254 DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory), 255 DEVMETHOD(agp_free_memory, agp_generic_free_memory), 256 DEVMETHOD(agp_bind_memory, agp_generic_bind_memory), 257 DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory), 258 259 { 0, 0 } 260 }; 261 262 static driver_t agp_intel_driver = { 263 "agp", 264 agp_intel_methods, 265 sizeof(struct agp_intel_softc), 266 }; 267 268 static devclass_t agp_devclass; 269 270 DRIVER_MODULE(agp_intel, pci, agp_intel_driver, agp_devclass, 0, 0); 271