xref: /freebsd/sys/dev/agp/agp_i810.h (revision dd41de95a84d979615a2ef11df6850622bf6184e)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2011 The FreeBSD Foundation
5  * All rights reserved.
6  *
7  * This software was developed by Konstantin Belousov under sponsorship from
8  * the FreeBSD Foundation.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29  * SUCH DAMAGE.
30  *
31  * $FreeBSD$
32  */
33 
34 #ifndef AGP_AGP_I810_H
35 #define	AGP_AGP_I810_H
36 
37 #include <sys/param.h>
38 #include <sys/rman.h>
39 #include <sys/sglist.h>
40 
41 #include <vm/vm.h>
42 #include <vm/vm_page.h>
43 
44 /* Special gtt memory types */
45 #define AGP_DCACHE_MEMORY	1
46 #define AGP_PHYS_MEMORY		2
47 
48 /* New caching attributes for gen6/sandybridge */
49 #define AGP_USER_CACHED_MEMORY_LLC_MLC (AGP_USER_TYPES + 2)
50 #define AGP_USER_UNCACHED_MEMORY (AGP_USER_TYPES + 4)
51 
52 /* flag for GFDT type */
53 #define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
54 
55 struct intel_gtt {
56 	/* Size of memory reserved for graphics by the BIOS */
57 	unsigned int stolen_size;
58 	/* Total number of gtt entries. */
59 	unsigned int gtt_total_entries;
60 	/* Part of the gtt that is mappable by the cpu, for those chips where
61 	 * this is not the full gtt. */
62 	unsigned int gtt_mappable_entries;
63 	/* Whether i915 needs to use the dmar apis or not. */
64 	unsigned int needs_dmar : 1;
65 	/* Whether we idle the gpu before mapping/unmapping */
66 	unsigned int do_idle_maps : 1;
67 	/* Share the scratch page dma with ppgtts. */
68 	vm_paddr_t scratch_page_dma;
69 	vm_page_t scratch_page;
70 	/* for ppgtt PDE access */
71 	uint32_t *gtt;
72 	/* needed for ioremap in drm/i915 */
73 	bus_addr_t gma_bus_addr;
74 };
75 
76 struct intel_gtt agp_intel_gtt_get(device_t dev);
77 int agp_intel_gtt_chipset_flush(device_t dev);
78 void agp_intel_gtt_unmap_memory(device_t dev, struct sglist *sg_list);
79 void agp_intel_gtt_clear_range(device_t dev, u_int first_entry,
80     u_int num_entries);
81 int agp_intel_gtt_map_memory(device_t dev, vm_page_t *pages, u_int num_entries,
82     struct sglist **sg_list);
83 void agp_intel_gtt_insert_sg_entries(device_t dev, struct sglist *sg_list,
84     u_int pg_start, u_int flags);
85 void agp_intel_gtt_insert_pages(device_t dev, u_int first_entry,
86     u_int num_entries, vm_page_t *pages, u_int flags);
87 
88 struct intel_gtt *intel_gtt_get(void);
89 int intel_gtt_chipset_flush(void);
90 void intel_gtt_unmap_memory(struct sglist *sg_list);
91 void intel_gtt_clear_range(u_int first_entry, u_int num_entries);
92 void intel_gtt_install_pte(u_int index, vm_paddr_t addr, u_int flags);
93 int intel_gtt_map_memory(vm_page_t *pages, u_int num_entries,
94     struct sglist **sg_list);
95 void intel_gtt_insert_sg_entries(struct sglist *sg_list, u_int pg_start,
96     u_int flags);
97 void intel_gtt_insert_pages(u_int first_entry, u_int num_entries,
98     vm_page_t *pages, u_int flags);
99 vm_paddr_t intel_gtt_read_pte_paddr(u_int entry);
100 u_int32_t intel_gtt_read_pte(u_int entry);
101 device_t intel_gtt_get_bridge_device(void);
102 void intel_gtt_write(u_int entry, uint32_t val);
103 
104 #endif
105