1 /*- 2 * Copyright (c) 2000 Doug Rabson 3 * Copyright (c) 2000 Ruslan Ermilov 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 /* 29 * Fixes for 830/845G support: David Dawes <dawes@xfree86.org> 30 * 852GM/855GM/865G support added by David Dawes <dawes@xfree86.org> 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include "opt_bus.h" 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/malloc.h> 41 #include <sys/kernel.h> 42 #include <sys/bus.h> 43 #include <sys/lock.h> 44 #include <sys/lockmgr.h> 45 #include <sys/mutex.h> 46 #include <sys/proc.h> 47 48 #include <dev/pci/pcivar.h> 49 #include <dev/pci/pcireg.h> 50 #include <pci/agppriv.h> 51 #include <pci/agpreg.h> 52 53 #include <vm/vm.h> 54 #include <vm/vm_object.h> 55 #include <vm/vm_page.h> 56 #include <vm/vm_pageout.h> 57 #include <vm/pmap.h> 58 59 #include <machine/bus.h> 60 #include <machine/resource.h> 61 #include <sys/rman.h> 62 63 MALLOC_DECLARE(M_AGP); 64 65 #define READ1(off) bus_space_read_1(sc->bst, sc->bsh, off) 66 #define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off) 67 #define WRITE4(off,v) bus_space_write_4(sc->bst, sc->bsh, off, v) 68 69 #define CHIP_I810 0 /* i810/i815 */ 70 #define CHIP_I830 1 /* 830M/845G */ 71 #define CHIP_I855 2 /* 852GM/855GM/865G */ 72 73 struct agp_i810_softc { 74 struct agp_softc agp; 75 u_int32_t initial_aperture; /* aperture size at startup */ 76 struct agp_gatt *gatt; 77 int chiptype; /* i810-like or i830 */ 78 u_int32_t dcache_size; /* i810 only */ 79 u_int32_t stolen; /* number of i830/845 gtt entries for stolen memory */ 80 device_t bdev; /* bridge device */ 81 struct resource *regs; /* memory mapped GC registers */ 82 bus_space_tag_t bst; /* bus_space tag */ 83 bus_space_handle_t bsh; /* bus_space handle */ 84 }; 85 86 static const char* 87 agp_i810_match(device_t dev) 88 { 89 if (pci_get_class(dev) != PCIC_DISPLAY 90 || pci_get_subclass(dev) != PCIS_DISPLAY_VGA) 91 return NULL; 92 93 switch (pci_get_devid(dev)) { 94 case 0x71218086: 95 return ("Intel 82810 (i810 GMCH) SVGA controller"); 96 97 case 0x71238086: 98 return ("Intel 82810-DC100 (i810-DC100 GMCH) SVGA controller"); 99 100 case 0x71258086: 101 return ("Intel 82810E (i810E GMCH) SVGA controller"); 102 103 case 0x11328086: 104 return ("Intel 82815 (i815 GMCH) SVGA controller"); 105 106 case 0x35778086: 107 return ("Intel 82830M (830M GMCH) SVGA controller"); 108 109 case 0x25628086: 110 return ("Intel 82845G (845G GMCH) SVGA controller"); 111 112 case 0x35828086: 113 switch (pci_read_config(dev, AGP_I85X_CAPID, 1)) { 114 case AGP_I855_GME: 115 return ("Intel 82855GME (855GME GMCH) SVGA controller"); 116 117 case AGP_I855_GM: 118 return ("Intel 82855GM (855GM GMCH) SVGA controller"); 119 120 case AGP_I852_GME: 121 return ("Intel 82852GME (852GME GMCH) SVGA controller"); 122 123 case AGP_I852_GM: 124 return ("Intel 82852GM (852GM GMCH) SVGA controller"); 125 126 default: 127 return ("Intel 8285xM (85xGM GMCH) SVGA controller"); 128 } 129 130 case 0x25728086: 131 return ("Intel 82865G (865G GMCH) SVGA controller"); 132 }; 133 134 return NULL; 135 } 136 137 /* 138 * Find bridge device. 139 */ 140 static device_t 141 agp_i810_find_bridge(device_t dev) 142 { 143 device_t *children, child; 144 int nchildren, i; 145 u_int32_t devid; 146 147 /* 148 * Calculate bridge device's ID. 149 */ 150 devid = pci_get_devid(dev); 151 switch (devid) { 152 case 0x71218086: 153 case 0x71238086: 154 case 0x71258086: 155 devid -= 0x10000; 156 break; 157 158 case 0x11328086: 159 case 0x35778086: 160 case 0x25628086: 161 case 0x35828086: 162 case 0x25728086: 163 devid -= 0x20000; 164 break; 165 }; 166 if (device_get_children(device_get_parent(dev), &children, &nchildren)) 167 return 0; 168 169 for (i = 0; i < nchildren; i++) { 170 child = children[i]; 171 172 if (pci_get_devid(child) == devid) { 173 free(children, M_TEMP); 174 return child; 175 } 176 } 177 free(children, M_TEMP); 178 return 0; 179 } 180 181 static int 182 agp_i810_probe(device_t dev) 183 { 184 const char *desc; 185 186 desc = agp_i810_match(dev); 187 if (desc) { 188 device_t bdev; 189 u_int8_t smram; 190 int devid = pci_get_devid(dev); 191 192 bdev = agp_i810_find_bridge(dev); 193 if (!bdev) { 194 if (bootverbose) 195 printf("I810: can't find bridge device\n"); 196 return ENXIO; 197 } 198 199 /* 200 * checking whether internal graphics device has been activated. 201 */ 202 if ( (devid == 0x71218086 ) || 203 (devid == 0x71238086 ) || 204 (devid == 0x71258086 ) || 205 (devid == 0x11328086 ) ) { 206 smram = pci_read_config(bdev, AGP_I810_SMRAM, 1); 207 if ((smram & AGP_I810_SMRAM_GMS) 208 == AGP_I810_SMRAM_GMS_DISABLED) { 209 if (bootverbose) 210 printf("I810: disabled, not probing\n"); 211 return ENXIO; 212 } 213 } else { /* I830MG */ 214 unsigned int gcc1; 215 gcc1 = pci_read_config(bdev, AGP_I830_GCC1, 1); 216 if ((gcc1 & AGP_I830_GCC1_DEV2) == AGP_I830_GCC1_DEV2_DISABLED) { 217 if (bootverbose) 218 printf("I830: disabled, not probing\n"); 219 return ENXIO; 220 } 221 } 222 223 device_verbose(dev); 224 device_set_desc(dev, desc); 225 return 0; 226 } 227 228 return ENXIO; 229 } 230 231 static int 232 agp_i810_attach(device_t dev) 233 { 234 struct agp_i810_softc *sc = device_get_softc(dev); 235 struct agp_gatt *gatt; 236 int error, rid; 237 238 sc->bdev = agp_i810_find_bridge(dev); 239 if (!sc->bdev) 240 return ENOENT; 241 242 error = agp_generic_attach(dev); 243 if (error) 244 return error; 245 246 switch (pci_get_devid(dev)) { 247 case 0x71218086: 248 case 0x71238086: 249 case 0x71258086: 250 case 0x11328086: 251 sc->chiptype = CHIP_I810; 252 break; 253 case 0x35778086: 254 case 0x25628086: 255 sc->chiptype = CHIP_I830; 256 break; 257 case 0x35828086: 258 case 0x25728086: 259 sc->chiptype = CHIP_I855; 260 break; 261 }; 262 263 /* Same for i810 and i830 */ 264 rid = AGP_I810_MMADR; 265 sc->regs = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 266 0, ~0, 1, RF_ACTIVE); 267 if (!sc->regs) { 268 agp_generic_detach(dev); 269 return ENOMEM; 270 } 271 sc->bst = rman_get_bustag(sc->regs); 272 sc->bsh = rman_get_bushandle(sc->regs); 273 274 sc->initial_aperture = AGP_GET_APERTURE(dev); 275 276 gatt = malloc( sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 277 if (!gatt) { 278 agp_generic_detach(dev); 279 return ENOMEM; 280 } 281 sc->gatt = gatt; 282 283 gatt->ag_entries = AGP_GET_APERTURE(dev) >> AGP_PAGE_SHIFT; 284 285 if ( sc->chiptype == CHIP_I810 ) { 286 /* Some i810s have on-chip memory called dcache */ 287 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED) 288 sc->dcache_size = 4 * 1024 * 1024; 289 else 290 sc->dcache_size = 0; 291 292 /* According to the specs the gatt on the i810 must be 64k */ 293 gatt->ag_virtual = contigmalloc( 64 * 1024, M_AGP, 0, 294 0, ~0, PAGE_SIZE, 0); 295 if (!gatt->ag_virtual) { 296 if (bootverbose) 297 device_printf(dev, "contiguous allocation failed\n"); 298 free(gatt, M_AGP); 299 agp_generic_detach(dev); 300 return ENOMEM; 301 } 302 bzero(gatt->ag_virtual, gatt->ag_entries * sizeof(u_int32_t)); 303 304 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual); 305 agp_flush_cache(); 306 /* Install the GATT. */ 307 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1); 308 } else if ( sc->chiptype == CHIP_I830 ) { 309 /* The i830 automatically initializes the 128k gatt on boot. */ 310 unsigned int gcc1, pgtblctl; 311 312 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 1); 313 switch (gcc1 & AGP_I830_GCC1_GMS) { 314 case AGP_I830_GCC1_GMS_STOLEN_512: 315 sc->stolen = (512 - 132) * 1024 / 4096; 316 break; 317 case AGP_I830_GCC1_GMS_STOLEN_1024: 318 sc->stolen = (1024 - 132) * 1024 / 4096; 319 break; 320 case AGP_I830_GCC1_GMS_STOLEN_8192: 321 sc->stolen = (8192 - 132) * 1024 / 4096; 322 break; 323 default: 324 sc->stolen = 0; 325 device_printf(dev, "unknown memory configuration, disabling\n"); 326 agp_generic_detach(dev); 327 return EINVAL; 328 } 329 if (sc->stolen > 0) 330 device_printf(dev, "detected %dk stolen memory\n", sc->stolen * 4); 331 device_printf(dev, "aperture size is %dM\n", sc->initial_aperture / 1024 / 1024); 332 333 /* GATT address is already in there, make sure it's enabled */ 334 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 335 pgtblctl |= 1; 336 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 337 338 gatt->ag_physical = pgtblctl & ~1; 339 } else { /* CHIP_I855 */ 340 /* The 855GM automatically initializes the 128k gatt on boot. */ 341 unsigned int gcc1, pgtblctl; 342 343 gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 1); 344 switch (gcc1 & AGP_I855_GCC1_GMS) { 345 case AGP_I855_GCC1_GMS_STOLEN_1M: 346 sc->stolen = (1024 - 132) * 1024 / 4096; 347 break; 348 case AGP_I855_GCC1_GMS_STOLEN_4M: 349 sc->stolen = (4096 - 132) * 1024 / 4096; 350 break; 351 case AGP_I855_GCC1_GMS_STOLEN_8M: 352 sc->stolen = (8192 - 132) * 1024 / 4096; 353 break; 354 case AGP_I855_GCC1_GMS_STOLEN_16M: 355 sc->stolen = (16384 - 132) * 1024 / 4096; 356 break; 357 case AGP_I855_GCC1_GMS_STOLEN_32M: 358 sc->stolen = (32768 - 132) * 1024 / 4096; 359 break; 360 default: 361 sc->stolen = 0; 362 device_printf(dev, "unknown memory configuration, disabling\n"); 363 agp_generic_detach(dev); 364 return EINVAL; 365 } 366 if (sc->stolen > 0) 367 device_printf(dev, "detected %dk stolen memory\n", sc->stolen * 4); 368 device_printf(dev, "aperture size is %dM\n", sc->initial_aperture / 1024 / 1024); 369 370 /* GATT address is already in there, make sure it's enabled */ 371 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 372 pgtblctl |= 1; 373 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 374 375 gatt->ag_physical = pgtblctl & ~1; 376 } 377 378 return 0; 379 } 380 381 static int 382 agp_i810_detach(device_t dev) 383 { 384 struct agp_i810_softc *sc = device_get_softc(dev); 385 int error; 386 387 error = agp_generic_detach(dev); 388 if (error) 389 return error; 390 391 /* Clear the GATT base. */ 392 if ( sc->chiptype == CHIP_I810 ) { 393 WRITE4(AGP_I810_PGTBL_CTL, 0); 394 } else { 395 unsigned int pgtblctl; 396 pgtblctl = READ4(AGP_I810_PGTBL_CTL); 397 pgtblctl &= ~1; 398 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl); 399 } 400 401 /* Put the aperture back the way it started. */ 402 AGP_SET_APERTURE(dev, sc->initial_aperture); 403 404 if ( sc->chiptype == CHIP_I810 ) { 405 contigfree(sc->gatt->ag_virtual, 64 * 1024, M_AGP); 406 } 407 free(sc->gatt, M_AGP); 408 409 bus_release_resource(dev, SYS_RES_MEMORY, 410 AGP_I810_MMADR, sc->regs); 411 412 return 0; 413 } 414 415 static u_int32_t 416 agp_i810_get_aperture(device_t dev) 417 { 418 struct agp_i810_softc *sc = device_get_softc(dev); 419 420 if ( sc->chiptype == CHIP_I810 ) { 421 u_int16_t miscc; 422 miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2); 423 if ((miscc & AGP_I810_MISCC_WINSIZE) == AGP_I810_MISCC_WINSIZE_32) 424 return 32 * 1024 * 1024; 425 else 426 return 64 * 1024 * 1024; 427 } else if ( sc->chiptype == CHIP_I830 ) { 428 unsigned int gcc1; 429 430 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2); 431 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64) 432 return 64 * 1024 * 1024; 433 else 434 return 128 * 1024 * 1024; 435 } else { /* CHIP_I855 */ 436 return 128 * 1024 * 1024; 437 } 438 } 439 440 static int 441 agp_i810_set_aperture(device_t dev, u_int32_t aperture) 442 { 443 struct agp_i810_softc *sc = device_get_softc(dev); 444 u_int16_t miscc; 445 446 if ( sc->chiptype == CHIP_I810 ) { 447 /* 448 * Double check for sanity. 449 */ 450 if (aperture != 32 * 1024 * 1024 && aperture != 64 * 1024 * 1024) { 451 device_printf(dev, "bad aperture size %d\n", aperture); 452 return EINVAL; 453 } 454 455 miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2); 456 miscc &= ~AGP_I810_MISCC_WINSIZE; 457 if (aperture == 32 * 1024 * 1024) 458 miscc |= AGP_I810_MISCC_WINSIZE_32; 459 else 460 miscc |= AGP_I810_MISCC_WINSIZE_64; 461 462 pci_write_config(sc->bdev, AGP_I810_MISCC, miscc, 2); 463 } else if ( sc->chiptype == CHIP_I830 ) { 464 unsigned int gcc1; 465 466 if (aperture != 64 * 1024 * 1024 && aperture != 128 * 1024 * 1024) { 467 device_printf(dev, "bad aperture size %d\n", aperture); 468 return EINVAL; 469 } 470 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2); 471 gcc1 &= ~AGP_I830_GCC1_GMASIZE; 472 if (aperture == 64 * 1024 * 1024) 473 gcc1 |= AGP_I830_GCC1_GMASIZE_64; 474 else 475 gcc1 |= AGP_I830_GCC1_GMASIZE_128; 476 477 pci_write_config(sc->bdev, AGP_I830_GCC1, gcc1, 2); 478 } else { /* CHIP_I855 */ 479 if (aperture != 128 * 1024 * 1024) { 480 device_printf(dev, "bad aperture size %d\n", aperture); 481 return EINVAL; 482 } 483 } 484 485 return 0; 486 } 487 488 static int 489 agp_i810_bind_page(device_t dev, int offset, vm_offset_t physical) 490 { 491 struct agp_i810_softc *sc = device_get_softc(dev); 492 493 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) { 494 device_printf(dev, "failed: offset is 0x%08x, shift is %d, entries is %d\n", offset, AGP_PAGE_SHIFT, sc->gatt->ag_entries); 495 return EINVAL; 496 } 497 498 if ( sc->chiptype != CHIP_I810 ) { 499 if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) { 500 device_printf(dev, "trying to bind into stolen memory"); 501 return EINVAL; 502 } 503 } 504 505 WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, physical | 1); 506 return 0; 507 } 508 509 static int 510 agp_i810_unbind_page(device_t dev, int offset) 511 { 512 struct agp_i810_softc *sc = device_get_softc(dev); 513 514 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 515 return EINVAL; 516 517 if ( sc->chiptype != CHIP_I810 ) { 518 if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) { 519 device_printf(dev, "trying to unbind from stolen memory"); 520 return EINVAL; 521 } 522 } 523 524 WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, 0); 525 return 0; 526 } 527 528 /* 529 * Writing via memory mapped registers already flushes all TLBs. 530 */ 531 static void 532 agp_i810_flush_tlb(device_t dev) 533 { 534 } 535 536 static int 537 agp_i810_enable(device_t dev, u_int32_t mode) 538 { 539 540 return 0; 541 } 542 543 static struct agp_memory * 544 agp_i810_alloc_memory(device_t dev, int type, vm_size_t size) 545 { 546 struct agp_i810_softc *sc = device_get_softc(dev); 547 struct agp_memory *mem; 548 549 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 550 return 0; 551 552 if (sc->agp.as_allocated + size > sc->agp.as_maxmem) 553 return 0; 554 555 if (type == 1) { 556 /* 557 * Mapping local DRAM into GATT. 558 */ 559 if ( sc->chiptype != CHIP_I810 ) 560 return 0; 561 if (size != sc->dcache_size) 562 return 0; 563 } else if (type == 2) { 564 /* 565 * Bogus mapping of a single page for the hardware cursor. 566 */ 567 if (size != AGP_PAGE_SIZE) 568 return 0; 569 } 570 571 mem = malloc(sizeof *mem, M_AGP, M_WAITOK); 572 mem->am_id = sc->agp.as_nextid++; 573 mem->am_size = size; 574 mem->am_type = type; 575 if (type != 1) 576 mem->am_obj = vm_object_allocate(OBJT_DEFAULT, 577 atop(round_page(size))); 578 else 579 mem->am_obj = 0; 580 581 if (type == 2) { 582 /* 583 * Allocate and wire down the page now so that we can 584 * get its physical address. 585 */ 586 vm_page_t m; 587 588 VM_OBJECT_LOCK(mem->am_obj); 589 m = vm_page_grab(mem->am_obj, 0, 590 VM_ALLOC_WIRED | VM_ALLOC_ZERO | VM_ALLOC_RETRY); 591 VM_OBJECT_UNLOCK(mem->am_obj); 592 if ((m->flags & PG_ZERO) == 0) 593 pmap_zero_page(m); 594 vm_page_lock_queues(); 595 mem->am_physical = VM_PAGE_TO_PHYS(m); 596 vm_page_wakeup(m); 597 vm_page_unlock_queues(); 598 } else { 599 mem->am_physical = 0; 600 } 601 602 mem->am_offset = 0; 603 mem->am_is_bound = 0; 604 TAILQ_INSERT_TAIL(&sc->agp.as_memory, mem, am_link); 605 sc->agp.as_allocated += size; 606 607 return mem; 608 } 609 610 static int 611 agp_i810_free_memory(device_t dev, struct agp_memory *mem) 612 { 613 struct agp_i810_softc *sc = device_get_softc(dev); 614 615 if (mem->am_is_bound) 616 return EBUSY; 617 618 if (mem->am_type == 2) { 619 /* 620 * Unwire the page which we wired in alloc_memory. 621 */ 622 vm_page_t m; 623 624 VM_OBJECT_LOCK(mem->am_obj); 625 m = vm_page_lookup(mem->am_obj, 0); 626 VM_OBJECT_UNLOCK(mem->am_obj); 627 vm_page_lock_queues(); 628 vm_page_unwire(m, 0); 629 vm_page_unlock_queues(); 630 } 631 632 sc->agp.as_allocated -= mem->am_size; 633 TAILQ_REMOVE(&sc->agp.as_memory, mem, am_link); 634 if (mem->am_obj) 635 vm_object_deallocate(mem->am_obj); 636 free(mem, M_AGP); 637 return 0; 638 } 639 640 static int 641 agp_i810_bind_memory(device_t dev, struct agp_memory *mem, 642 vm_offset_t offset) 643 { 644 struct agp_i810_softc *sc = device_get_softc(dev); 645 vm_offset_t i; 646 647 if (mem->am_type != 1) 648 return agp_generic_bind_memory(dev, mem, offset); 649 650 if ( sc->chiptype != CHIP_I810 ) 651 return EINVAL; 652 653 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) { 654 WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, 655 i | 3); 656 } 657 658 return 0; 659 } 660 661 static int 662 agp_i810_unbind_memory(device_t dev, struct agp_memory *mem) 663 { 664 struct agp_i810_softc *sc = device_get_softc(dev); 665 vm_offset_t i; 666 667 if (mem->am_type != 1) 668 return agp_generic_unbind_memory(dev, mem); 669 670 if ( sc->chiptype != CHIP_I810 ) 671 return EINVAL; 672 673 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 674 WRITE4(AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, 0); 675 676 return 0; 677 } 678 679 static device_method_t agp_i810_methods[] = { 680 /* Device interface */ 681 DEVMETHOD(device_probe, agp_i810_probe), 682 DEVMETHOD(device_attach, agp_i810_attach), 683 DEVMETHOD(device_detach, agp_i810_detach), 684 DEVMETHOD(device_shutdown, bus_generic_shutdown), 685 DEVMETHOD(device_suspend, bus_generic_suspend), 686 DEVMETHOD(device_resume, bus_generic_resume), 687 688 /* AGP interface */ 689 DEVMETHOD(agp_get_aperture, agp_i810_get_aperture), 690 DEVMETHOD(agp_set_aperture, agp_i810_set_aperture), 691 DEVMETHOD(agp_bind_page, agp_i810_bind_page), 692 DEVMETHOD(agp_unbind_page, agp_i810_unbind_page), 693 DEVMETHOD(agp_flush_tlb, agp_i810_flush_tlb), 694 DEVMETHOD(agp_enable, agp_i810_enable), 695 DEVMETHOD(agp_alloc_memory, agp_i810_alloc_memory), 696 DEVMETHOD(agp_free_memory, agp_i810_free_memory), 697 DEVMETHOD(agp_bind_memory, agp_i810_bind_memory), 698 DEVMETHOD(agp_unbind_memory, agp_i810_unbind_memory), 699 700 { 0, 0 } 701 }; 702 703 static driver_t agp_i810_driver = { 704 "agp", 705 agp_i810_methods, 706 sizeof(struct agp_i810_softc), 707 }; 708 709 static devclass_t agp_devclass; 710 711 DRIVER_MODULE(agp_i810, pci, agp_i810_driver, agp_devclass, 0, 0); 712 MODULE_DEPEND(agp_i810, agp, 1, 1, 1); 713 MODULE_DEPEND(agp_i810, pci, 1, 1, 1); 714