1 /*- 2 * Copyright (c) 2000 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #include "opt_bus.h" 30 #include "opt_pci.h" 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/malloc.h> 35 #include <sys/kernel.h> 36 #include <sys/bus.h> 37 #include <sys/lock.h> 38 39 #include <pci/pcivar.h> 40 #include <pci/pcireg.h> 41 #include <pci/agppriv.h> 42 #include <pci/agpreg.h> 43 44 #include <vm/vm.h> 45 #include <vm/vm_object.h> 46 #include <vm/pmap.h> 47 #include <machine/bus.h> 48 #include <machine/resource.h> 49 #include <sys/rman.h> 50 51 MALLOC_DECLARE(M_AGP); 52 53 #define READ2(off) bus_space_read_2(sc->bst, sc->bsh, off) 54 #define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off) 55 #define WRITE2(off,v) bus_space_write_2(sc->bst, sc->bsh, off, v) 56 #define WRITE4(off,v) bus_space_write_4(sc->bst, sc->bsh, off, v) 57 58 struct agp_amd_gatt { 59 u_int32_t ag_entries; 60 u_int32_t *ag_vdir; /* virtual address of page dir */ 61 vm_offset_t ag_pdir; /* physical address of page dir */ 62 u_int32_t *ag_virtual; /* virtual address of gatt */ 63 }; 64 65 struct agp_amd_softc { 66 struct agp_softc agp; 67 struct resource *regs; /* memory mapped control registers */ 68 bus_space_tag_t bst; /* bus_space tag */ 69 bus_space_handle_t bsh; /* bus_space handle */ 70 u_int32_t initial_aperture; /* aperture size at startup */ 71 struct agp_amd_gatt *gatt; 72 }; 73 74 static struct agp_amd_gatt * 75 agp_amd_alloc_gatt(device_t dev) 76 { 77 u_int32_t apsize = AGP_GET_APERTURE(dev); 78 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 79 struct agp_amd_gatt *gatt; 80 int i, npages; 81 82 if (bootverbose) 83 device_printf(dev, 84 "allocating GATT for aperture of size %dM\n", 85 apsize / (1024*1024)); 86 87 gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT); 88 if (!gatt) 89 return 0; 90 91 /* 92 * The AMD751 uses a page directory to map a non-contiguous 93 * gatt so we don't need to use contigmalloc. 94 */ 95 gatt->ag_entries = entries; 96 gatt->ag_virtual = malloc(entries * sizeof(u_int32_t), 97 M_AGP, M_NOWAIT); 98 if (!gatt->ag_virtual) { 99 if (bootverbose) 100 device_printf(dev, "allocation failed\n"); 101 free(gatt, M_AGP); 102 return 0; 103 } 104 bzero(gatt->ag_virtual, entries * sizeof(u_int32_t)); 105 106 /* 107 * Allocate the page directory. 108 */ 109 gatt->ag_vdir = malloc(AGP_PAGE_SIZE, M_AGP, M_NOWAIT); 110 if (!gatt->ag_vdir) { 111 if (bootverbose) 112 device_printf(dev, 113 "failed to allocate page directory\n"); 114 free(gatt->ag_virtual, M_AGP); 115 free(gatt, M_AGP); 116 return 0; 117 } 118 bzero(gatt->ag_vdir, AGP_PAGE_SIZE); 119 gatt->ag_pdir = vtophys((vm_offset_t) gatt->ag_vdir); 120 gatt->ag_pdir = vtophys(gatt->ag_virtual); 121 122 /* 123 * Map the pages of the GATT into the page directory. 124 */ 125 npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1) 126 >> AGP_PAGE_SHIFT); 127 for (i = 0; i < npages; i++) { 128 vm_offset_t va; 129 vm_offset_t pa; 130 131 va = ((vm_offset_t) gatt->ag_virtual) + i * AGP_PAGE_SIZE; 132 pa = vtophys(va); 133 gatt->ag_vdir[i] = pa | 1; 134 } 135 136 /* 137 * Make sure the chipset can see everything. 138 */ 139 agp_flush_cache(); 140 141 return gatt; 142 } 143 144 static void 145 agp_amd_free_gatt(struct agp_amd_gatt *gatt) 146 { 147 free(gatt->ag_virtual, M_AGP); 148 free(gatt->ag_vdir, M_AGP); 149 free(gatt, M_AGP); 150 } 151 152 static const char* 153 agp_amd_match(device_t dev) 154 { 155 if (pci_get_class(dev) != PCIC_BRIDGE 156 || pci_get_subclass(dev) != PCIS_BRIDGE_HOST) 157 return NULL; 158 159 if (agp_find_caps(dev) == 0) 160 return NULL; 161 162 switch (pci_get_devid(dev)) { 163 case 0x70061022: 164 return ("AMD 751 host to AGP bridge"); 165 }; 166 167 return NULL; 168 } 169 170 static int 171 agp_amd_probe(device_t dev) 172 { 173 const char *desc; 174 175 desc = agp_amd_match(dev); 176 if (desc) { 177 device_verbose(dev); 178 device_set_desc(dev, desc); 179 return 0; 180 } 181 182 return ENXIO; 183 } 184 185 static int 186 agp_amd_attach(device_t dev) 187 { 188 struct agp_amd_softc *sc = device_get_softc(dev); 189 struct agp_amd_gatt *gatt; 190 int error, rid; 191 192 error = agp_generic_attach(dev); 193 if (error) 194 return error; 195 196 rid = AGP_AMD751_REGISTERS; 197 sc->regs = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 198 0, ~0, 1, RF_ACTIVE); 199 if (!sc->regs) { 200 agp_generic_detach(dev); 201 return ENOMEM; 202 } 203 204 sc->bst = rman_get_bustag(sc->regs); 205 sc->bsh = rman_get_bushandle(sc->regs); 206 207 sc->initial_aperture = AGP_GET_APERTURE(dev); 208 209 for (;;) { 210 gatt = agp_amd_alloc_gatt(dev); 211 if (gatt) 212 break; 213 214 /* 215 * Probably contigmalloc failure. Try reducing the 216 * aperture so that the gatt size reduces. 217 */ 218 if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) 219 return ENOMEM; 220 } 221 sc->gatt = gatt; 222 223 /* Install the gatt. */ 224 WRITE4(AGP_AMD751_ATTBASE, gatt->ag_pdir); 225 226 /* Enable synchronisation between host and agp. */ 227 pci_write_config(dev, 228 AGP_AMD751_MODECTRL, 229 AGP_AMD751_MODECTRL_SYNEN, 1); 230 231 /* Set indexing mode for two-level and enable page dir cache */ 232 pci_write_config(dev, 233 AGP_AMD751_MODECTRL2, 234 AGP_AMD751_MODECTRL2_GPDCE, 1); 235 236 /* Enable the TLB and flush */ 237 WRITE2(AGP_AMD751_STATUS, 238 READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE); 239 AGP_FLUSH_TLB(dev); 240 241 return 0; 242 } 243 244 static int 245 agp_amd_detach(device_t dev) 246 { 247 struct agp_amd_softc *sc = device_get_softc(dev); 248 int error; 249 250 error = agp_generic_detach(dev); 251 if (error) 252 return error; 253 254 /* Disable the TLB.. */ 255 WRITE2(AGP_AMD751_STATUS, 256 READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE); 257 258 /* Disable host-agp sync */ 259 pci_write_config(dev, AGP_AMD751_MODECTRL, 0x00, 1); 260 261 /* Clear the GATT base */ 262 WRITE4(AGP_AMD751_ATTBASE, 0); 263 264 /* Put the aperture back the way it started. */ 265 AGP_SET_APERTURE(dev, sc->initial_aperture); 266 267 agp_amd_free_gatt(sc->gatt); 268 269 bus_release_resource(dev, SYS_RES_MEMORY, 270 AGP_AMD751_REGISTERS, sc->regs); 271 272 return 0; 273 } 274 275 static u_int32_t 276 agp_amd_get_aperture(device_t dev) 277 { 278 int vas; 279 280 /* 281 * The aperture size is equal to 32M<<vas. 282 */ 283 vas = (pci_read_config(dev, AGP_AMD751_APCTRL, 1) & 0x06) >> 1; 284 return (32*1024*1024) << vas; 285 } 286 287 static int 288 agp_amd_set_aperture(device_t dev, u_int32_t aperture) 289 { 290 int vas; 291 292 /* 293 * Check for a power of two and make sure its within the 294 * programmable range. 295 */ 296 if (aperture & (aperture - 1) 297 || aperture < 32*1024*1024 298 || aperture > 2U*1024*1024*1024) 299 return EINVAL; 300 301 vas = ffs(aperture / 32*1024*1024) - 1; 302 303 pci_write_config(dev, AGP_AMD751_APCTRL, 304 ((pci_read_config(dev, AGP_AMD751_APCTRL, 1) & ~0x06) 305 | vas << 1), 1); 306 307 return 0; 308 } 309 310 static int 311 agp_amd_bind_page(device_t dev, int offset, vm_offset_t physical) 312 { 313 struct agp_amd_softc *sc = device_get_softc(dev); 314 315 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 316 return EINVAL; 317 318 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1; 319 return 0; 320 } 321 322 static int 323 agp_amd_unbind_page(device_t dev, int offset) 324 { 325 struct agp_amd_softc *sc = device_get_softc(dev); 326 327 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 328 return EINVAL; 329 330 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0; 331 return 0; 332 } 333 334 static void 335 agp_amd_flush_tlb(device_t dev) 336 { 337 struct agp_amd_softc *sc = device_get_softc(dev); 338 339 /* Set the cache invalidate bit and wait for the chipset to clear */ 340 WRITE4(AGP_AMD751_TLBCTRL, 1); 341 do { 342 DELAY(1); 343 } while (READ4(AGP_AMD751_TLBCTRL)); 344 } 345 346 static device_method_t agp_amd_methods[] = { 347 /* Device interface */ 348 DEVMETHOD(device_probe, agp_amd_probe), 349 DEVMETHOD(device_attach, agp_amd_attach), 350 DEVMETHOD(device_detach, agp_amd_detach), 351 DEVMETHOD(device_shutdown, bus_generic_shutdown), 352 DEVMETHOD(device_suspend, bus_generic_suspend), 353 DEVMETHOD(device_resume, bus_generic_resume), 354 355 /* AGP interface */ 356 DEVMETHOD(agp_get_aperture, agp_amd_get_aperture), 357 DEVMETHOD(agp_set_aperture, agp_amd_set_aperture), 358 DEVMETHOD(agp_bind_page, agp_amd_bind_page), 359 DEVMETHOD(agp_unbind_page, agp_amd_unbind_page), 360 DEVMETHOD(agp_flush_tlb, agp_amd_flush_tlb), 361 DEVMETHOD(agp_enable, agp_generic_enable), 362 DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory), 363 DEVMETHOD(agp_free_memory, agp_generic_free_memory), 364 DEVMETHOD(agp_bind_memory, agp_generic_bind_memory), 365 DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory), 366 367 { 0, 0 } 368 }; 369 370 static driver_t agp_amd_driver = { 371 "agp", 372 agp_amd_methods, 373 sizeof(struct agp_amd_softc), 374 }; 375 376 static devclass_t agp_devclass; 377 378 DRIVER_MODULE(agp_amd, pci, agp_amd_driver, agp_devclass, 0, 0); 379