1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2000 Doug Rabson 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/malloc.h> 35 #include <sys/kernel.h> 36 #include <sys/module.h> 37 #include <sys/bus.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/proc.h> 41 42 #include <dev/agp/agppriv.h> 43 #include <dev/agp/agpreg.h> 44 #include <dev/pci/pcivar.h> 45 #include <dev/pci/pcireg.h> 46 47 #include <vm/vm.h> 48 #include <vm/vm_extern.h> 49 #include <vm/vm_kern.h> 50 #include <vm/vm_object.h> 51 #include <vm/pmap.h> 52 #include <machine/bus.h> 53 #include <machine/resource.h> 54 #include <sys/rman.h> 55 56 MALLOC_DECLARE(M_AGP); 57 58 #define READ2(off) bus_space_read_2(sc->bst, sc->bsh, off) 59 #define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off) 60 #define WRITE2(off,v) bus_space_write_2(sc->bst, sc->bsh, off, v) 61 #define WRITE4(off,v) bus_space_write_4(sc->bst, sc->bsh, off, v) 62 63 struct agp_amd_gatt { 64 u_int32_t ag_entries; 65 u_int32_t *ag_virtual; /* virtual address of gatt */ 66 vm_offset_t ag_physical; 67 u_int32_t *ag_vdir; /* virtual address of page dir */ 68 vm_offset_t ag_pdir; /* physical address of page dir */ 69 }; 70 71 struct agp_amd_softc { 72 struct agp_softc agp; 73 struct resource *regs; /* memory mapped control registers */ 74 bus_space_tag_t bst; /* bus_space tag */ 75 bus_space_handle_t bsh; /* bus_space handle */ 76 u_int32_t initial_aperture; /* aperture size at startup */ 77 struct agp_amd_gatt *gatt; 78 }; 79 80 static struct agp_amd_gatt * 81 agp_amd_alloc_gatt(device_t dev) 82 { 83 u_int32_t apsize = AGP_GET_APERTURE(dev); 84 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 85 struct agp_amd_gatt *gatt; 86 int i, npages, pdir_offset; 87 88 if (bootverbose) 89 device_printf(dev, 90 "allocating GATT for aperture of size %dM\n", 91 apsize / (1024*1024)); 92 93 gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT); 94 if (!gatt) 95 return 0; 96 97 /* 98 * The AMD751 uses a page directory to map a non-contiguous 99 * gatt so we don't need to use kmem_alloc_contig. 100 * Allocate individual GATT pages and map them into the page 101 * directory. 102 */ 103 gatt->ag_entries = entries; 104 gatt->ag_virtual = kmem_alloc_attr(entries * sizeof(uint32_t), 105 M_NOWAIT | M_ZERO, 0, ~0, VM_MEMATTR_WRITE_COMBINING); 106 if (!gatt->ag_virtual) { 107 if (bootverbose) 108 device_printf(dev, "allocation failed\n"); 109 free(gatt, M_AGP); 110 return 0; 111 } 112 113 /* 114 * Allocate the page directory. 115 */ 116 gatt->ag_vdir = kmem_alloc_attr(AGP_PAGE_SIZE, M_NOWAIT | 117 M_ZERO, 0, ~0, VM_MEMATTR_WRITE_COMBINING); 118 if (!gatt->ag_vdir) { 119 if (bootverbose) 120 device_printf(dev, 121 "failed to allocate page directory\n"); 122 kmem_free(gatt->ag_virtual, entries * sizeof(uint32_t)); 123 free(gatt, M_AGP); 124 return 0; 125 } 126 127 gatt->ag_pdir = vtophys((vm_offset_t) gatt->ag_vdir); 128 if(bootverbose) 129 device_printf(dev, "gatt -> ag_pdir %#lx\n", 130 (u_long)gatt->ag_pdir); 131 /* 132 * Allocate the gatt pages 133 */ 134 gatt->ag_entries = entries; 135 if(bootverbose) 136 device_printf(dev, "allocating GATT for %d AGP page entries\n", 137 gatt->ag_entries); 138 139 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual); 140 141 /* 142 * Map the pages of the GATT into the page directory. 143 * 144 * The GATT page addresses are mapped into the directory offset by 145 * an amount dependent on the base address of the aperture. This 146 * is and offset into the page directory, not an offset added to 147 * the addresses of the gatt pages. 148 */ 149 150 pdir_offset = pci_read_config(dev, AGP_AMD751_APBASE, 4) >> 22; 151 152 npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1) 153 >> AGP_PAGE_SHIFT); 154 155 for (i = 0; i < npages; i++) { 156 vm_offset_t va; 157 vm_offset_t pa; 158 159 va = ((vm_offset_t) gatt->ag_virtual) + i * AGP_PAGE_SIZE; 160 pa = vtophys(va); 161 gatt->ag_vdir[i + pdir_offset] = pa | 1; 162 } 163 164 return gatt; 165 } 166 167 static void 168 agp_amd_free_gatt(struct agp_amd_gatt *gatt) 169 { 170 kmem_free(gatt->ag_vdir, AGP_PAGE_SIZE); 171 kmem_free(gatt->ag_virtual, gatt->ag_entries * sizeof(uint32_t)); 172 free(gatt, M_AGP); 173 } 174 175 static const char* 176 agp_amd_match(device_t dev) 177 { 178 if (pci_get_class(dev) != PCIC_BRIDGE 179 || pci_get_subclass(dev) != PCIS_BRIDGE_HOST) 180 return NULL; 181 182 if (agp_find_caps(dev) == 0) 183 return NULL; 184 185 switch (pci_get_devid(dev)) { 186 case 0x70061022: 187 return ("AMD 751 host to AGP bridge"); 188 case 0x700e1022: 189 return ("AMD 761 host to AGP bridge"); 190 case 0x700c1022: 191 return ("AMD 762 host to AGP bridge"); 192 } 193 194 return NULL; 195 } 196 197 static int 198 agp_amd_probe(device_t dev) 199 { 200 const char *desc; 201 202 if (resource_disabled("agp", device_get_unit(dev))) 203 return (ENXIO); 204 desc = agp_amd_match(dev); 205 if (desc) { 206 device_set_desc(dev, desc); 207 return BUS_PROBE_DEFAULT; 208 } 209 210 return ENXIO; 211 } 212 213 static int 214 agp_amd_attach(device_t dev) 215 { 216 struct agp_amd_softc *sc = device_get_softc(dev); 217 struct agp_amd_gatt *gatt; 218 int error, rid; 219 220 error = agp_generic_attach(dev); 221 if (error) 222 return error; 223 224 rid = AGP_AMD751_REGISTERS; 225 sc->regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 226 RF_ACTIVE); 227 if (!sc->regs) { 228 agp_generic_detach(dev); 229 return ENOMEM; 230 } 231 232 sc->bst = rman_get_bustag(sc->regs); 233 sc->bsh = rman_get_bushandle(sc->regs); 234 235 sc->initial_aperture = AGP_GET_APERTURE(dev); 236 237 for (;;) { 238 gatt = agp_amd_alloc_gatt(dev); 239 if (gatt) 240 break; 241 242 /* 243 * Probably contigmalloc failure. Try reducing the 244 * aperture so that the gatt size reduces. 245 */ 246 if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) 247 return ENOMEM; 248 } 249 sc->gatt = gatt; 250 251 /* Install the gatt. */ 252 WRITE4(AGP_AMD751_ATTBASE, gatt->ag_pdir); 253 254 /* Enable synchronisation between host and agp. */ 255 pci_write_config(dev, 256 AGP_AMD751_MODECTRL, 257 AGP_AMD751_MODECTRL_SYNEN, 1); 258 259 /* Set indexing mode for two-level and enable page dir cache */ 260 pci_write_config(dev, 261 AGP_AMD751_MODECTRL2, 262 AGP_AMD751_MODECTRL2_GPDCE, 1); 263 264 /* Enable the TLB and flush */ 265 WRITE2(AGP_AMD751_STATUS, 266 READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE); 267 AGP_FLUSH_TLB(dev); 268 269 return 0; 270 } 271 272 static int 273 agp_amd_detach(device_t dev) 274 { 275 struct agp_amd_softc *sc = device_get_softc(dev); 276 277 agp_free_cdev(dev); 278 279 /* Disable the TLB.. */ 280 WRITE2(AGP_AMD751_STATUS, 281 READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE); 282 283 /* Disable host-agp sync */ 284 pci_write_config(dev, AGP_AMD751_MODECTRL, 0x00, 1); 285 286 /* Clear the GATT base */ 287 WRITE4(AGP_AMD751_ATTBASE, 0); 288 289 /* Put the aperture back the way it started. */ 290 AGP_SET_APERTURE(dev, sc->initial_aperture); 291 292 agp_amd_free_gatt(sc->gatt); 293 agp_free_res(dev); 294 295 bus_release_resource(dev, SYS_RES_MEMORY, 296 AGP_AMD751_REGISTERS, sc->regs); 297 298 return 0; 299 } 300 301 static u_int32_t 302 agp_amd_get_aperture(device_t dev) 303 { 304 int vas; 305 306 /* 307 * The aperture size is equal to 32M<<vas. 308 */ 309 vas = (pci_read_config(dev, AGP_AMD751_APCTRL, 1) & 0x06) >> 1; 310 return (32*1024*1024) << vas; 311 } 312 313 static int 314 agp_amd_set_aperture(device_t dev, u_int32_t aperture) 315 { 316 int vas; 317 318 /* 319 * Check for a power of two and make sure its within the 320 * programmable range. 321 */ 322 if (aperture & (aperture - 1) 323 || aperture < 32*1024*1024 324 || aperture > 2U*1024*1024*1024) 325 return EINVAL; 326 327 vas = ffs(aperture / 32*1024*1024) - 1; 328 329 /* 330 * While the size register is bits 1-3 of APCTRL, bit 0 must be 331 * set for the size value to be 'valid' 332 */ 333 pci_write_config(dev, AGP_AMD751_APCTRL, 334 (((pci_read_config(dev, AGP_AMD751_APCTRL, 1) & ~0x06) 335 | ((vas << 1) | 1))), 1); 336 337 return 0; 338 } 339 340 static int 341 agp_amd_bind_page(device_t dev, vm_offset_t offset, vm_offset_t physical) 342 { 343 struct agp_amd_softc *sc = device_get_softc(dev); 344 345 if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 346 return EINVAL; 347 348 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1; 349 return 0; 350 } 351 352 static int 353 agp_amd_unbind_page(device_t dev, vm_offset_t offset) 354 { 355 struct agp_amd_softc *sc = device_get_softc(dev); 356 357 if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 358 return EINVAL; 359 360 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0; 361 return 0; 362 } 363 364 static void 365 agp_amd_flush_tlb(device_t dev) 366 { 367 struct agp_amd_softc *sc = device_get_softc(dev); 368 369 /* Set the cache invalidate bit and wait for the chipset to clear */ 370 WRITE4(AGP_AMD751_TLBCTRL, 1); 371 do { 372 DELAY(1); 373 } while (READ4(AGP_AMD751_TLBCTRL)); 374 } 375 376 static device_method_t agp_amd_methods[] = { 377 /* Device interface */ 378 DEVMETHOD(device_probe, agp_amd_probe), 379 DEVMETHOD(device_attach, agp_amd_attach), 380 DEVMETHOD(device_detach, agp_amd_detach), 381 DEVMETHOD(device_shutdown, bus_generic_shutdown), 382 DEVMETHOD(device_suspend, bus_generic_suspend), 383 DEVMETHOD(device_resume, bus_generic_resume), 384 385 /* AGP interface */ 386 DEVMETHOD(agp_get_aperture, agp_amd_get_aperture), 387 DEVMETHOD(agp_set_aperture, agp_amd_set_aperture), 388 DEVMETHOD(agp_bind_page, agp_amd_bind_page), 389 DEVMETHOD(agp_unbind_page, agp_amd_unbind_page), 390 DEVMETHOD(agp_flush_tlb, agp_amd_flush_tlb), 391 DEVMETHOD(agp_enable, agp_generic_enable), 392 DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory), 393 DEVMETHOD(agp_free_memory, agp_generic_free_memory), 394 DEVMETHOD(agp_bind_memory, agp_generic_bind_memory), 395 DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory), 396 { 0, 0 } 397 }; 398 399 static driver_t agp_amd_driver = { 400 "agp", 401 agp_amd_methods, 402 sizeof(struct agp_amd_softc), 403 }; 404 405 DRIVER_MODULE(agp_amd, hostb, agp_amd_driver, 0, 0); 406 MODULE_DEPEND(agp_amd, agp, 1, 1, 1); 407 MODULE_DEPEND(agp_amd, pci, 1, 1, 1); 408