1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2000 Doug Rabson 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/malloc.h> 35 #include <sys/kernel.h> 36 #include <sys/module.h> 37 #include <sys/bus.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/proc.h> 41 42 #include <dev/agp/agppriv.h> 43 #include <dev/agp/agpreg.h> 44 #include <dev/pci/pcivar.h> 45 #include <dev/pci/pcireg.h> 46 47 #include <vm/vm.h> 48 #include <vm/vm_extern.h> 49 #include <vm/vm_kern.h> 50 #include <vm/vm_object.h> 51 #include <vm/pmap.h> 52 #include <machine/bus.h> 53 #include <machine/resource.h> 54 #include <sys/rman.h> 55 56 MALLOC_DECLARE(M_AGP); 57 58 #define READ2(off) bus_space_read_2(sc->bst, sc->bsh, off) 59 #define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off) 60 #define WRITE2(off,v) bus_space_write_2(sc->bst, sc->bsh, off, v) 61 #define WRITE4(off,v) bus_space_write_4(sc->bst, sc->bsh, off, v) 62 63 struct agp_amd_gatt { 64 u_int32_t ag_entries; 65 u_int32_t *ag_virtual; /* virtual address of gatt */ 66 vm_offset_t ag_physical; 67 u_int32_t *ag_vdir; /* virtual address of page dir */ 68 vm_offset_t ag_pdir; /* physical address of page dir */ 69 }; 70 71 struct agp_amd_softc { 72 struct agp_softc agp; 73 struct resource *regs; /* memory mapped control registers */ 74 bus_space_tag_t bst; /* bus_space tag */ 75 bus_space_handle_t bsh; /* bus_space handle */ 76 u_int32_t initial_aperture; /* aperture size at startup */ 77 struct agp_amd_gatt *gatt; 78 }; 79 80 static struct agp_amd_gatt * 81 agp_amd_alloc_gatt(device_t dev) 82 { 83 u_int32_t apsize = AGP_GET_APERTURE(dev); 84 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 85 struct agp_amd_gatt *gatt; 86 int i, npages, pdir_offset; 87 88 if (bootverbose) 89 device_printf(dev, 90 "allocating GATT for aperture of size %dM\n", 91 apsize / (1024*1024)); 92 93 gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT); 94 if (!gatt) 95 return 0; 96 97 /* 98 * The AMD751 uses a page directory to map a non-contiguous 99 * gatt so we don't need to use kmem_alloc_contig. 100 * Allocate individual GATT pages and map them into the page 101 * directory. 102 */ 103 gatt->ag_entries = entries; 104 gatt->ag_virtual = (void *)kmem_alloc_attr(entries * sizeof(u_int32_t), 105 M_NOWAIT | M_ZERO, 0, ~0, VM_MEMATTR_WRITE_COMBINING); 106 if (!gatt->ag_virtual) { 107 if (bootverbose) 108 device_printf(dev, "allocation failed\n"); 109 free(gatt, M_AGP); 110 return 0; 111 } 112 113 /* 114 * Allocate the page directory. 115 */ 116 gatt->ag_vdir = (void *)kmem_alloc_attr(AGP_PAGE_SIZE, M_NOWAIT | 117 M_ZERO, 0, ~0, VM_MEMATTR_WRITE_COMBINING); 118 if (!gatt->ag_vdir) { 119 if (bootverbose) 120 device_printf(dev, 121 "failed to allocate page directory\n"); 122 kmem_free((vm_offset_t)gatt->ag_virtual, entries * 123 sizeof(u_int32_t)); 124 free(gatt, M_AGP); 125 return 0; 126 } 127 128 gatt->ag_pdir = vtophys((vm_offset_t) gatt->ag_vdir); 129 if(bootverbose) 130 device_printf(dev, "gatt -> ag_pdir %#lx\n", 131 (u_long)gatt->ag_pdir); 132 /* 133 * Allocate the gatt pages 134 */ 135 gatt->ag_entries = entries; 136 if(bootverbose) 137 device_printf(dev, "allocating GATT for %d AGP page entries\n", 138 gatt->ag_entries); 139 140 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual); 141 142 /* 143 * Map the pages of the GATT into the page directory. 144 * 145 * The GATT page addresses are mapped into the directory offset by 146 * an amount dependent on the base address of the aperture. This 147 * is and offset into the page directory, not an offset added to 148 * the addresses of the gatt pages. 149 */ 150 151 pdir_offset = pci_read_config(dev, AGP_AMD751_APBASE, 4) >> 22; 152 153 npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1) 154 >> AGP_PAGE_SHIFT); 155 156 for (i = 0; i < npages; i++) { 157 vm_offset_t va; 158 vm_offset_t pa; 159 160 va = ((vm_offset_t) gatt->ag_virtual) + i * AGP_PAGE_SIZE; 161 pa = vtophys(va); 162 gatt->ag_vdir[i + pdir_offset] = pa | 1; 163 } 164 165 return gatt; 166 } 167 168 static void 169 agp_amd_free_gatt(struct agp_amd_gatt *gatt) 170 { 171 kmem_free((vm_offset_t)gatt->ag_vdir, AGP_PAGE_SIZE); 172 kmem_free((vm_offset_t)gatt->ag_virtual, gatt->ag_entries * 173 sizeof(u_int32_t)); 174 free(gatt, M_AGP); 175 } 176 177 static const char* 178 agp_amd_match(device_t dev) 179 { 180 if (pci_get_class(dev) != PCIC_BRIDGE 181 || pci_get_subclass(dev) != PCIS_BRIDGE_HOST) 182 return NULL; 183 184 if (agp_find_caps(dev) == 0) 185 return NULL; 186 187 switch (pci_get_devid(dev)) { 188 case 0x70061022: 189 return ("AMD 751 host to AGP bridge"); 190 case 0x700e1022: 191 return ("AMD 761 host to AGP bridge"); 192 case 0x700c1022: 193 return ("AMD 762 host to AGP bridge"); 194 } 195 196 return NULL; 197 } 198 199 static int 200 agp_amd_probe(device_t dev) 201 { 202 const char *desc; 203 204 if (resource_disabled("agp", device_get_unit(dev))) 205 return (ENXIO); 206 desc = agp_amd_match(dev); 207 if (desc) { 208 device_set_desc(dev, desc); 209 return BUS_PROBE_DEFAULT; 210 } 211 212 return ENXIO; 213 } 214 215 static int 216 agp_amd_attach(device_t dev) 217 { 218 struct agp_amd_softc *sc = device_get_softc(dev); 219 struct agp_amd_gatt *gatt; 220 int error, rid; 221 222 error = agp_generic_attach(dev); 223 if (error) 224 return error; 225 226 rid = AGP_AMD751_REGISTERS; 227 sc->regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 228 RF_ACTIVE); 229 if (!sc->regs) { 230 agp_generic_detach(dev); 231 return ENOMEM; 232 } 233 234 sc->bst = rman_get_bustag(sc->regs); 235 sc->bsh = rman_get_bushandle(sc->regs); 236 237 sc->initial_aperture = AGP_GET_APERTURE(dev); 238 239 for (;;) { 240 gatt = agp_amd_alloc_gatt(dev); 241 if (gatt) 242 break; 243 244 /* 245 * Probably contigmalloc failure. Try reducing the 246 * aperture so that the gatt size reduces. 247 */ 248 if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) 249 return ENOMEM; 250 } 251 sc->gatt = gatt; 252 253 /* Install the gatt. */ 254 WRITE4(AGP_AMD751_ATTBASE, gatt->ag_pdir); 255 256 /* Enable synchronisation between host and agp. */ 257 pci_write_config(dev, 258 AGP_AMD751_MODECTRL, 259 AGP_AMD751_MODECTRL_SYNEN, 1); 260 261 /* Set indexing mode for two-level and enable page dir cache */ 262 pci_write_config(dev, 263 AGP_AMD751_MODECTRL2, 264 AGP_AMD751_MODECTRL2_GPDCE, 1); 265 266 /* Enable the TLB and flush */ 267 WRITE2(AGP_AMD751_STATUS, 268 READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE); 269 AGP_FLUSH_TLB(dev); 270 271 return 0; 272 } 273 274 static int 275 agp_amd_detach(device_t dev) 276 { 277 struct agp_amd_softc *sc = device_get_softc(dev); 278 279 agp_free_cdev(dev); 280 281 /* Disable the TLB.. */ 282 WRITE2(AGP_AMD751_STATUS, 283 READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE); 284 285 /* Disable host-agp sync */ 286 pci_write_config(dev, AGP_AMD751_MODECTRL, 0x00, 1); 287 288 /* Clear the GATT base */ 289 WRITE4(AGP_AMD751_ATTBASE, 0); 290 291 /* Put the aperture back the way it started. */ 292 AGP_SET_APERTURE(dev, sc->initial_aperture); 293 294 agp_amd_free_gatt(sc->gatt); 295 agp_free_res(dev); 296 297 bus_release_resource(dev, SYS_RES_MEMORY, 298 AGP_AMD751_REGISTERS, sc->regs); 299 300 return 0; 301 } 302 303 static u_int32_t 304 agp_amd_get_aperture(device_t dev) 305 { 306 int vas; 307 308 /* 309 * The aperture size is equal to 32M<<vas. 310 */ 311 vas = (pci_read_config(dev, AGP_AMD751_APCTRL, 1) & 0x06) >> 1; 312 return (32*1024*1024) << vas; 313 } 314 315 static int 316 agp_amd_set_aperture(device_t dev, u_int32_t aperture) 317 { 318 int vas; 319 320 /* 321 * Check for a power of two and make sure its within the 322 * programmable range. 323 */ 324 if (aperture & (aperture - 1) 325 || aperture < 32*1024*1024 326 || aperture > 2U*1024*1024*1024) 327 return EINVAL; 328 329 vas = ffs(aperture / 32*1024*1024) - 1; 330 331 /* 332 * While the size register is bits 1-3 of APCTRL, bit 0 must be 333 * set for the size value to be 'valid' 334 */ 335 pci_write_config(dev, AGP_AMD751_APCTRL, 336 (((pci_read_config(dev, AGP_AMD751_APCTRL, 1) & ~0x06) 337 | ((vas << 1) | 1))), 1); 338 339 return 0; 340 } 341 342 static int 343 agp_amd_bind_page(device_t dev, vm_offset_t offset, vm_offset_t physical) 344 { 345 struct agp_amd_softc *sc = device_get_softc(dev); 346 347 if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 348 return EINVAL; 349 350 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1; 351 return 0; 352 } 353 354 static int 355 agp_amd_unbind_page(device_t dev, vm_offset_t offset) 356 { 357 struct agp_amd_softc *sc = device_get_softc(dev); 358 359 if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 360 return EINVAL; 361 362 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0; 363 return 0; 364 } 365 366 static void 367 agp_amd_flush_tlb(device_t dev) 368 { 369 struct agp_amd_softc *sc = device_get_softc(dev); 370 371 /* Set the cache invalidate bit and wait for the chipset to clear */ 372 WRITE4(AGP_AMD751_TLBCTRL, 1); 373 do { 374 DELAY(1); 375 } while (READ4(AGP_AMD751_TLBCTRL)); 376 } 377 378 static device_method_t agp_amd_methods[] = { 379 /* Device interface */ 380 DEVMETHOD(device_probe, agp_amd_probe), 381 DEVMETHOD(device_attach, agp_amd_attach), 382 DEVMETHOD(device_detach, agp_amd_detach), 383 DEVMETHOD(device_shutdown, bus_generic_shutdown), 384 DEVMETHOD(device_suspend, bus_generic_suspend), 385 DEVMETHOD(device_resume, bus_generic_resume), 386 387 /* AGP interface */ 388 DEVMETHOD(agp_get_aperture, agp_amd_get_aperture), 389 DEVMETHOD(agp_set_aperture, agp_amd_set_aperture), 390 DEVMETHOD(agp_bind_page, agp_amd_bind_page), 391 DEVMETHOD(agp_unbind_page, agp_amd_unbind_page), 392 DEVMETHOD(agp_flush_tlb, agp_amd_flush_tlb), 393 DEVMETHOD(agp_enable, agp_generic_enable), 394 DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory), 395 DEVMETHOD(agp_free_memory, agp_generic_free_memory), 396 DEVMETHOD(agp_bind_memory, agp_generic_bind_memory), 397 DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory), 398 { 0, 0 } 399 }; 400 401 static driver_t agp_amd_driver = { 402 "agp", 403 agp_amd_methods, 404 sizeof(struct agp_amd_softc), 405 }; 406 407 static devclass_t agp_devclass; 408 409 DRIVER_MODULE(agp_amd, hostb, agp_amd_driver, agp_devclass, 0, 0); 410 MODULE_DEPEND(agp_amd, agp, 1, 1, 1); 411 MODULE_DEPEND(agp_amd, pci, 1, 1, 1); 412