1 /*- 2 * Copyright (c) 2000 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include "opt_bus.h" 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/malloc.h> 35 #include <sys/kernel.h> 36 #include <sys/bus.h> 37 #include <sys/conf.h> 38 #include <sys/ioccom.h> 39 #include <sys/agpio.h> 40 #include <sys/lock.h> 41 #include <sys/lockmgr.h> 42 #include <sys/mutex.h> 43 #include <sys/proc.h> 44 45 #include <dev/pci/pcivar.h> 46 #include <dev/pci/pcireg.h> 47 #include <pci/agppriv.h> 48 #include <pci/agpvar.h> 49 #include <pci/agpreg.h> 50 51 #include <vm/vm.h> 52 #include <vm/vm_object.h> 53 #include <vm/vm_page.h> 54 #include <vm/vm_pageout.h> 55 #include <vm/pmap.h> 56 57 #include <machine/md_var.h> 58 #include <machine/bus.h> 59 #include <machine/resource.h> 60 #include <sys/rman.h> 61 62 MODULE_VERSION(agp, 1); 63 64 MALLOC_DEFINE(M_AGP, "agp", "AGP data structures"); 65 66 /* agp_drv.c */ 67 static d_open_t agp_open; 68 static d_close_t agp_close; 69 static d_ioctl_t agp_ioctl; 70 static d_mmap_t agp_mmap; 71 72 static struct cdevsw agp_cdevsw = { 73 .d_version = D_VERSION, 74 .d_flags = D_NEEDGIANT, 75 .d_open = agp_open, 76 .d_close = agp_close, 77 .d_ioctl = agp_ioctl, 78 .d_mmap = agp_mmap, 79 .d_name = "agp", 80 }; 81 82 static devclass_t agp_devclass; 83 #define KDEV2DEV(kdev) devclass_get_device(agp_devclass, minor(kdev)) 84 85 /* Helper functions for implementing chipset mini drivers. */ 86 87 void 88 agp_flush_cache() 89 { 90 #ifdef __i386__ 91 wbinvd(); 92 #endif 93 #ifdef __alpha__ 94 /* FIXME: This is most likely not correct as it doesn't flush CPU 95 * write caches, but we don't have a facility to do that and 96 * this is all linux does, too */ 97 alpha_mb(); 98 #endif 99 } 100 101 u_int8_t 102 agp_find_caps(device_t dev) 103 { 104 u_int32_t status; 105 u_int8_t ptr, next; 106 107 /* 108 * Check the CAP_LIST bit of the PCI status register first. 109 */ 110 status = pci_read_config(dev, PCIR_STATUS, 2); 111 if (!(status & 0x10)) 112 return 0; 113 114 /* 115 * Traverse the capabilities list. 116 */ 117 for (ptr = pci_read_config(dev, AGP_CAPPTR, 1); 118 ptr != 0; 119 ptr = next) { 120 u_int32_t capid = pci_read_config(dev, ptr, 4); 121 next = AGP_CAPID_GET_NEXT_PTR(capid); 122 123 /* 124 * If this capability entry ID is 2, then we are done. 125 */ 126 if (AGP_CAPID_GET_CAP_ID(capid) == 2) 127 return ptr; 128 } 129 130 return 0; 131 } 132 133 /* 134 * Find an AGP display device (if any). 135 */ 136 static device_t 137 agp_find_display(void) 138 { 139 devclass_t pci = devclass_find("pci"); 140 device_t bus, dev = 0; 141 device_t *kids; 142 int busnum, numkids, i; 143 144 for (busnum = 0; busnum < devclass_get_maxunit(pci); busnum++) { 145 bus = devclass_get_device(pci, busnum); 146 if (!bus) 147 continue; 148 device_get_children(bus, &kids, &numkids); 149 for (i = 0; i < numkids; i++) { 150 dev = kids[i]; 151 if (pci_get_class(dev) == PCIC_DISPLAY 152 && pci_get_subclass(dev) == PCIS_DISPLAY_VGA) 153 if (agp_find_caps(dev)) { 154 free(kids, M_TEMP); 155 return dev; 156 } 157 158 } 159 free(kids, M_TEMP); 160 } 161 162 return 0; 163 } 164 165 struct agp_gatt * 166 agp_alloc_gatt(device_t dev) 167 { 168 u_int32_t apsize = AGP_GET_APERTURE(dev); 169 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 170 struct agp_gatt *gatt; 171 172 if (bootverbose) 173 device_printf(dev, 174 "allocating GATT for aperture of size %dM\n", 175 apsize / (1024*1024)); 176 177 if (entries == 0) { 178 device_printf(dev, "bad aperture size\n"); 179 return NULL; 180 } 181 182 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 183 if (!gatt) 184 return 0; 185 186 gatt->ag_entries = entries; 187 gatt->ag_virtual = contigmalloc(entries * sizeof(u_int32_t), M_AGP, 0, 188 0, ~0, PAGE_SIZE, 0); 189 if (!gatt->ag_virtual) { 190 if (bootverbose) 191 device_printf(dev, "contiguous allocation failed\n"); 192 free(gatt, M_AGP); 193 return 0; 194 } 195 bzero(gatt->ag_virtual, entries * sizeof(u_int32_t)); 196 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual); 197 agp_flush_cache(); 198 199 return gatt; 200 } 201 202 void 203 agp_free_gatt(struct agp_gatt *gatt) 204 { 205 contigfree(gatt->ag_virtual, 206 gatt->ag_entries * sizeof(u_int32_t), M_AGP); 207 free(gatt, M_AGP); 208 } 209 210 static int agp_max[][2] = { 211 {0, 0}, 212 {32, 4}, 213 {64, 28}, 214 {128, 96}, 215 {256, 204}, 216 {512, 440}, 217 {1024, 942}, 218 {2048, 1920}, 219 {4096, 3932} 220 }; 221 #define agp_max_size (sizeof(agp_max) / sizeof(agp_max[0])) 222 223 int 224 agp_generic_attach(device_t dev) 225 { 226 struct agp_softc *sc = device_get_softc(dev); 227 int rid, memsize, i; 228 229 /* 230 * Find and map the aperture. 231 */ 232 rid = AGP_APBASE; 233 sc->as_aperture = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 234 RF_ACTIVE); 235 if (!sc->as_aperture) 236 return ENOMEM; 237 238 /* 239 * Work out an upper bound for agp memory allocation. This 240 * uses a heurisitc table from the Linux driver. 241 */ 242 memsize = ptoa(Maxmem) >> 20; 243 for (i = 0; i < agp_max_size; i++) { 244 if (memsize <= agp_max[i][0]) 245 break; 246 } 247 if (i == agp_max_size) i = agp_max_size - 1; 248 sc->as_maxmem = agp_max[i][1] << 20U; 249 250 /* 251 * The lock is used to prevent re-entry to 252 * agp_generic_bind_memory() since that function can sleep. 253 */ 254 lockinit(&sc->as_lock, PZERO|PCATCH, "agplk", 0, 0); 255 256 /* 257 * Initialise stuff for the userland device. 258 */ 259 agp_devclass = devclass_find("agp"); 260 TAILQ_INIT(&sc->as_memory); 261 sc->as_nextid = 1; 262 263 sc->as_devnode = make_dev(&agp_cdevsw, 264 device_get_unit(dev), 265 UID_ROOT, 266 GID_WHEEL, 267 0600, 268 "agpgart"); 269 270 return 0; 271 } 272 273 int 274 agp_generic_detach(device_t dev) 275 { 276 struct agp_softc *sc = device_get_softc(dev); 277 bus_release_resource(dev, SYS_RES_MEMORY, AGP_APBASE, sc->as_aperture); 278 lockmgr(&sc->as_lock, LK_DRAIN, 0, curthread); 279 lockdestroy(&sc->as_lock); 280 destroy_dev(sc->as_devnode); 281 agp_flush_cache(); 282 return 0; 283 } 284 285 /* 286 * This does the enable logic for v3, with the same topology 287 * restrictions as in place for v2 -- one bus, one device on the bus. 288 */ 289 static int 290 agp_v3_enable(device_t dev, device_t mdev, u_int32_t mode) 291 { 292 u_int32_t tstatus, mstatus; 293 u_int32_t command; 294 int rq, sba, fw, rate, arqsz, cal; 295 296 tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 297 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); 298 299 /* Set RQ to the min of mode, tstatus and mstatus */ 300 rq = AGP_MODE_GET_RQ(mode); 301 if (AGP_MODE_GET_RQ(tstatus) < rq) 302 rq = AGP_MODE_GET_RQ(tstatus); 303 if (AGP_MODE_GET_RQ(mstatus) < rq) 304 rq = AGP_MODE_GET_RQ(mstatus); 305 306 /* 307 * ARQSZ - Set the value to the maximum one. 308 * Don't allow the mode register to override values. 309 */ 310 arqsz = AGP_MODE_GET_ARQSZ(mode); 311 if (AGP_MODE_GET_ARQSZ(tstatus) > rq) 312 rq = AGP_MODE_GET_ARQSZ(tstatus); 313 if (AGP_MODE_GET_ARQSZ(mstatus) > rq) 314 rq = AGP_MODE_GET_ARQSZ(mstatus); 315 316 /* Calibration cycle - don't allow override by mode register */ 317 cal = AGP_MODE_GET_CAL(tstatus); 318 if (AGP_MODE_GET_CAL(mstatus) < cal) 319 cal = AGP_MODE_GET_CAL(mstatus); 320 321 /* SBA must be supported for AGP v3. */ 322 sba = 1; 323 324 /* Set FW if all three support it. */ 325 fw = (AGP_MODE_GET_FW(tstatus) 326 & AGP_MODE_GET_FW(mstatus) 327 & AGP_MODE_GET_FW(mode)); 328 329 /* Figure out the max rate */ 330 rate = (AGP_MODE_GET_RATE(tstatus) 331 & AGP_MODE_GET_RATE(mstatus) 332 & AGP_MODE_GET_RATE(mode)); 333 if (rate & AGP_MODE_V3_RATE_8x) 334 rate = AGP_MODE_V3_RATE_8x; 335 else 336 rate = AGP_MODE_V3_RATE_4x; 337 if (bootverbose) 338 device_printf(dev, "Setting AGP v3 mode %d\n", rate * 4); 339 340 pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, 0, 4); 341 342 /* Construct the new mode word and tell the hardware */ 343 command = AGP_MODE_SET_RQ(0, rq); 344 command = AGP_MODE_SET_ARQSZ(command, arqsz); 345 command = AGP_MODE_SET_CAL(command, cal); 346 command = AGP_MODE_SET_SBA(command, sba); 347 command = AGP_MODE_SET_FW(command, fw); 348 command = AGP_MODE_SET_RATE(command, rate); 349 command = AGP_MODE_SET_AGP(command, 1); 350 pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, command, 4); 351 pci_write_config(mdev, agp_find_caps(mdev) + AGP_COMMAND, command, 4); 352 353 return 0; 354 } 355 356 static int 357 agp_v2_enable(device_t dev, device_t mdev, u_int32_t mode) 358 { 359 u_int32_t tstatus, mstatus; 360 u_int32_t command; 361 int rq, sba, fw, rate; 362 363 tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 364 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); 365 366 /* Set RQ to the min of mode, tstatus and mstatus */ 367 rq = AGP_MODE_GET_RQ(mode); 368 if (AGP_MODE_GET_RQ(tstatus) < rq) 369 rq = AGP_MODE_GET_RQ(tstatus); 370 if (AGP_MODE_GET_RQ(mstatus) < rq) 371 rq = AGP_MODE_GET_RQ(mstatus); 372 373 /* Set SBA if all three can deal with SBA */ 374 sba = (AGP_MODE_GET_SBA(tstatus) 375 & AGP_MODE_GET_SBA(mstatus) 376 & AGP_MODE_GET_SBA(mode)); 377 378 /* Similar for FW */ 379 fw = (AGP_MODE_GET_FW(tstatus) 380 & AGP_MODE_GET_FW(mstatus) 381 & AGP_MODE_GET_FW(mode)); 382 383 /* Figure out the max rate */ 384 rate = (AGP_MODE_GET_RATE(tstatus) 385 & AGP_MODE_GET_RATE(mstatus) 386 & AGP_MODE_GET_RATE(mode)); 387 if (rate & AGP_MODE_V2_RATE_4x) 388 rate = AGP_MODE_V2_RATE_4x; 389 else if (rate & AGP_MODE_V2_RATE_2x) 390 rate = AGP_MODE_V2_RATE_2x; 391 else 392 rate = AGP_MODE_V2_RATE_1x; 393 if (bootverbose) 394 device_printf(dev, "Setting AGP v2 mode %d\n", rate); 395 396 /* Construct the new mode word and tell the hardware */ 397 command = AGP_MODE_SET_RQ(0, rq); 398 command = AGP_MODE_SET_SBA(command, sba); 399 command = AGP_MODE_SET_FW(command, fw); 400 command = AGP_MODE_SET_RATE(command, rate); 401 command = AGP_MODE_SET_AGP(command, 1); 402 pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, command, 4); 403 pci_write_config(mdev, agp_find_caps(mdev) + AGP_COMMAND, command, 4); 404 405 return 0; 406 } 407 408 int 409 agp_generic_enable(device_t dev, u_int32_t mode) 410 { 411 device_t mdev = agp_find_display(); 412 u_int32_t tstatus, mstatus; 413 414 if (!mdev) { 415 AGP_DPF("can't find display\n"); 416 return ENXIO; 417 } 418 419 tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 420 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); 421 422 /* 423 * Check display and bridge for AGP v3 support. AGP v3 allows 424 * more variety in topology than v2, e.g. multiple AGP devices 425 * attached to one bridge, or multiple AGP bridges in one 426 * system. This doesn't attempt to address those situations, 427 * but should work fine for a classic single AGP slot system 428 * with AGP v3. 429 */ 430 if (AGP_MODE_GET_MODE_3(tstatus) && AGP_MODE_GET_MODE_3(mstatus)) 431 return (agp_v3_enable(dev, mdev, mode)); 432 else 433 return (agp_v2_enable(dev, mdev, mode)); 434 } 435 436 struct agp_memory * 437 agp_generic_alloc_memory(device_t dev, int type, vm_size_t size) 438 { 439 struct agp_softc *sc = device_get_softc(dev); 440 struct agp_memory *mem; 441 442 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 443 return 0; 444 445 if (sc->as_allocated + size > sc->as_maxmem) 446 return 0; 447 448 if (type != 0) { 449 printf("agp_generic_alloc_memory: unsupported type %d\n", 450 type); 451 return 0; 452 } 453 454 mem = malloc(sizeof *mem, M_AGP, M_WAITOK); 455 mem->am_id = sc->as_nextid++; 456 mem->am_size = size; 457 mem->am_type = 0; 458 mem->am_obj = vm_object_allocate(OBJT_DEFAULT, atop(round_page(size))); 459 mem->am_physical = 0; 460 mem->am_offset = 0; 461 mem->am_is_bound = 0; 462 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 463 sc->as_allocated += size; 464 465 return mem; 466 } 467 468 int 469 agp_generic_free_memory(device_t dev, struct agp_memory *mem) 470 { 471 struct agp_softc *sc = device_get_softc(dev); 472 473 if (mem->am_is_bound) 474 return EBUSY; 475 476 sc->as_allocated -= mem->am_size; 477 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 478 vm_object_deallocate(mem->am_obj); 479 free(mem, M_AGP); 480 return 0; 481 } 482 483 int 484 agp_generic_bind_memory(device_t dev, struct agp_memory *mem, 485 vm_offset_t offset) 486 { 487 struct agp_softc *sc = device_get_softc(dev); 488 vm_offset_t i, j, k; 489 vm_page_t m; 490 int error; 491 492 lockmgr(&sc->as_lock, LK_EXCLUSIVE, 0, curthread); 493 494 if (mem->am_is_bound) { 495 device_printf(dev, "memory already bound\n"); 496 return EINVAL; 497 } 498 499 if (offset < 0 500 || (offset & (AGP_PAGE_SIZE - 1)) != 0 501 || offset + mem->am_size > AGP_GET_APERTURE(dev)) { 502 device_printf(dev, "binding memory at bad offset %#x\n", 503 (int) offset); 504 return EINVAL; 505 } 506 507 /* 508 * Bind the individual pages and flush the chipset's 509 * TLB. 510 * 511 * XXX Presumably, this needs to be the pci address on alpha 512 * (i.e. use alpha_XXX_dmamap()). I don't have access to any 513 * alpha AGP hardware to check. 514 */ 515 for (i = 0; i < mem->am_size; i += PAGE_SIZE) { 516 /* 517 * Find a page from the object and wire it 518 * down. This page will be mapped using one or more 519 * entries in the GATT (assuming that PAGE_SIZE >= 520 * AGP_PAGE_SIZE. If this is the first call to bind, 521 * the pages will be allocated and zeroed. 522 */ 523 VM_OBJECT_LOCK(mem->am_obj); 524 m = vm_page_grab(mem->am_obj, OFF_TO_IDX(i), 525 VM_ALLOC_WIRED | VM_ALLOC_ZERO | VM_ALLOC_RETRY); 526 VM_OBJECT_UNLOCK(mem->am_obj); 527 if ((m->flags & PG_ZERO) == 0) 528 pmap_zero_page(m); 529 AGP_DPF("found page pa=%#x\n", VM_PAGE_TO_PHYS(m)); 530 531 /* 532 * Install entries in the GATT, making sure that if 533 * AGP_PAGE_SIZE < PAGE_SIZE and mem->am_size is not 534 * aligned to PAGE_SIZE, we don't modify too many GATT 535 * entries. 536 */ 537 for (j = 0; j < PAGE_SIZE && i + j < mem->am_size; 538 j += AGP_PAGE_SIZE) { 539 vm_offset_t pa = VM_PAGE_TO_PHYS(m) + j; 540 AGP_DPF("binding offset %#x to pa %#x\n", 541 offset + i + j, pa); 542 error = AGP_BIND_PAGE(dev, offset + i + j, pa); 543 if (error) { 544 /* 545 * Bail out. Reverse all the mappings 546 * and unwire the pages. 547 */ 548 vm_page_lock_queues(); 549 vm_page_wakeup(m); 550 vm_page_unlock_queues(); 551 for (k = 0; k < i + j; k += AGP_PAGE_SIZE) 552 AGP_UNBIND_PAGE(dev, offset + k); 553 VM_OBJECT_LOCK(mem->am_obj); 554 for (k = 0; k <= i; k += PAGE_SIZE) { 555 m = vm_page_lookup(mem->am_obj, 556 OFF_TO_IDX(k)); 557 vm_page_lock_queues(); 558 vm_page_unwire(m, 0); 559 vm_page_unlock_queues(); 560 } 561 VM_OBJECT_UNLOCK(mem->am_obj); 562 lockmgr(&sc->as_lock, LK_RELEASE, 0, curthread); 563 return error; 564 } 565 } 566 vm_page_lock_queues(); 567 vm_page_wakeup(m); 568 vm_page_unlock_queues(); 569 } 570 571 /* 572 * Flush the cpu cache since we are providing a new mapping 573 * for these pages. 574 */ 575 agp_flush_cache(); 576 577 /* 578 * Make sure the chipset gets the new mappings. 579 */ 580 AGP_FLUSH_TLB(dev); 581 582 mem->am_offset = offset; 583 mem->am_is_bound = 1; 584 585 lockmgr(&sc->as_lock, LK_RELEASE, 0, curthread); 586 587 return 0; 588 } 589 590 int 591 agp_generic_unbind_memory(device_t dev, struct agp_memory *mem) 592 { 593 struct agp_softc *sc = device_get_softc(dev); 594 vm_page_t m; 595 int i; 596 597 lockmgr(&sc->as_lock, LK_EXCLUSIVE, 0, curthread); 598 599 if (!mem->am_is_bound) { 600 device_printf(dev, "memory is not bound\n"); 601 return EINVAL; 602 } 603 604 605 /* 606 * Unbind the individual pages and flush the chipset's 607 * TLB. Unwire the pages so they can be swapped. 608 */ 609 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 610 AGP_UNBIND_PAGE(dev, mem->am_offset + i); 611 VM_OBJECT_LOCK(mem->am_obj); 612 for (i = 0; i < mem->am_size; i += PAGE_SIZE) { 613 m = vm_page_lookup(mem->am_obj, atop(i)); 614 vm_page_lock_queues(); 615 vm_page_unwire(m, 0); 616 vm_page_unlock_queues(); 617 } 618 VM_OBJECT_UNLOCK(mem->am_obj); 619 620 agp_flush_cache(); 621 AGP_FLUSH_TLB(dev); 622 623 mem->am_offset = 0; 624 mem->am_is_bound = 0; 625 626 lockmgr(&sc->as_lock, LK_RELEASE, 0, curthread); 627 628 return 0; 629 } 630 631 /* Helper functions for implementing user/kernel api */ 632 633 static int 634 agp_acquire_helper(device_t dev, enum agp_acquire_state state) 635 { 636 struct agp_softc *sc = device_get_softc(dev); 637 638 if (sc->as_state != AGP_ACQUIRE_FREE) 639 return EBUSY; 640 sc->as_state = state; 641 642 return 0; 643 } 644 645 static int 646 agp_release_helper(device_t dev, enum agp_acquire_state state) 647 { 648 struct agp_softc *sc = device_get_softc(dev); 649 650 if (sc->as_state == AGP_ACQUIRE_FREE) 651 return 0; 652 653 if (sc->as_state != state) 654 return EBUSY; 655 656 sc->as_state = AGP_ACQUIRE_FREE; 657 return 0; 658 } 659 660 static struct agp_memory * 661 agp_find_memory(device_t dev, int id) 662 { 663 struct agp_softc *sc = device_get_softc(dev); 664 struct agp_memory *mem; 665 666 AGP_DPF("searching for memory block %d\n", id); 667 TAILQ_FOREACH(mem, &sc->as_memory, am_link) { 668 AGP_DPF("considering memory block %d\n", mem->am_id); 669 if (mem->am_id == id) 670 return mem; 671 } 672 return 0; 673 } 674 675 /* Implementation of the userland ioctl api */ 676 677 static int 678 agp_info_user(device_t dev, agp_info *info) 679 { 680 struct agp_softc *sc = device_get_softc(dev); 681 682 bzero(info, sizeof *info); 683 info->bridge_id = pci_get_devid(dev); 684 info->agp_mode = 685 pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 686 info->aper_base = rman_get_start(sc->as_aperture); 687 info->aper_size = AGP_GET_APERTURE(dev) >> 20; 688 info->pg_total = info->pg_system = sc->as_maxmem >> AGP_PAGE_SHIFT; 689 info->pg_used = sc->as_allocated >> AGP_PAGE_SHIFT; 690 691 return 0; 692 } 693 694 static int 695 agp_setup_user(device_t dev, agp_setup *setup) 696 { 697 return AGP_ENABLE(dev, setup->agp_mode); 698 } 699 700 static int 701 agp_allocate_user(device_t dev, agp_allocate *alloc) 702 { 703 struct agp_memory *mem; 704 705 mem = AGP_ALLOC_MEMORY(dev, 706 alloc->type, 707 alloc->pg_count << AGP_PAGE_SHIFT); 708 if (mem) { 709 alloc->key = mem->am_id; 710 alloc->physical = mem->am_physical; 711 return 0; 712 } else { 713 return ENOMEM; 714 } 715 } 716 717 static int 718 agp_deallocate_user(device_t dev, int id) 719 { 720 struct agp_memory *mem = agp_find_memory(dev, id);; 721 722 if (mem) { 723 AGP_FREE_MEMORY(dev, mem); 724 return 0; 725 } else { 726 return ENOENT; 727 } 728 } 729 730 static int 731 agp_bind_user(device_t dev, agp_bind *bind) 732 { 733 struct agp_memory *mem = agp_find_memory(dev, bind->key); 734 735 if (!mem) 736 return ENOENT; 737 738 return AGP_BIND_MEMORY(dev, mem, bind->pg_start << AGP_PAGE_SHIFT); 739 } 740 741 static int 742 agp_unbind_user(device_t dev, agp_unbind *unbind) 743 { 744 struct agp_memory *mem = agp_find_memory(dev, unbind->key); 745 746 if (!mem) 747 return ENOENT; 748 749 return AGP_UNBIND_MEMORY(dev, mem); 750 } 751 752 static int 753 agp_open(dev_t kdev, int oflags, int devtype, struct thread *td) 754 { 755 device_t dev = KDEV2DEV(kdev); 756 struct agp_softc *sc = device_get_softc(dev); 757 758 if (!sc->as_isopen) { 759 sc->as_isopen = 1; 760 device_busy(dev); 761 } 762 763 return 0; 764 } 765 766 static int 767 agp_close(dev_t kdev, int fflag, int devtype, struct thread *td) 768 { 769 device_t dev = KDEV2DEV(kdev); 770 struct agp_softc *sc = device_get_softc(dev); 771 struct agp_memory *mem; 772 773 /* 774 * Clear the GATT and force release on last close 775 */ 776 while ((mem = TAILQ_FIRST(&sc->as_memory)) != 0) { 777 if (mem->am_is_bound) 778 AGP_UNBIND_MEMORY(dev, mem); 779 AGP_FREE_MEMORY(dev, mem); 780 } 781 if (sc->as_state == AGP_ACQUIRE_USER) 782 agp_release_helper(dev, AGP_ACQUIRE_USER); 783 sc->as_isopen = 0; 784 device_unbusy(dev); 785 786 return 0; 787 } 788 789 static int 790 agp_ioctl(dev_t kdev, u_long cmd, caddr_t data, int fflag, struct thread *td) 791 { 792 device_t dev = KDEV2DEV(kdev); 793 794 switch (cmd) { 795 case AGPIOC_INFO: 796 return agp_info_user(dev, (agp_info *) data); 797 798 case AGPIOC_ACQUIRE: 799 return agp_acquire_helper(dev, AGP_ACQUIRE_USER); 800 801 case AGPIOC_RELEASE: 802 return agp_release_helper(dev, AGP_ACQUIRE_USER); 803 804 case AGPIOC_SETUP: 805 return agp_setup_user(dev, (agp_setup *)data); 806 807 case AGPIOC_ALLOCATE: 808 return agp_allocate_user(dev, (agp_allocate *)data); 809 810 case AGPIOC_DEALLOCATE: 811 return agp_deallocate_user(dev, *(int *) data); 812 813 case AGPIOC_BIND: 814 return agp_bind_user(dev, (agp_bind *)data); 815 816 case AGPIOC_UNBIND: 817 return agp_unbind_user(dev, (agp_unbind *)data); 818 819 } 820 821 return EINVAL; 822 } 823 824 static int 825 agp_mmap(dev_t kdev, vm_offset_t offset, vm_paddr_t *paddr, int prot) 826 { 827 device_t dev = KDEV2DEV(kdev); 828 struct agp_softc *sc = device_get_softc(dev); 829 830 if (offset > AGP_GET_APERTURE(dev)) 831 return -1; 832 *paddr = rman_get_start(sc->as_aperture) + offset; 833 return 0; 834 } 835 836 /* Implementation of the kernel api */ 837 838 device_t 839 agp_find_device() 840 { 841 if (!agp_devclass) 842 return 0; 843 return devclass_get_device(agp_devclass, 0); 844 } 845 846 enum agp_acquire_state 847 agp_state(device_t dev) 848 { 849 struct agp_softc *sc = device_get_softc(dev); 850 return sc->as_state; 851 } 852 853 void 854 agp_get_info(device_t dev, struct agp_info *info) 855 { 856 struct agp_softc *sc = device_get_softc(dev); 857 858 info->ai_mode = 859 pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 860 info->ai_aperture_base = rman_get_start(sc->as_aperture); 861 info->ai_aperture_size = rman_get_size(sc->as_aperture); 862 info->ai_aperture_va = (vm_offset_t) rman_get_virtual(sc->as_aperture); 863 info->ai_memory_allowed = sc->as_maxmem; 864 info->ai_memory_used = sc->as_allocated; 865 } 866 867 int 868 agp_acquire(device_t dev) 869 { 870 return agp_acquire_helper(dev, AGP_ACQUIRE_KERNEL); 871 } 872 873 int 874 agp_release(device_t dev) 875 { 876 return agp_release_helper(dev, AGP_ACQUIRE_KERNEL); 877 } 878 879 int 880 agp_enable(device_t dev, u_int32_t mode) 881 { 882 return AGP_ENABLE(dev, mode); 883 } 884 885 void *agp_alloc_memory(device_t dev, int type, vm_size_t bytes) 886 { 887 return (void *) AGP_ALLOC_MEMORY(dev, type, bytes); 888 } 889 890 void agp_free_memory(device_t dev, void *handle) 891 { 892 struct agp_memory *mem = (struct agp_memory *) handle; 893 AGP_FREE_MEMORY(dev, mem); 894 } 895 896 int agp_bind_memory(device_t dev, void *handle, vm_offset_t offset) 897 { 898 struct agp_memory *mem = (struct agp_memory *) handle; 899 return AGP_BIND_MEMORY(dev, mem, offset); 900 } 901 902 int agp_unbind_memory(device_t dev, void *handle) 903 { 904 struct agp_memory *mem = (struct agp_memory *) handle; 905 return AGP_UNBIND_MEMORY(dev, mem); 906 } 907 908 void agp_memory_info(device_t dev, void *handle, struct 909 agp_memory_info *mi) 910 { 911 struct agp_memory *mem = (struct agp_memory *) handle; 912 913 mi->ami_size = mem->am_size; 914 mi->ami_physical = mem->am_physical; 915 mi->ami_offset = mem->am_offset; 916 mi->ami_is_bound = mem->am_is_bound; 917 } 918