1 /*- 2 * Copyright (c) 2000 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include "opt_bus.h" 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/malloc.h> 35 #include <sys/kernel.h> 36 #include <sys/bus.h> 37 #include <sys/conf.h> 38 #include <sys/ioccom.h> 39 #include <sys/agpio.h> 40 #include <sys/lock.h> 41 #include <sys/lockmgr.h> 42 #include <sys/mutex.h> 43 #include <sys/proc.h> 44 45 #include <dev/pci/pcivar.h> 46 #include <dev/pci/pcireg.h> 47 #include <pci/agppriv.h> 48 #include <pci/agpvar.h> 49 #include <pci/agpreg.h> 50 51 #include <vm/vm.h> 52 #include <vm/vm_object.h> 53 #include <vm/vm_page.h> 54 #include <vm/vm_pageout.h> 55 #include <vm/pmap.h> 56 57 #include <machine/md_var.h> 58 #include <machine/bus.h> 59 #include <machine/resource.h> 60 #include <sys/rman.h> 61 62 MODULE_VERSION(agp, 1); 63 64 MALLOC_DEFINE(M_AGP, "agp", "AGP data structures"); 65 66 #define CDEV_MAJOR 148 67 /* agp_drv.c */ 68 static d_open_t agp_open; 69 static d_close_t agp_close; 70 static d_ioctl_t agp_ioctl; 71 static d_mmap_t agp_mmap; 72 73 static struct cdevsw agp_cdevsw = { 74 .d_open = agp_open, 75 .d_close = agp_close, 76 .d_ioctl = agp_ioctl, 77 .d_mmap = agp_mmap, 78 .d_name = "agp", 79 .d_maj = CDEV_MAJOR, 80 .d_flags = D_TTY, 81 }; 82 83 static devclass_t agp_devclass; 84 #define KDEV2DEV(kdev) devclass_get_device(agp_devclass, minor(kdev)) 85 86 /* Helper functions for implementing chipset mini drivers. */ 87 88 void 89 agp_flush_cache() 90 { 91 #ifdef __i386__ 92 wbinvd(); 93 #endif 94 #ifdef __alpha__ 95 /* FIXME: This is most likely not correct as it doesn't flush CPU 96 * write caches, but we don't have a facility to do that and 97 * this is all linux does, too */ 98 alpha_mb(); 99 #endif 100 } 101 102 u_int8_t 103 agp_find_caps(device_t dev) 104 { 105 u_int32_t status; 106 u_int8_t ptr, next; 107 108 /* 109 * Check the CAP_LIST bit of the PCI status register first. 110 */ 111 status = pci_read_config(dev, PCIR_STATUS, 2); 112 if (!(status & 0x10)) 113 return 0; 114 115 /* 116 * Traverse the capabilities list. 117 */ 118 for (ptr = pci_read_config(dev, AGP_CAPPTR, 1); 119 ptr != 0; 120 ptr = next) { 121 u_int32_t capid = pci_read_config(dev, ptr, 4); 122 next = AGP_CAPID_GET_NEXT_PTR(capid); 123 124 /* 125 * If this capability entry ID is 2, then we are done. 126 */ 127 if (AGP_CAPID_GET_CAP_ID(capid) == 2) 128 return ptr; 129 } 130 131 return 0; 132 } 133 134 /* 135 * Find an AGP display device (if any). 136 */ 137 static device_t 138 agp_find_display(void) 139 { 140 devclass_t pci = devclass_find("pci"); 141 device_t bus, dev = 0; 142 device_t *kids; 143 int busnum, numkids, i; 144 145 for (busnum = 0; busnum < devclass_get_maxunit(pci); busnum++) { 146 bus = devclass_get_device(pci, busnum); 147 if (!bus) 148 continue; 149 device_get_children(bus, &kids, &numkids); 150 for (i = 0; i < numkids; i++) { 151 dev = kids[i]; 152 if (pci_get_class(dev) == PCIC_DISPLAY 153 && pci_get_subclass(dev) == PCIS_DISPLAY_VGA) 154 if (agp_find_caps(dev)) { 155 free(kids, M_TEMP); 156 return dev; 157 } 158 159 } 160 free(kids, M_TEMP); 161 } 162 163 return 0; 164 } 165 166 struct agp_gatt * 167 agp_alloc_gatt(device_t dev) 168 { 169 u_int32_t apsize = AGP_GET_APERTURE(dev); 170 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 171 struct agp_gatt *gatt; 172 173 if (bootverbose) 174 device_printf(dev, 175 "allocating GATT for aperture of size %dM\n", 176 apsize / (1024*1024)); 177 178 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT); 179 if (!gatt) 180 return 0; 181 182 gatt->ag_entries = entries; 183 gatt->ag_virtual = contigmalloc(entries * sizeof(u_int32_t), M_AGP, 0, 184 0, ~0, PAGE_SIZE, 0); 185 if (!gatt->ag_virtual) { 186 if (bootverbose) 187 device_printf(dev, "contiguous allocation failed\n"); 188 free(gatt, M_AGP); 189 return 0; 190 } 191 bzero(gatt->ag_virtual, entries * sizeof(u_int32_t)); 192 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual); 193 agp_flush_cache(); 194 195 return gatt; 196 } 197 198 void 199 agp_free_gatt(struct agp_gatt *gatt) 200 { 201 contigfree(gatt->ag_virtual, 202 gatt->ag_entries * sizeof(u_int32_t), M_AGP); 203 free(gatt, M_AGP); 204 } 205 206 static int agp_max[][2] = { 207 {0, 0}, 208 {32, 4}, 209 {64, 28}, 210 {128, 96}, 211 {256, 204}, 212 {512, 440}, 213 {1024, 942}, 214 {2048, 1920}, 215 {4096, 3932} 216 }; 217 #define agp_max_size (sizeof(agp_max) / sizeof(agp_max[0])) 218 219 int 220 agp_generic_attach(device_t dev) 221 { 222 struct agp_softc *sc = device_get_softc(dev); 223 int rid, memsize, i; 224 225 /* 226 * Find and map the aperture. 227 */ 228 rid = AGP_APBASE; 229 sc->as_aperture = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 230 0, ~0, 1, RF_ACTIVE); 231 if (!sc->as_aperture) 232 return ENOMEM; 233 234 /* 235 * Work out an upper bound for agp memory allocation. This 236 * uses a heurisitc table from the Linux driver. 237 */ 238 memsize = ptoa(Maxmem) >> 20; 239 for (i = 0; i < agp_max_size; i++) { 240 if (memsize <= agp_max[i][0]) 241 break; 242 } 243 if (i == agp_max_size) i = agp_max_size - 1; 244 sc->as_maxmem = agp_max[i][1] << 20U; 245 246 /* 247 * The lock is used to prevent re-entry to 248 * agp_generic_bind_memory() since that function can sleep. 249 */ 250 lockinit(&sc->as_lock, PZERO|PCATCH, "agplk", 0, 0); 251 252 /* 253 * Initialise stuff for the userland device. 254 */ 255 agp_devclass = devclass_find("agp"); 256 TAILQ_INIT(&sc->as_memory); 257 sc->as_nextid = 1; 258 259 sc->as_devnode = make_dev(&agp_cdevsw, 260 device_get_unit(dev), 261 UID_ROOT, 262 GID_WHEEL, 263 0600, 264 "agpgart"); 265 266 return 0; 267 } 268 269 int 270 agp_generic_detach(device_t dev) 271 { 272 struct agp_softc *sc = device_get_softc(dev); 273 bus_release_resource(dev, SYS_RES_MEMORY, AGP_APBASE, sc->as_aperture); 274 lockmgr(&sc->as_lock, LK_DRAIN, 0, curthread); 275 lockdestroy(&sc->as_lock); 276 destroy_dev(sc->as_devnode); 277 agp_flush_cache(); 278 return 0; 279 } 280 281 /* 282 * This does the enable logic for v3, with the same topology 283 * restrictions as in place for v2 -- one bus, one device on the bus. 284 */ 285 static int 286 agp_v3_enable(device_t dev, device_t mdev, u_int32_t mode) 287 { 288 u_int32_t tstatus, mstatus; 289 u_int32_t command; 290 int rq, sba, fw, rate, arqsz, cal; 291 292 tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 293 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); 294 295 /* Set RQ to the min of mode, tstatus and mstatus */ 296 rq = AGP_MODE_GET_RQ(mode); 297 if (AGP_MODE_GET_RQ(tstatus) < rq) 298 rq = AGP_MODE_GET_RQ(tstatus); 299 if (AGP_MODE_GET_RQ(mstatus) < rq) 300 rq = AGP_MODE_GET_RQ(mstatus); 301 302 /* 303 * ARQSZ - Set the value to the maximum one. 304 * Don't allow the mode register to override values. 305 */ 306 arqsz = AGP_MODE_GET_ARQSZ(mode); 307 if (AGP_MODE_GET_ARQSZ(tstatus) > rq) 308 rq = AGP_MODE_GET_ARQSZ(tstatus); 309 if (AGP_MODE_GET_ARQSZ(mstatus) > rq) 310 rq = AGP_MODE_GET_ARQSZ(mstatus); 311 312 /* Calibration cycle - don't allow override by mode register */ 313 cal = AGP_MODE_GET_CAL(tstatus); 314 if (AGP_MODE_GET_CAL(mstatus) < cal) 315 cal = AGP_MODE_GET_CAL(mstatus); 316 317 /* SBA must be supported for AGP v3. */ 318 sba = 1; 319 320 /* Set FW if all three support it. */ 321 fw = (AGP_MODE_GET_FW(tstatus) 322 & AGP_MODE_GET_FW(mstatus) 323 & AGP_MODE_GET_FW(mode)); 324 325 /* Figure out the max rate */ 326 rate = (AGP_MODE_GET_RATE(tstatus) 327 & AGP_MODE_GET_RATE(mstatus) 328 & AGP_MODE_GET_RATE(mode)); 329 if (rate & AGP_MODE_V3_RATE_8x) 330 rate = AGP_MODE_V3_RATE_8x; 331 else 332 rate = AGP_MODE_V3_RATE_4x; 333 if (bootverbose) 334 device_printf(dev, "Setting AGP v3 mode %d\n", rate * 4); 335 336 pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, 0, 4); 337 338 /* Construct the new mode word and tell the hardware */ 339 command = AGP_MODE_SET_RQ(0, rq); 340 command = AGP_MODE_SET_ARQSZ(command, arqsz); 341 command = AGP_MODE_SET_CAL(command, cal); 342 command = AGP_MODE_SET_SBA(command, sba); 343 command = AGP_MODE_SET_FW(command, fw); 344 command = AGP_MODE_SET_RATE(command, rate); 345 command = AGP_MODE_SET_AGP(command, 1); 346 pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, command, 4); 347 pci_write_config(mdev, agp_find_caps(mdev) + AGP_COMMAND, command, 4); 348 349 return 0; 350 } 351 352 static int 353 agp_v2_enable(device_t dev, device_t mdev, u_int32_t mode) 354 { 355 u_int32_t tstatus, mstatus; 356 u_int32_t command; 357 int rq, sba, fw, rate; 358 359 tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 360 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); 361 362 /* Set RQ to the min of mode, tstatus and mstatus */ 363 rq = AGP_MODE_GET_RQ(mode); 364 if (AGP_MODE_GET_RQ(tstatus) < rq) 365 rq = AGP_MODE_GET_RQ(tstatus); 366 if (AGP_MODE_GET_RQ(mstatus) < rq) 367 rq = AGP_MODE_GET_RQ(mstatus); 368 369 /* Set SBA if all three can deal with SBA */ 370 sba = (AGP_MODE_GET_SBA(tstatus) 371 & AGP_MODE_GET_SBA(mstatus) 372 & AGP_MODE_GET_SBA(mode)); 373 374 /* Similar for FW */ 375 fw = (AGP_MODE_GET_FW(tstatus) 376 & AGP_MODE_GET_FW(mstatus) 377 & AGP_MODE_GET_FW(mode)); 378 379 /* Figure out the max rate */ 380 rate = (AGP_MODE_GET_RATE(tstatus) 381 & AGP_MODE_GET_RATE(mstatus) 382 & AGP_MODE_GET_RATE(mode)); 383 if (rate & AGP_MODE_V2_RATE_4x) 384 rate = AGP_MODE_V2_RATE_4x; 385 else if (rate & AGP_MODE_V2_RATE_2x) 386 rate = AGP_MODE_V2_RATE_2x; 387 else 388 rate = AGP_MODE_V2_RATE_1x; 389 if (bootverbose) 390 device_printf(dev, "Setting AGP v2 mode %d\n", rate); 391 392 /* Construct the new mode word and tell the hardware */ 393 command = AGP_MODE_SET_RQ(0, rq); 394 command = AGP_MODE_SET_SBA(command, sba); 395 command = AGP_MODE_SET_FW(command, fw); 396 command = AGP_MODE_SET_RATE(command, rate); 397 command = AGP_MODE_SET_AGP(command, 1); 398 pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, command, 4); 399 pci_write_config(mdev, agp_find_caps(mdev) + AGP_COMMAND, command, 4); 400 401 return 0; 402 } 403 404 int 405 agp_generic_enable(device_t dev, u_int32_t mode) 406 { 407 device_t mdev = agp_find_display(); 408 u_int32_t tstatus, mstatus; 409 410 if (!mdev) { 411 AGP_DPF("can't find display\n"); 412 return ENXIO; 413 } 414 415 tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 416 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); 417 418 /* 419 * Check display and bridge for AGP v3 support. AGP v3 allows 420 * more variety in topology than v2, e.g. multiple AGP devices 421 * attached to one bridge, or multiple AGP bridges in one 422 * system. This doesn't attempt to address those situations, 423 * but should work fine for a classic single AGP slot system 424 * with AGP v3. 425 */ 426 if (AGP_MODE_GET_MODE_3(tstatus) && AGP_MODE_GET_MODE_3(mstatus)) 427 return (agp_v3_enable(dev, mdev, mode)); 428 else 429 return (agp_v2_enable(dev, mdev, mode)); 430 } 431 432 struct agp_memory * 433 agp_generic_alloc_memory(device_t dev, int type, vm_size_t size) 434 { 435 struct agp_softc *sc = device_get_softc(dev); 436 struct agp_memory *mem; 437 438 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 439 return 0; 440 441 if (sc->as_allocated + size > sc->as_maxmem) 442 return 0; 443 444 if (type != 0) { 445 printf("agp_generic_alloc_memory: unsupported type %d\n", 446 type); 447 return 0; 448 } 449 450 mem = malloc(sizeof *mem, M_AGP, M_WAITOK); 451 mem->am_id = sc->as_nextid++; 452 mem->am_size = size; 453 mem->am_type = 0; 454 mem->am_obj = vm_object_allocate(OBJT_DEFAULT, atop(round_page(size))); 455 mem->am_physical = 0; 456 mem->am_offset = 0; 457 mem->am_is_bound = 0; 458 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 459 sc->as_allocated += size; 460 461 return mem; 462 } 463 464 int 465 agp_generic_free_memory(device_t dev, struct agp_memory *mem) 466 { 467 struct agp_softc *sc = device_get_softc(dev); 468 469 if (mem->am_is_bound) 470 return EBUSY; 471 472 sc->as_allocated -= mem->am_size; 473 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 474 vm_object_deallocate(mem->am_obj); 475 free(mem, M_AGP); 476 return 0; 477 } 478 479 int 480 agp_generic_bind_memory(device_t dev, struct agp_memory *mem, 481 vm_offset_t offset) 482 { 483 struct agp_softc *sc = device_get_softc(dev); 484 vm_offset_t i, j, k; 485 vm_page_t m; 486 int error; 487 488 lockmgr(&sc->as_lock, LK_EXCLUSIVE, 0, curthread); 489 490 if (mem->am_is_bound) { 491 device_printf(dev, "memory already bound\n"); 492 return EINVAL; 493 } 494 495 if (offset < 0 496 || (offset & (AGP_PAGE_SIZE - 1)) != 0 497 || offset + mem->am_size > AGP_GET_APERTURE(dev)) { 498 device_printf(dev, "binding memory at bad offset %#x\n", 499 (int) offset); 500 return EINVAL; 501 } 502 503 /* 504 * Bind the individual pages and flush the chipset's 505 * TLB. 506 * 507 * XXX Presumably, this needs to be the pci address on alpha 508 * (i.e. use alpha_XXX_dmamap()). I don't have access to any 509 * alpha AGP hardware to check. 510 */ 511 for (i = 0; i < mem->am_size; i += PAGE_SIZE) { 512 /* 513 * Find a page from the object and wire it 514 * down. This page will be mapped using one or more 515 * entries in the GATT (assuming that PAGE_SIZE >= 516 * AGP_PAGE_SIZE. If this is the first call to bind, 517 * the pages will be allocated and zeroed. 518 */ 519 VM_OBJECT_LOCK(mem->am_obj); 520 m = vm_page_grab(mem->am_obj, OFF_TO_IDX(i), 521 VM_ALLOC_WIRED | VM_ALLOC_ZERO | VM_ALLOC_RETRY); 522 VM_OBJECT_UNLOCK(mem->am_obj); 523 if ((m->flags & PG_ZERO) == 0) 524 pmap_zero_page(m); 525 AGP_DPF("found page pa=%#x\n", VM_PAGE_TO_PHYS(m)); 526 527 /* 528 * Install entries in the GATT, making sure that if 529 * AGP_PAGE_SIZE < PAGE_SIZE and mem->am_size is not 530 * aligned to PAGE_SIZE, we don't modify too many GATT 531 * entries. 532 */ 533 for (j = 0; j < PAGE_SIZE && i + j < mem->am_size; 534 j += AGP_PAGE_SIZE) { 535 vm_offset_t pa = VM_PAGE_TO_PHYS(m) + j; 536 AGP_DPF("binding offset %#x to pa %#x\n", 537 offset + i + j, pa); 538 error = AGP_BIND_PAGE(dev, offset + i + j, pa); 539 if (error) { 540 /* 541 * Bail out. Reverse all the mappings 542 * and unwire the pages. 543 */ 544 vm_page_lock_queues(); 545 vm_page_wakeup(m); 546 vm_page_unlock_queues(); 547 for (k = 0; k < i + j; k += AGP_PAGE_SIZE) 548 AGP_UNBIND_PAGE(dev, offset + k); 549 VM_OBJECT_LOCK(mem->am_obj); 550 for (k = 0; k <= i; k += PAGE_SIZE) { 551 m = vm_page_lookup(mem->am_obj, 552 OFF_TO_IDX(k)); 553 vm_page_lock_queues(); 554 vm_page_unwire(m, 0); 555 vm_page_unlock_queues(); 556 } 557 VM_OBJECT_UNLOCK(mem->am_obj); 558 lockmgr(&sc->as_lock, LK_RELEASE, 0, curthread); 559 return error; 560 } 561 } 562 vm_page_lock_queues(); 563 vm_page_wakeup(m); 564 vm_page_unlock_queues(); 565 } 566 567 /* 568 * Flush the cpu cache since we are providing a new mapping 569 * for these pages. 570 */ 571 agp_flush_cache(); 572 573 /* 574 * Make sure the chipset gets the new mappings. 575 */ 576 AGP_FLUSH_TLB(dev); 577 578 mem->am_offset = offset; 579 mem->am_is_bound = 1; 580 581 lockmgr(&sc->as_lock, LK_RELEASE, 0, curthread); 582 583 return 0; 584 } 585 586 int 587 agp_generic_unbind_memory(device_t dev, struct agp_memory *mem) 588 { 589 struct agp_softc *sc = device_get_softc(dev); 590 vm_page_t m; 591 int i; 592 593 lockmgr(&sc->as_lock, LK_EXCLUSIVE, 0, curthread); 594 595 if (!mem->am_is_bound) { 596 device_printf(dev, "memory is not bound\n"); 597 return EINVAL; 598 } 599 600 601 /* 602 * Unbind the individual pages and flush the chipset's 603 * TLB. Unwire the pages so they can be swapped. 604 */ 605 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 606 AGP_UNBIND_PAGE(dev, mem->am_offset + i); 607 VM_OBJECT_LOCK(mem->am_obj); 608 for (i = 0; i < mem->am_size; i += PAGE_SIZE) { 609 m = vm_page_lookup(mem->am_obj, atop(i)); 610 vm_page_lock_queues(); 611 vm_page_unwire(m, 0); 612 vm_page_unlock_queues(); 613 } 614 VM_OBJECT_UNLOCK(mem->am_obj); 615 616 agp_flush_cache(); 617 AGP_FLUSH_TLB(dev); 618 619 mem->am_offset = 0; 620 mem->am_is_bound = 0; 621 622 lockmgr(&sc->as_lock, LK_RELEASE, 0, curthread); 623 624 return 0; 625 } 626 627 /* Helper functions for implementing user/kernel api */ 628 629 static int 630 agp_acquire_helper(device_t dev, enum agp_acquire_state state) 631 { 632 struct agp_softc *sc = device_get_softc(dev); 633 634 if (sc->as_state != AGP_ACQUIRE_FREE) 635 return EBUSY; 636 sc->as_state = state; 637 638 return 0; 639 } 640 641 static int 642 agp_release_helper(device_t dev, enum agp_acquire_state state) 643 { 644 struct agp_softc *sc = device_get_softc(dev); 645 646 if (sc->as_state == AGP_ACQUIRE_FREE) 647 return 0; 648 649 if (sc->as_state != state) 650 return EBUSY; 651 652 sc->as_state = AGP_ACQUIRE_FREE; 653 return 0; 654 } 655 656 static struct agp_memory * 657 agp_find_memory(device_t dev, int id) 658 { 659 struct agp_softc *sc = device_get_softc(dev); 660 struct agp_memory *mem; 661 662 AGP_DPF("searching for memory block %d\n", id); 663 TAILQ_FOREACH(mem, &sc->as_memory, am_link) { 664 AGP_DPF("considering memory block %d\n", mem->am_id); 665 if (mem->am_id == id) 666 return mem; 667 } 668 return 0; 669 } 670 671 /* Implementation of the userland ioctl api */ 672 673 static int 674 agp_info_user(device_t dev, agp_info *info) 675 { 676 struct agp_softc *sc = device_get_softc(dev); 677 678 bzero(info, sizeof *info); 679 info->bridge_id = pci_get_devid(dev); 680 info->agp_mode = 681 pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 682 info->aper_base = rman_get_start(sc->as_aperture); 683 info->aper_size = AGP_GET_APERTURE(dev) >> 20; 684 info->pg_total = info->pg_system = sc->as_maxmem >> AGP_PAGE_SHIFT; 685 info->pg_used = sc->as_allocated >> AGP_PAGE_SHIFT; 686 687 return 0; 688 } 689 690 static int 691 agp_setup_user(device_t dev, agp_setup *setup) 692 { 693 return AGP_ENABLE(dev, setup->agp_mode); 694 } 695 696 static int 697 agp_allocate_user(device_t dev, agp_allocate *alloc) 698 { 699 struct agp_memory *mem; 700 701 mem = AGP_ALLOC_MEMORY(dev, 702 alloc->type, 703 alloc->pg_count << AGP_PAGE_SHIFT); 704 if (mem) { 705 alloc->key = mem->am_id; 706 alloc->physical = mem->am_physical; 707 return 0; 708 } else { 709 return ENOMEM; 710 } 711 } 712 713 static int 714 agp_deallocate_user(device_t dev, int id) 715 { 716 struct agp_memory *mem = agp_find_memory(dev, id);; 717 718 if (mem) { 719 AGP_FREE_MEMORY(dev, mem); 720 return 0; 721 } else { 722 return ENOENT; 723 } 724 } 725 726 static int 727 agp_bind_user(device_t dev, agp_bind *bind) 728 { 729 struct agp_memory *mem = agp_find_memory(dev, bind->key); 730 731 if (!mem) 732 return ENOENT; 733 734 return AGP_BIND_MEMORY(dev, mem, bind->pg_start << AGP_PAGE_SHIFT); 735 } 736 737 static int 738 agp_unbind_user(device_t dev, agp_unbind *unbind) 739 { 740 struct agp_memory *mem = agp_find_memory(dev, unbind->key); 741 742 if (!mem) 743 return ENOENT; 744 745 return AGP_UNBIND_MEMORY(dev, mem); 746 } 747 748 static int 749 agp_open(dev_t kdev, int oflags, int devtype, struct thread *td) 750 { 751 device_t dev = KDEV2DEV(kdev); 752 struct agp_softc *sc = device_get_softc(dev); 753 754 if (!sc->as_isopen) { 755 sc->as_isopen = 1; 756 device_busy(dev); 757 } 758 759 return 0; 760 } 761 762 static int 763 agp_close(dev_t kdev, int fflag, int devtype, struct thread *td) 764 { 765 device_t dev = KDEV2DEV(kdev); 766 struct agp_softc *sc = device_get_softc(dev); 767 struct agp_memory *mem; 768 769 /* 770 * Clear the GATT and force release on last close 771 */ 772 while ((mem = TAILQ_FIRST(&sc->as_memory)) != 0) { 773 if (mem->am_is_bound) 774 AGP_UNBIND_MEMORY(dev, mem); 775 AGP_FREE_MEMORY(dev, mem); 776 } 777 if (sc->as_state == AGP_ACQUIRE_USER) 778 agp_release_helper(dev, AGP_ACQUIRE_USER); 779 sc->as_isopen = 0; 780 device_unbusy(dev); 781 782 return 0; 783 } 784 785 static int 786 agp_ioctl(dev_t kdev, u_long cmd, caddr_t data, int fflag, struct thread *td) 787 { 788 device_t dev = KDEV2DEV(kdev); 789 790 switch (cmd) { 791 case AGPIOC_INFO: 792 return agp_info_user(dev, (agp_info *) data); 793 794 case AGPIOC_ACQUIRE: 795 return agp_acquire_helper(dev, AGP_ACQUIRE_USER); 796 797 case AGPIOC_RELEASE: 798 return agp_release_helper(dev, AGP_ACQUIRE_USER); 799 800 case AGPIOC_SETUP: 801 return agp_setup_user(dev, (agp_setup *)data); 802 803 case AGPIOC_ALLOCATE: 804 return agp_allocate_user(dev, (agp_allocate *)data); 805 806 case AGPIOC_DEALLOCATE: 807 return agp_deallocate_user(dev, *(int *) data); 808 809 case AGPIOC_BIND: 810 return agp_bind_user(dev, (agp_bind *)data); 811 812 case AGPIOC_UNBIND: 813 return agp_unbind_user(dev, (agp_unbind *)data); 814 815 } 816 817 return EINVAL; 818 } 819 820 static int 821 agp_mmap(dev_t kdev, vm_offset_t offset, vm_paddr_t *paddr, int prot) 822 { 823 device_t dev = KDEV2DEV(kdev); 824 struct agp_softc *sc = device_get_softc(dev); 825 826 if (offset > AGP_GET_APERTURE(dev)) 827 return -1; 828 *paddr = rman_get_start(sc->as_aperture) + offset; 829 return 0; 830 } 831 832 /* Implementation of the kernel api */ 833 834 device_t 835 agp_find_device() 836 { 837 if (!agp_devclass) 838 return 0; 839 return devclass_get_device(agp_devclass, 0); 840 } 841 842 enum agp_acquire_state 843 agp_state(device_t dev) 844 { 845 struct agp_softc *sc = device_get_softc(dev); 846 return sc->as_state; 847 } 848 849 void 850 agp_get_info(device_t dev, struct agp_info *info) 851 { 852 struct agp_softc *sc = device_get_softc(dev); 853 854 info->ai_mode = 855 pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 856 info->ai_aperture_base = rman_get_start(sc->as_aperture); 857 info->ai_aperture_size = rman_get_size(sc->as_aperture); 858 info->ai_aperture_va = (vm_offset_t) rman_get_virtual(sc->as_aperture); 859 info->ai_memory_allowed = sc->as_maxmem; 860 info->ai_memory_used = sc->as_allocated; 861 } 862 863 int 864 agp_acquire(device_t dev) 865 { 866 return agp_acquire_helper(dev, AGP_ACQUIRE_KERNEL); 867 } 868 869 int 870 agp_release(device_t dev) 871 { 872 return agp_release_helper(dev, AGP_ACQUIRE_KERNEL); 873 } 874 875 int 876 agp_enable(device_t dev, u_int32_t mode) 877 { 878 return AGP_ENABLE(dev, mode); 879 } 880 881 void *agp_alloc_memory(device_t dev, int type, vm_size_t bytes) 882 { 883 return (void *) AGP_ALLOC_MEMORY(dev, type, bytes); 884 } 885 886 void agp_free_memory(device_t dev, void *handle) 887 { 888 struct agp_memory *mem = (struct agp_memory *) handle; 889 AGP_FREE_MEMORY(dev, mem); 890 } 891 892 int agp_bind_memory(device_t dev, void *handle, vm_offset_t offset) 893 { 894 struct agp_memory *mem = (struct agp_memory *) handle; 895 return AGP_BIND_MEMORY(dev, mem, offset); 896 } 897 898 int agp_unbind_memory(device_t dev, void *handle) 899 { 900 struct agp_memory *mem = (struct agp_memory *) handle; 901 return AGP_UNBIND_MEMORY(dev, mem); 902 } 903 904 void agp_memory_info(device_t dev, void *handle, struct 905 agp_memory_info *mi) 906 { 907 struct agp_memory *mem = (struct agp_memory *) handle; 908 909 mi->ami_size = mem->am_size; 910 mi->ami_physical = mem->am_physical; 911 mi->ami_offset = mem->am_offset; 912 mi->ami_is_bound = mem->am_is_bound; 913 } 914