1 /*- 2 * Copyright (c) 2003-2005 Nate Lawson (SDG) 3 * Copyright (c) 2001 Michael Smith 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include "opt_acpi.h" 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/cpu.h> 35 #include <sys/kernel.h> 36 #include <sys/malloc.h> 37 #include <sys/module.h> 38 #include <sys/rman.h> 39 40 #include <machine/bus.h> 41 42 #include "acpi.h" 43 #include <dev/acpica/acpivar.h> 44 #include <dev/pci/pcivar.h> 45 46 #include "cpufreq_if.h" 47 48 /* 49 * Throttling provides relative frequency control. It involves modulating 50 * the clock so that the CPU is active for only a fraction of the normal 51 * clock cycle. It does not change voltage and so is less efficient than 52 * other mechanisms. Since it is relative, it can be used in addition to 53 * absolute cpufreq drivers. We support the ACPI 2.0 specification. 54 */ 55 56 struct acpi_throttle_softc { 57 device_t cpu_dev; 58 ACPI_HANDLE cpu_handle; 59 uint32_t cpu_p_blk; /* ACPI P_BLK location */ 60 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */ 61 struct resource *cpu_p_cnt; /* Throttling control register */ 62 int cpu_p_type; /* Resource type for cpu_p_cnt. */ 63 uint32_t cpu_thr_state; /* Current throttle setting. */ 64 }; 65 66 #define THR_GET_REG(reg) \ 67 (bus_space_read_4(rman_get_bustag((reg)), \ 68 rman_get_bushandle((reg)), 0)) 69 #define THR_SET_REG(reg, val) \ 70 (bus_space_write_4(rman_get_bustag((reg)), \ 71 rman_get_bushandle((reg)), 0, (val))) 72 73 /* 74 * Speeds are stored in counts, from 1 to CPU_MAX_SPEED, and 75 * reported to the user in hundredths of a percent. 76 */ 77 #define CPU_MAX_SPEED (1 << cpu_duty_width) 78 #define CPU_SPEED_PERCENT(x) ((10000 * (x)) / CPU_MAX_SPEED) 79 #define CPU_SPEED_PRINTABLE(x) (CPU_SPEED_PERCENT(x) / 10), \ 80 (CPU_SPEED_PERCENT(x) % 10) 81 #define CPU_P_CNT_THT_EN (1<<4) 82 #define CPU_QUIRK_NO_THROTTLE (1<<1) /* Throttling is not usable. */ 83 84 #define PCI_VENDOR_INTEL 0x8086 85 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */ 86 #define PCI_REVISION_A_STEP 0 87 #define PCI_REVISION_B_STEP 1 88 89 static uint32_t cpu_duty_offset; /* Offset in P_CNT of throttle val. */ 90 static uint32_t cpu_duty_width; /* Bit width of throttle value. */ 91 static int thr_rid; /* Driver-wide resource id. */ 92 static int thr_quirks; /* Indicate any hardware bugs. */ 93 94 static void acpi_throttle_identify(driver_t *driver, device_t parent); 95 static int acpi_throttle_probe(device_t dev); 96 static int acpi_throttle_attach(device_t dev); 97 static int acpi_throttle_evaluate(struct acpi_throttle_softc *sc); 98 static int acpi_throttle_quirks(struct acpi_throttle_softc *sc); 99 static int acpi_thr_settings(device_t dev, struct cf_setting *sets, 100 int *count, int *type); 101 static int acpi_thr_set(device_t dev, const struct cf_setting *set); 102 static int acpi_thr_get(device_t dev, struct cf_setting *set); 103 104 static device_method_t acpi_throttle_methods[] = { 105 /* Device interface */ 106 DEVMETHOD(device_identify, acpi_throttle_identify), 107 DEVMETHOD(device_probe, acpi_throttle_probe), 108 DEVMETHOD(device_attach, acpi_throttle_attach), 109 110 /* cpufreq interface */ 111 DEVMETHOD(cpufreq_drv_set, acpi_thr_set), 112 DEVMETHOD(cpufreq_drv_get, acpi_thr_get), 113 DEVMETHOD(cpufreq_drv_settings, acpi_thr_settings), 114 {0, 0} 115 }; 116 117 static driver_t acpi_throttle_driver = { 118 "acpi_throttle", 119 acpi_throttle_methods, 120 sizeof(struct acpi_throttle_softc), 121 }; 122 123 static devclass_t acpi_throttle_devclass; 124 DRIVER_MODULE(acpi_throttle, cpu, acpi_throttle_driver, acpi_throttle_devclass, 125 0, 0); 126 127 static void 128 acpi_throttle_identify(driver_t *driver, device_t parent) 129 { 130 ACPI_BUFFER buf; 131 ACPI_HANDLE handle; 132 ACPI_OBJECT *obj; 133 134 /* Make sure we're not being doubly invoked. */ 135 if (device_find_child(parent, "acpi_throttle", -1) != NULL) 136 return; 137 138 /* Check for a valid duty width and parent CPU type. */ 139 handle = acpi_get_handle(parent); 140 if (handle == NULL) 141 return; 142 if (AcpiGbl_FADT->DutyWidth == 0 || 143 acpi_get_type(parent) != ACPI_TYPE_PROCESSOR) 144 return; 145 146 /* 147 * Add a child if there's a non-NULL P_BLK and correct length, or 148 * if the _PTC method is present. 149 */ 150 buf.Pointer = NULL; 151 buf.Length = ACPI_ALLOCATE_BUFFER; 152 if (ACPI_FAILURE(AcpiEvaluateObject(handle, NULL, NULL, &buf))) 153 return; 154 obj = (ACPI_OBJECT *)buf.Pointer; 155 if ((obj->Processor.PblkAddress && obj->Processor.PblkLength >= 4) || 156 ACPI_SUCCESS(AcpiEvaluateObject(handle, "_PTC", NULL, NULL))) { 157 if (BUS_ADD_CHILD(parent, 0, "acpi_throttle", -1) == NULL) 158 device_printf(parent, "add throttle child failed\n"); 159 } 160 AcpiOsFree(obj); 161 } 162 163 static int 164 acpi_throttle_probe(device_t dev) 165 { 166 167 device_set_desc(dev, "ACPI CPU Throttling"); 168 return (0); 169 } 170 171 static int 172 acpi_throttle_attach(device_t dev) 173 { 174 struct acpi_throttle_softc *sc; 175 ACPI_BUFFER buf; 176 ACPI_OBJECT *obj; 177 ACPI_STATUS status; 178 int error; 179 180 sc = device_get_softc(dev); 181 sc->cpu_dev = dev; 182 sc->cpu_handle = acpi_get_handle(dev); 183 184 buf.Pointer = NULL; 185 buf.Length = ACPI_ALLOCATE_BUFFER; 186 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf); 187 if (ACPI_FAILURE(status)) { 188 device_printf(dev, "attach failed to get Processor obj - %s\n", 189 AcpiFormatException(status)); 190 return (ENXIO); 191 } 192 obj = (ACPI_OBJECT *)buf.Pointer; 193 sc->cpu_p_blk = obj->Processor.PblkAddress; 194 sc->cpu_p_blk_len = obj->Processor.PblkLength; 195 AcpiOsFree(obj); 196 197 /* If this is the first device probed, check for quirks. */ 198 if (device_get_unit(dev) == 0) 199 acpi_throttle_quirks(sc); 200 201 /* Attempt to attach the actual throttling register. */ 202 error = acpi_throttle_evaluate(sc); 203 if (error) 204 return (error); 205 206 /* Everything went ok, register with cpufreq(4). */ 207 cpufreq_register(dev); 208 return (0); 209 } 210 211 static int 212 acpi_throttle_evaluate(struct acpi_throttle_softc *sc) 213 { 214 uint32_t duty_end; 215 ACPI_BUFFER buf; 216 ACPI_OBJECT obj; 217 ACPI_GENERIC_ADDRESS gas; 218 ACPI_STATUS status; 219 220 /* Get throttling parameters from the FADT. 0 means not supported. */ 221 if (device_get_unit(sc->cpu_dev) == 0) { 222 cpu_duty_offset = AcpiGbl_FADT->DutyOffset; 223 cpu_duty_width = AcpiGbl_FADT->DutyWidth; 224 } 225 if (cpu_duty_width == 0 || (thr_quirks & CPU_QUIRK_NO_THROTTLE) != 0) 226 return (ENXIO); 227 228 /* Validate the duty offset/width. */ 229 duty_end = cpu_duty_offset + cpu_duty_width - 1; 230 if (duty_end > 31) { 231 device_printf(sc->cpu_dev, 232 "CLK_VAL field overflows P_CNT register\n"); 233 return (ENXIO); 234 } 235 if (cpu_duty_offset <= 4 && duty_end >= 4) { 236 device_printf(sc->cpu_dev, 237 "CLK_VAL field overlaps THT_EN bit\n"); 238 return (ENXIO); 239 } 240 241 /* 242 * If not present, fall back to using the processor's P_BLK to find 243 * the P_CNT register. 244 * 245 * Note that some systems seem to duplicate the P_BLK pointer 246 * across multiple CPUs, so not getting the resource is not fatal. 247 */ 248 buf.Pointer = &obj; 249 buf.Length = sizeof(obj); 250 status = AcpiEvaluateObject(sc->cpu_handle, "_PTC", NULL, &buf); 251 if (ACPI_SUCCESS(status)) { 252 if (obj.Buffer.Length < sizeof(ACPI_GENERIC_ADDRESS) + 3) { 253 device_printf(sc->cpu_dev, "_PTC buffer too small\n"); 254 return (ENXIO); 255 } 256 memcpy(&gas, obj.Buffer.Pointer + 3, sizeof(gas)); 257 acpi_bus_alloc_gas(sc->cpu_dev, &sc->cpu_p_type, &thr_rid, 258 &gas, &sc->cpu_p_cnt); 259 if (sc->cpu_p_cnt != NULL && bootverbose) { 260 device_printf(sc->cpu_dev, "P_CNT from _PTC %#jx\n", 261 gas.Address); 262 } 263 } 264 265 /* If _PTC not present or other failure, try the P_BLK. */ 266 if (sc->cpu_p_cnt == NULL) { 267 /* 268 * The spec says P_BLK must be 6 bytes long. However, some 269 * systems use it to indicate a fractional set of features 270 * present so we take anything >= 4. 271 */ 272 if (sc->cpu_p_blk_len < 4) 273 return (ENXIO); 274 gas.Address = sc->cpu_p_blk; 275 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 276 gas.RegisterBitWidth = 32; 277 acpi_bus_alloc_gas(sc->cpu_dev, &sc->cpu_p_type, &thr_rid, 278 &gas, &sc->cpu_p_cnt); 279 if (sc->cpu_p_cnt != NULL) { 280 if (bootverbose) 281 device_printf(sc->cpu_dev, 282 "P_CNT from P_BLK %#x\n", sc->cpu_p_blk); 283 } else { 284 device_printf(sc->cpu_dev, "failed to attach P_CNT\n"); 285 return (ENXIO); 286 } 287 } 288 thr_rid++; 289 290 return (0); 291 } 292 293 static int 294 acpi_throttle_quirks(struct acpi_throttle_softc *sc) 295 { 296 device_t acpi_dev; 297 298 /* Look for various quirks of the PIIX4 part. */ 299 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3); 300 if (acpi_dev) { 301 switch (pci_get_revid(acpi_dev)) { 302 /* 303 * Disable throttling control on PIIX4 A and B-step. 304 * See specification changes #13 ("Manual Throttle Duty Cycle") 305 * and #14 ("Enabling and Disabling Manual Throttle"), plus 306 * erratum #5 ("STPCLK# Deassertion Time") from the January 307 * 2002 PIIX4 specification update. Note that few (if any) 308 * mobile systems ever used this part. 309 */ 310 case PCI_REVISION_A_STEP: 311 case PCI_REVISION_B_STEP: 312 thr_quirks |= CPU_QUIRK_NO_THROTTLE; 313 break; 314 default: 315 break; 316 } 317 } 318 319 return (0); 320 } 321 322 static int 323 acpi_thr_settings(device_t dev, struct cf_setting *sets, int *count, int *type) 324 { 325 struct acpi_throttle_softc *sc; 326 int i, speed; 327 328 sc = device_get_softc(dev); 329 if (sets == NULL || count == NULL) 330 return (EINVAL); 331 if (*count < CPU_MAX_SPEED) 332 return (ENOMEM); 333 334 /* Return a list of valid settings for this driver. */ 335 memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * CPU_MAX_SPEED); 336 for (i = 0, speed = CPU_MAX_SPEED; speed != 0; i++, speed--) { 337 sets[i].freq = CPU_SPEED_PERCENT(speed); 338 sets[i].dev = dev; 339 } 340 *count = CPU_MAX_SPEED; 341 *type = CPUFREQ_TYPE_RELATIVE; 342 343 return (0); 344 } 345 346 static int 347 acpi_thr_set(device_t dev, const struct cf_setting *set) 348 { 349 struct acpi_throttle_softc *sc; 350 uint32_t clk_val, p_cnt, speed; 351 352 if (set == NULL) 353 return (EINVAL); 354 sc = device_get_softc(dev); 355 356 /* 357 * Validate requested state converts to a duty cycle that is an 358 * integer from [1 .. CPU_MAX_SPEED]. 359 */ 360 speed = set->freq * CPU_MAX_SPEED / 10000; 361 if (speed * 10000 != set->freq * CPU_MAX_SPEED || 362 speed < 1 || speed > CPU_MAX_SPEED) 363 return (EINVAL); 364 365 /* If we're at this setting, don't bother applying it again. */ 366 if (speed == sc->cpu_thr_state) 367 return (0); 368 369 /* Get the current P_CNT value and disable throttling */ 370 p_cnt = THR_GET_REG(sc->cpu_p_cnt); 371 p_cnt &= ~CPU_P_CNT_THT_EN; 372 THR_SET_REG(sc->cpu_p_cnt, p_cnt); 373 374 /* If we're at maximum speed, that's all */ 375 if (speed < CPU_MAX_SPEED) { 376 /* Mask the old CLK_VAL off and OR in the new value */ 377 clk_val = (CPU_MAX_SPEED - 1) << cpu_duty_offset; 378 p_cnt &= ~clk_val; 379 p_cnt |= (speed << cpu_duty_offset); 380 381 /* Write the new P_CNT value and then enable throttling */ 382 THR_SET_REG(sc->cpu_p_cnt, p_cnt); 383 p_cnt |= CPU_P_CNT_THT_EN; 384 THR_SET_REG(sc->cpu_p_cnt, p_cnt); 385 } 386 sc->cpu_thr_state = speed; 387 388 return (0); 389 } 390 391 static int 392 acpi_thr_get(device_t dev, struct cf_setting *set) 393 { 394 struct acpi_throttle_softc *sc; 395 uint32_t p_cnt, clk_val; 396 397 if (set == NULL) 398 return (EINVAL); 399 sc = device_get_softc(dev); 400 401 /* Get the current throttling setting from P_CNT. */ 402 p_cnt = THR_GET_REG(sc->cpu_p_cnt); 403 clk_val = (p_cnt >> cpu_duty_offset) & (CPU_MAX_SPEED - 1); 404 sc->cpu_thr_state = clk_val; 405 406 memset(set, CPUFREQ_VAL_UNKNOWN, sizeof(*set)); 407 set->freq = CPU_SPEED_PERCENT(clk_val); 408 set->dev = dev; 409 410 return (0); 411 } 412