1 /*- 2 * Copyright (c) 2003-2005 Nate Lawson (SDG) 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include "opt_acpi.h" 31 #include <sys/param.h> 32 #include <sys/kernel.h> 33 #include <sys/proc.h> 34 #include <sys/sched.h> 35 #include <sys/bus.h> 36 #include <sys/cpu.h> 37 #include <sys/power.h> 38 #include <sys/malloc.h> 39 #include <sys/module.h> 40 #include <sys/sbuf.h> 41 #include <sys/pcpu.h> 42 43 #include <machine/bus.h> 44 #include <machine/resource.h> 45 #include <sys/rman.h> 46 47 #include <contrib/dev/acpica/include/acpi.h> 48 49 #include <dev/acpica/acpivar.h> 50 51 #include "cpufreq_if.h" 52 53 /* 54 * Support for ACPI processor performance states (Px) according to 55 * section 8.3.3 of the ACPI 2.0c specification. 56 */ 57 58 struct acpi_px { 59 uint32_t core_freq; 60 uint32_t power; 61 uint32_t trans_lat; 62 uint32_t bm_lat; 63 uint32_t ctrl_val; 64 uint32_t sts_val; 65 }; 66 67 /* Offsets in struct cf_setting array for storing driver-specific values. */ 68 #define PX_SPEC_CONTROL 0 69 #define PX_SPEC_STATUS 1 70 71 #define MAX_PX_STATES 16 72 73 struct acpi_perf_softc { 74 device_t dev; 75 ACPI_HANDLE handle; 76 struct resource *perf_ctrl; /* Set new performance state. */ 77 int perf_ctrl_type; /* Resource type for perf_ctrl. */ 78 struct resource *perf_status; /* Check that transition succeeded. */ 79 int perf_sts_type; /* Resource type for perf_status. */ 80 struct acpi_px *px_states; /* ACPI perf states. */ 81 uint32_t px_count; /* Total number of perf states. */ 82 uint32_t px_max_avail; /* Lowest index state available. */ 83 int px_curr_state; /* Active state index. */ 84 int px_rid; 85 int info_only; /* Can we set new states? */ 86 }; 87 88 #define PX_GET_REG(reg) \ 89 (bus_space_read_4(rman_get_bustag((reg)), \ 90 rman_get_bushandle((reg)), 0)) 91 #define PX_SET_REG(reg, val) \ 92 (bus_space_write_4(rman_get_bustag((reg)), \ 93 rman_get_bushandle((reg)), 0, (val))) 94 95 #define ACPI_NOTIFY_PERF_STATES 0x80 /* _PSS changed. */ 96 97 static void acpi_perf_identify(driver_t *driver, device_t parent); 98 static int acpi_perf_probe(device_t dev); 99 static int acpi_perf_attach(device_t dev); 100 static int acpi_perf_detach(device_t dev); 101 static int acpi_perf_evaluate(device_t dev); 102 static int acpi_px_to_set(device_t dev, struct acpi_px *px, 103 struct cf_setting *set); 104 static void acpi_px_available(struct acpi_perf_softc *sc); 105 static void acpi_px_startup(void *arg); 106 static void acpi_px_notify(ACPI_HANDLE h, UINT32 notify, void *context); 107 static int acpi_px_settings(device_t dev, struct cf_setting *sets, 108 int *count); 109 static int acpi_px_set(device_t dev, const struct cf_setting *set); 110 static int acpi_px_get(device_t dev, struct cf_setting *set); 111 static int acpi_px_type(device_t dev, int *type); 112 113 static device_method_t acpi_perf_methods[] = { 114 /* Device interface */ 115 DEVMETHOD(device_identify, acpi_perf_identify), 116 DEVMETHOD(device_probe, acpi_perf_probe), 117 DEVMETHOD(device_attach, acpi_perf_attach), 118 DEVMETHOD(device_detach, acpi_perf_detach), 119 120 /* cpufreq interface */ 121 DEVMETHOD(cpufreq_drv_set, acpi_px_set), 122 DEVMETHOD(cpufreq_drv_get, acpi_px_get), 123 DEVMETHOD(cpufreq_drv_type, acpi_px_type), 124 DEVMETHOD(cpufreq_drv_settings, acpi_px_settings), 125 126 DEVMETHOD_END 127 }; 128 129 static driver_t acpi_perf_driver = { 130 "acpi_perf", 131 acpi_perf_methods, 132 sizeof(struct acpi_perf_softc), 133 }; 134 135 DRIVER_MODULE(acpi_perf, cpu, acpi_perf_driver, 0, 0); 136 MODULE_DEPEND(acpi_perf, acpi, 1, 1, 1); 137 138 static MALLOC_DEFINE(M_ACPIPERF, "acpi_perf", "ACPI Performance states"); 139 140 static void 141 acpi_perf_identify(driver_t *driver, device_t parent) 142 { 143 ACPI_HANDLE handle; 144 device_t dev; 145 146 /* Make sure we're not being doubly invoked. */ 147 if (device_find_child(parent, "acpi_perf", -1) != NULL) 148 return; 149 150 /* Get the handle for the Processor object and check for perf states. */ 151 handle = acpi_get_handle(parent); 152 if (handle == NULL) 153 return; 154 if (ACPI_FAILURE(AcpiEvaluateObject(handle, "_PSS", NULL, NULL))) 155 return; 156 157 /* 158 * Add a child to every CPU that has the right methods. In future 159 * versions of the ACPI spec, CPUs can have different settings. 160 * We probe this child now so that other devices that depend 161 * on it (i.e., for info about supported states) will see it. 162 */ 163 if ((dev = BUS_ADD_CHILD(parent, 0, "acpi_perf", 164 device_get_unit(parent))) != NULL) 165 device_probe_and_attach(dev); 166 else 167 device_printf(parent, "add acpi_perf child failed\n"); 168 } 169 170 static int 171 acpi_perf_probe(device_t dev) 172 { 173 ACPI_HANDLE handle; 174 ACPI_OBJECT *pkg; 175 struct resource *res; 176 ACPI_BUFFER buf; 177 int error, rid, type; 178 179 if (resource_disabled("acpi_perf", 0)) 180 return (ENXIO); 181 182 /* 183 * Check the performance state registers. If they are of type 184 * "functional fixed hardware", we attach quietly since we will 185 * only be providing information on settings to other drivers. 186 */ 187 error = ENXIO; 188 handle = acpi_get_handle(dev); 189 buf.Pointer = NULL; 190 buf.Length = ACPI_ALLOCATE_BUFFER; 191 if (ACPI_FAILURE(AcpiEvaluateObject(handle, "_PCT", NULL, &buf))) 192 return (error); 193 pkg = (ACPI_OBJECT *)buf.Pointer; 194 if (ACPI_PKG_VALID(pkg, 2)) { 195 rid = 0; 196 error = acpi_PkgGas(dev, pkg, 0, &type, &rid, &res, 0); 197 switch (error) { 198 case 0: 199 bus_release_resource(dev, type, rid, res); 200 bus_delete_resource(dev, type, rid); 201 device_set_desc(dev, "ACPI CPU Frequency Control"); 202 break; 203 case EOPNOTSUPP: 204 device_quiet(dev); 205 error = 0; 206 break; 207 } 208 } 209 AcpiOsFree(buf.Pointer); 210 211 return (error); 212 } 213 214 static int 215 acpi_perf_attach(device_t dev) 216 { 217 struct acpi_perf_softc *sc; 218 219 sc = device_get_softc(dev); 220 sc->dev = dev; 221 sc->handle = acpi_get_handle(dev); 222 sc->px_max_avail = 0; 223 sc->px_curr_state = CPUFREQ_VAL_UNKNOWN; 224 if (acpi_perf_evaluate(dev) != 0) 225 return (ENXIO); 226 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_px_startup, NULL); 227 if (!sc->info_only) 228 cpufreq_register(dev); 229 230 return (0); 231 } 232 233 static int 234 acpi_perf_detach(device_t dev) 235 { 236 /* TODO: teardown registers, remove notify handler. */ 237 return (ENXIO); 238 } 239 240 /* Probe and setup any valid performance states (Px). */ 241 static int 242 acpi_perf_evaluate(device_t dev) 243 { 244 struct acpi_perf_softc *sc; 245 ACPI_BUFFER buf; 246 ACPI_OBJECT *pkg, *res; 247 ACPI_STATUS status; 248 int count, error, i, j; 249 static int once = 1; 250 uint32_t *p; 251 252 /* Get the control values and parameters for each state. */ 253 error = ENXIO; 254 sc = device_get_softc(dev); 255 buf.Pointer = NULL; 256 buf.Length = ACPI_ALLOCATE_BUFFER; 257 status = AcpiEvaluateObject(sc->handle, "_PSS", NULL, &buf); 258 if (ACPI_FAILURE(status)) 259 return (ENXIO); 260 261 pkg = (ACPI_OBJECT *)buf.Pointer; 262 if (!ACPI_PKG_VALID(pkg, 1)) { 263 device_printf(dev, "invalid top level _PSS package\n"); 264 goto out; 265 } 266 sc->px_count = pkg->Package.Count; 267 268 sc->px_states = malloc(sc->px_count * sizeof(struct acpi_px), 269 M_ACPIPERF, M_WAITOK | M_ZERO); 270 271 /* 272 * Each state is a package of {CoreFreq, Power, TransitionLatency, 273 * BusMasterLatency, ControlVal, StatusVal}, sorted from highest 274 * performance to lowest. 275 */ 276 count = 0; 277 for (i = 0; i < sc->px_count; i++) { 278 res = &pkg->Package.Elements[i]; 279 if (!ACPI_PKG_VALID(res, 6)) { 280 if (once) { 281 once = 0; 282 device_printf(dev, "invalid _PSS package\n"); 283 } 284 continue; 285 } 286 287 /* Parse the rest of the package into the struct. */ 288 p = &sc->px_states[count].core_freq; 289 for (j = 0; j < 6; j++, p++) 290 acpi_PkgInt32(res, j, p); 291 292 /* 293 * Check for some impossible frequencies that some systems 294 * use to indicate they don't actually support this Px state. 295 */ 296 if (sc->px_states[count].core_freq == 0 || 297 sc->px_states[count].core_freq == 9999 || 298 sc->px_states[count].core_freq == 0x9999 || 299 sc->px_states[count].core_freq >= 0xffff) 300 continue; 301 302 /* Check for duplicate entries */ 303 if (count > 0 && 304 sc->px_states[count - 1].core_freq == 305 sc->px_states[count].core_freq) 306 continue; 307 308 count++; 309 } 310 sc->px_count = count; 311 312 /* No valid Px state found so give up. */ 313 if (count == 0) 314 goto out; 315 AcpiOsFree(buf.Pointer); 316 317 /* Get the control and status registers (one of each). */ 318 buf.Pointer = NULL; 319 buf.Length = ACPI_ALLOCATE_BUFFER; 320 status = AcpiEvaluateObject(sc->handle, "_PCT", NULL, &buf); 321 if (ACPI_FAILURE(status)) 322 goto out; 323 324 /* Check the package of two registers, each a Buffer in GAS format. */ 325 pkg = (ACPI_OBJECT *)buf.Pointer; 326 if (!ACPI_PKG_VALID(pkg, 2)) { 327 device_printf(dev, "invalid perf register package\n"); 328 goto out; 329 } 330 331 error = acpi_PkgGas(sc->dev, pkg, 0, &sc->perf_ctrl_type, &sc->px_rid, 332 &sc->perf_ctrl, 0); 333 if (error) { 334 /* 335 * If the register is of type FFixedHW, we can only return 336 * info, we can't get or set new settings. 337 */ 338 if (error == EOPNOTSUPP) { 339 sc->info_only = TRUE; 340 error = 0; 341 } else 342 device_printf(dev, "failed in PERF_CTL attach\n"); 343 goto out; 344 } 345 sc->px_rid++; 346 347 error = acpi_PkgGas(sc->dev, pkg, 1, &sc->perf_sts_type, &sc->px_rid, 348 &sc->perf_status, 0); 349 if (error) { 350 if (error == EOPNOTSUPP) { 351 sc->info_only = TRUE; 352 error = 0; 353 } else 354 device_printf(dev, "failed in PERF_STATUS attach\n"); 355 goto out; 356 } 357 sc->px_rid++; 358 359 /* Get our current limit and register for notifies. */ 360 acpi_px_available(sc); 361 AcpiInstallNotifyHandler(sc->handle, ACPI_DEVICE_NOTIFY, 362 acpi_px_notify, sc); 363 error = 0; 364 365 out: 366 if (error) { 367 if (sc->px_states) { 368 free(sc->px_states, M_ACPIPERF); 369 sc->px_states = NULL; 370 } 371 if (sc->perf_ctrl) { 372 bus_release_resource(sc->dev, sc->perf_ctrl_type, 0, 373 sc->perf_ctrl); 374 bus_delete_resource(sc->dev, sc->perf_ctrl_type, 0); 375 sc->perf_ctrl = NULL; 376 } 377 if (sc->perf_status) { 378 bus_release_resource(sc->dev, sc->perf_sts_type, 1, 379 sc->perf_status); 380 bus_delete_resource(sc->dev, sc->perf_sts_type, 1); 381 sc->perf_status = NULL; 382 } 383 sc->px_rid = 0; 384 sc->px_count = 0; 385 } 386 if (buf.Pointer) 387 AcpiOsFree(buf.Pointer); 388 return (error); 389 } 390 391 static void 392 acpi_px_startup(void *arg) 393 { 394 395 /* Signal to the platform that we are taking over CPU control. */ 396 if (AcpiGbl_FADT.PstateControl == 0) 397 return; 398 ACPI_LOCK(acpi); 399 AcpiOsWritePort(AcpiGbl_FADT.SmiCommand, AcpiGbl_FADT.PstateControl, 8); 400 ACPI_UNLOCK(acpi); 401 } 402 403 static void 404 acpi_px_notify(ACPI_HANDLE h, UINT32 notify, void *context) 405 { 406 struct acpi_perf_softc *sc; 407 408 sc = context; 409 if (notify != ACPI_NOTIFY_PERF_STATES) 410 return; 411 412 acpi_px_available(sc); 413 414 /* TODO: Implement notification when frequency changes. */ 415 } 416 417 /* 418 * Find the highest currently-supported performance state. 419 * This can be called at runtime (e.g., due to a docking event) at 420 * the request of a Notify on the processor object. 421 */ 422 static void 423 acpi_px_available(struct acpi_perf_softc *sc) 424 { 425 ACPI_STATUS status; 426 struct cf_setting set; 427 428 status = acpi_GetInteger(sc->handle, "_PPC", &sc->px_max_avail); 429 430 /* If the old state is too high, set current state to the new max. */ 431 if (ACPI_SUCCESS(status)) { 432 if (sc->px_curr_state != CPUFREQ_VAL_UNKNOWN && 433 sc->px_curr_state > sc->px_max_avail) { 434 acpi_px_to_set(sc->dev, 435 &sc->px_states[sc->px_max_avail], &set); 436 acpi_px_set(sc->dev, &set); 437 } 438 } else 439 sc->px_max_avail = 0; 440 } 441 442 static int 443 acpi_px_to_set(device_t dev, struct acpi_px *px, struct cf_setting *set) 444 { 445 446 if (px == NULL || set == NULL) 447 return (EINVAL); 448 449 set->freq = px->core_freq; 450 set->power = px->power; 451 /* XXX Include BM latency too? */ 452 set->lat = px->trans_lat; 453 set->volts = CPUFREQ_VAL_UNKNOWN; 454 set->dev = dev; 455 set->spec[PX_SPEC_CONTROL] = px->ctrl_val; 456 set->spec[PX_SPEC_STATUS] = px->sts_val; 457 458 return (0); 459 } 460 461 static int 462 acpi_px_settings(device_t dev, struct cf_setting *sets, int *count) 463 { 464 struct acpi_perf_softc *sc; 465 int x, y; 466 467 sc = device_get_softc(dev); 468 if (sets == NULL || count == NULL) 469 return (EINVAL); 470 if (*count < sc->px_count - sc->px_max_avail) 471 return (E2BIG); 472 473 /* Return a list of settings that are currently valid. */ 474 y = 0; 475 for (x = sc->px_max_avail; x < sc->px_count; x++, y++) 476 acpi_px_to_set(dev, &sc->px_states[x], &sets[y]); 477 *count = sc->px_count - sc->px_max_avail; 478 479 return (0); 480 } 481 482 static int 483 acpi_px_set(device_t dev, const struct cf_setting *set) 484 { 485 struct acpi_perf_softc *sc; 486 int i, status, sts_val, tries; 487 488 if (set == NULL) 489 return (EINVAL); 490 sc = device_get_softc(dev); 491 492 /* If we can't set new states, return immediately. */ 493 if (sc->info_only) 494 return (ENXIO); 495 496 /* Look up appropriate state, based on frequency. */ 497 for (i = sc->px_max_avail; i < sc->px_count; i++) { 498 if (CPUFREQ_CMP(set->freq, sc->px_states[i].core_freq)) 499 break; 500 } 501 if (i == sc->px_count) 502 return (EINVAL); 503 504 /* Write the appropriate value to the register. */ 505 PX_SET_REG(sc->perf_ctrl, sc->px_states[i].ctrl_val); 506 507 /* 508 * Try for up to 10 ms to verify the desired state was selected. 509 * This is longer than the standard says (1 ms) but in some modes, 510 * systems may take longer to respond. 511 */ 512 sts_val = sc->px_states[i].sts_val; 513 for (tries = 0; tries < 1000; tries++) { 514 status = PX_GET_REG(sc->perf_status); 515 516 /* 517 * If we match the status or the desired status is 8 bits 518 * and matches the relevant bits, assume we succeeded. It 519 * appears some systems (IBM R32) expect byte-wide access 520 * even though the standard says the register is 32-bit. 521 */ 522 if (status == sts_val || 523 ((sts_val & ~0xff) == 0 && (status & 0xff) == sts_val)) 524 break; 525 DELAY(10); 526 } 527 if (tries == 1000) { 528 device_printf(dev, "Px transition to %d failed\n", 529 sc->px_states[i].core_freq); 530 return (ENXIO); 531 } 532 sc->px_curr_state = i; 533 534 return (0); 535 } 536 537 static int 538 acpi_px_get(device_t dev, struct cf_setting *set) 539 { 540 struct acpi_perf_softc *sc; 541 uint64_t rate; 542 int i; 543 struct pcpu *pc; 544 545 if (set == NULL) 546 return (EINVAL); 547 sc = device_get_softc(dev); 548 549 /* If we can't get new states, return immediately. */ 550 if (sc->info_only) 551 return (ENXIO); 552 553 /* If we've set the rate before, use the cached value. */ 554 if (sc->px_curr_state != CPUFREQ_VAL_UNKNOWN) { 555 acpi_px_to_set(dev, &sc->px_states[sc->px_curr_state], set); 556 return (0); 557 } 558 559 /* Otherwise, estimate and try to match against our settings. */ 560 pc = cpu_get_pcpu(dev); 561 if (pc == NULL) 562 return (ENXIO); 563 cpu_est_clockrate(pc->pc_cpuid, &rate); 564 rate /= 1000000; 565 for (i = 0; i < sc->px_count; i++) { 566 if (CPUFREQ_CMP(sc->px_states[i].core_freq, rate)) { 567 sc->px_curr_state = i; 568 acpi_px_to_set(dev, &sc->px_states[i], set); 569 break; 570 } 571 } 572 573 /* No match, give up. */ 574 if (i == sc->px_count) { 575 sc->px_curr_state = CPUFREQ_VAL_UNKNOWN; 576 set->freq = CPUFREQ_VAL_UNKNOWN; 577 } 578 579 return (0); 580 } 581 582 static int 583 acpi_px_type(device_t dev, int *type) 584 { 585 struct acpi_perf_softc *sc; 586 587 if (type == NULL) 588 return (EINVAL); 589 sc = device_get_softc(dev); 590 591 *type = CPUFREQ_TYPE_ABSOLUTE; 592 if (sc->info_only) 593 *type |= CPUFREQ_FLAG_INFO_ONLY; 594 return (0); 595 } 596