1 /*- 2 * Copyright (c) 2003-2005 Nate Lawson (SDG) 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include "opt_acpi.h" 31 #include <sys/param.h> 32 #include <sys/kernel.h> 33 #include <sys/proc.h> 34 #include <sys/sched.h> 35 #include <sys/bus.h> 36 #include <sys/cpu.h> 37 #include <sys/power.h> 38 #include <sys/malloc.h> 39 #include <sys/module.h> 40 #include <sys/sbuf.h> 41 #include <sys/pcpu.h> 42 43 #include <machine/bus_pio.h> 44 #include <machine/bus.h> 45 #include <machine/resource.h> 46 #include <sys/rman.h> 47 48 #include "acpi.h" 49 #include <dev/acpica/acpivar.h> 50 51 #include "cpufreq_if.h" 52 53 /* 54 * Support for ACPI processor performance states (Px) according to 55 * section 8.3.3 of the ACPI 2.0c specification. 56 */ 57 58 struct acpi_px { 59 uint32_t core_freq; 60 uint32_t power; 61 uint32_t trans_lat; 62 uint32_t bm_lat; 63 uint32_t ctrl_val; 64 uint32_t sts_val; 65 }; 66 67 /* Offsets in struct cf_setting array for storing driver-specific values. */ 68 #define PX_SPEC_CONTROL 0 69 #define PX_SPEC_STATUS 1 70 71 #define MAX_PX_STATES 16 72 73 struct acpi_perf_softc { 74 device_t dev; 75 ACPI_HANDLE handle; 76 struct resource *perf_ctrl; /* Set new performance state. */ 77 int perf_ctrl_type; /* Resource type for perf_ctrl. */ 78 struct resource *perf_status; /* Check that transition succeeded. */ 79 int perf_sts_type; /* Resource type for perf_status. */ 80 struct acpi_px *px_states; /* ACPI perf states. */ 81 uint32_t px_count; /* Total number of perf states. */ 82 uint32_t px_max_avail; /* Lowest index state available. */ 83 int px_curr_state; /* Active state index. */ 84 int px_rid; 85 int info_only; /* Can we set new states? */ 86 }; 87 88 #define PX_GET_REG(reg) \ 89 (bus_space_read_4(rman_get_bustag((reg)), \ 90 rman_get_bushandle((reg)), 0)) 91 #define PX_SET_REG(reg, val) \ 92 (bus_space_write_4(rman_get_bustag((reg)), \ 93 rman_get_bushandle((reg)), 0, (val))) 94 95 #define ACPI_NOTIFY_PERF_STATES 0x80 /* _PSS changed. */ 96 97 static void acpi_perf_identify(driver_t *driver, device_t parent); 98 static int acpi_perf_probe(device_t dev); 99 static int acpi_perf_attach(device_t dev); 100 static int acpi_perf_detach(device_t dev); 101 static int acpi_perf_evaluate(device_t dev); 102 static int acpi_px_to_set(device_t dev, struct acpi_px *px, 103 struct cf_setting *set); 104 static void acpi_px_available(struct acpi_perf_softc *sc); 105 static void acpi_px_startup(void *arg); 106 static void acpi_px_notify(ACPI_HANDLE h, UINT32 notify, void *context); 107 static int acpi_px_settings(device_t dev, struct cf_setting *sets, 108 int *count); 109 static int acpi_px_set(device_t dev, const struct cf_setting *set); 110 static int acpi_px_get(device_t dev, struct cf_setting *set); 111 static int acpi_px_type(device_t dev, int *type); 112 113 static device_method_t acpi_perf_methods[] = { 114 /* Device interface */ 115 DEVMETHOD(device_identify, acpi_perf_identify), 116 DEVMETHOD(device_probe, acpi_perf_probe), 117 DEVMETHOD(device_attach, acpi_perf_attach), 118 DEVMETHOD(device_detach, acpi_perf_detach), 119 120 /* cpufreq interface */ 121 DEVMETHOD(cpufreq_drv_set, acpi_px_set), 122 DEVMETHOD(cpufreq_drv_get, acpi_px_get), 123 DEVMETHOD(cpufreq_drv_type, acpi_px_type), 124 DEVMETHOD(cpufreq_drv_settings, acpi_px_settings), 125 {0, 0} 126 }; 127 128 static driver_t acpi_perf_driver = { 129 "acpi_perf", 130 acpi_perf_methods, 131 sizeof(struct acpi_perf_softc), 132 }; 133 134 static devclass_t acpi_perf_devclass; 135 DRIVER_MODULE(acpi_perf, cpu, acpi_perf_driver, acpi_perf_devclass, 0, 0); 136 MODULE_DEPEND(acpi_perf, acpi, 1, 1, 1); 137 138 MALLOC_DEFINE(M_ACPIPERF, "acpi_perf", "ACPI Performance states"); 139 140 static void 141 acpi_perf_identify(driver_t *driver, device_t parent) 142 { 143 ACPI_HANDLE handle; 144 145 /* Make sure we're not being doubly invoked. */ 146 if (device_find_child(parent, "acpi_perf", -1) != NULL) 147 return; 148 149 /* Get the handle for the Processor object and check for perf states. */ 150 handle = acpi_get_handle(parent); 151 if (handle == NULL) 152 return; 153 if (ACPI_FAILURE(AcpiEvaluateObject(handle, "_PSS", NULL, NULL))) 154 return; 155 156 /* 157 * Add a child to every CPU that has the right methods. In future 158 * versions of the ACPI spec, CPUs can have different settings. 159 */ 160 if (BUS_ADD_CHILD(parent, 0, "acpi_perf", -1) == NULL) 161 device_printf(parent, "add acpi_perf child failed\n"); 162 } 163 164 static int 165 acpi_perf_probe(device_t dev) 166 { 167 ACPI_HANDLE handle; 168 ACPI_OBJECT *pkg; 169 struct resource *res; 170 ACPI_BUFFER buf; 171 int error, rid, type; 172 173 if (resource_disabled("acpi_perf", 0)) 174 return (ENXIO); 175 176 /* 177 * Check the performance state registers. If they are of type 178 * "functional fixed hardware", we attach quietly since we will 179 * only be providing information on settings to other drivers. 180 */ 181 error = ENXIO; 182 handle = acpi_get_handle(dev); 183 buf.Pointer = NULL; 184 buf.Length = ACPI_ALLOCATE_BUFFER; 185 if (ACPI_FAILURE(AcpiEvaluateObject(handle, "_PCT", NULL, &buf))) 186 return (error); 187 pkg = (ACPI_OBJECT *)buf.Pointer; 188 if (ACPI_PKG_VALID(pkg, 2)) { 189 rid = 0; 190 error = acpi_PkgGas(dev, pkg, 0, &type, &rid, &res); 191 switch (error) { 192 case 0: 193 bus_release_resource(dev, type, rid, res); 194 device_set_desc(dev, "ACPI CPU Frequency Control"); 195 break; 196 case EOPNOTSUPP: 197 device_quiet(dev); 198 error = 0; 199 break; 200 } 201 } 202 AcpiOsFree(buf.Pointer); 203 204 return (error); 205 } 206 207 static int 208 acpi_perf_attach(device_t dev) 209 { 210 struct acpi_perf_softc *sc; 211 212 sc = device_get_softc(dev); 213 sc->dev = dev; 214 sc->handle = acpi_get_handle(dev); 215 sc->px_max_avail = 0; 216 sc->px_curr_state = CPUFREQ_VAL_UNKNOWN; 217 if (acpi_perf_evaluate(dev) != 0) 218 return (ENXIO); 219 AcpiOsQueueForExecution(OSD_PRIORITY_LO, acpi_px_startup, NULL); 220 if (!sc->info_only) 221 cpufreq_register(dev); 222 223 return (0); 224 } 225 226 static int 227 acpi_perf_detach(device_t dev) 228 { 229 /* TODO: teardown registers, remove notify handler. */ 230 return (ENXIO); 231 } 232 233 /* Probe and setup any valid performance states (Px). */ 234 static int 235 acpi_perf_evaluate(device_t dev) 236 { 237 struct acpi_perf_softc *sc; 238 ACPI_BUFFER buf; 239 ACPI_OBJECT *pkg, *res; 240 ACPI_STATUS status; 241 int error, i, j; 242 uint32_t *p; 243 244 /* Get the control values and parameters for each state. */ 245 error = ENXIO; 246 sc = device_get_softc(dev); 247 buf.Pointer = NULL; 248 buf.Length = ACPI_ALLOCATE_BUFFER; 249 status = AcpiEvaluateObject(sc->handle, "_PSS", NULL, &buf); 250 if (ACPI_FAILURE(status)) 251 return (ENXIO); 252 253 pkg = (ACPI_OBJECT *)buf.Pointer; 254 if (!ACPI_PKG_VALID(pkg, 1)) { 255 device_printf(dev, "invalid top level _PSS package\n"); 256 goto out; 257 } 258 sc->px_count = pkg->Package.Count; 259 260 sc->px_states = malloc(sc->px_count * sizeof(struct acpi_px), 261 M_ACPIPERF, M_WAITOK | M_ZERO); 262 if (sc->px_states == NULL) 263 goto out; 264 265 /* 266 * Each state is a package of {CoreFreq, Power, TransitionLatency, 267 * BusMasterLatency, ControlVal, StatusVal}, sorted from highest 268 * performance to lowest. 269 */ 270 for (i = 0; i < sc->px_count; i++) { 271 res = &pkg->Package.Elements[i]; 272 if (!ACPI_PKG_VALID(res, 6)) { 273 device_printf(dev, "invalid _PSS package\n"); 274 continue; 275 } 276 p = &sc->px_states[i].core_freq; 277 for (j = 0; j < 6; j++, p++) 278 acpi_PkgInt32(res, j, p); 279 } 280 AcpiOsFree(buf.Pointer); 281 282 /* Get the control and status registers (one of each). */ 283 buf.Pointer = NULL; 284 buf.Length = ACPI_ALLOCATE_BUFFER; 285 status = AcpiEvaluateObject(sc->handle, "_PCT", NULL, &buf); 286 if (ACPI_FAILURE(status)) 287 goto out; 288 289 /* Check the package of two registers, each a Buffer in GAS format. */ 290 pkg = (ACPI_OBJECT *)buf.Pointer; 291 if (!ACPI_PKG_VALID(pkg, 2)) { 292 device_printf(dev, "invalid perf register package\n"); 293 goto out; 294 } 295 296 error = acpi_PkgGas(sc->dev, pkg, 0, &sc->perf_ctrl_type, &sc->px_rid, 297 &sc->perf_ctrl); 298 if (error) { 299 /* 300 * If the register is of type FFixedHW, we can only return 301 * info, we can't get or set new settings. 302 */ 303 if (error == EOPNOTSUPP) { 304 sc->info_only = TRUE; 305 error = 0; 306 } else 307 device_printf(dev, "failed in PERF_CTL attach\n"); 308 goto out; 309 } 310 sc->px_rid++; 311 312 error = acpi_PkgGas(sc->dev, pkg, 1, &sc->perf_sts_type, &sc->px_rid, 313 &sc->perf_status); 314 if (error) { 315 if (error == EOPNOTSUPP) { 316 sc->info_only = TRUE; 317 error = 0; 318 } else 319 device_printf(dev, "failed in PERF_STATUS attach\n"); 320 goto out; 321 } 322 sc->px_rid++; 323 324 /* Get our current limit and register for notifies. */ 325 acpi_px_available(sc); 326 AcpiInstallNotifyHandler(sc->handle, ACPI_DEVICE_NOTIFY, 327 acpi_px_notify, sc); 328 error = 0; 329 330 out: 331 if (error) { 332 if (sc->px_states) 333 free(sc->px_states, M_ACPIPERF); 334 sc->px_count = 0; 335 } 336 if (buf.Pointer) 337 AcpiOsFree(buf.Pointer); 338 return (error); 339 } 340 341 static void 342 acpi_px_startup(void *arg) 343 { 344 345 /* Signal to the platform that we are taking over CPU control. */ 346 if (AcpiGbl_FADT->PstateCnt == 0) 347 return; 348 ACPI_LOCK(acpi); 349 AcpiOsWritePort(AcpiGbl_FADT->SmiCmd, AcpiGbl_FADT->PstateCnt, 8); 350 ACPI_UNLOCK(acpi); 351 } 352 353 static void 354 acpi_px_notify(ACPI_HANDLE h, UINT32 notify, void *context) 355 { 356 struct acpi_perf_softc *sc; 357 358 sc = context; 359 if (notify != ACPI_NOTIFY_PERF_STATES) 360 return; 361 362 acpi_px_available(sc); 363 364 /* TODO: Implement notification when frequency changes. */ 365 } 366 367 /* 368 * Find the highest currently-supported performance state. 369 * This can be called at runtime (e.g., due to a docking event) at 370 * the request of a Notify on the processor object. 371 */ 372 static void 373 acpi_px_available(struct acpi_perf_softc *sc) 374 { 375 ACPI_STATUS status; 376 struct cf_setting set; 377 378 status = acpi_GetInteger(sc->handle, "_PPC", &sc->px_max_avail); 379 380 /* If the old state is too high, set current state to the new max. */ 381 if (ACPI_SUCCESS(status)) { 382 if (sc->px_curr_state != CPUFREQ_VAL_UNKNOWN && 383 sc->px_curr_state > sc->px_max_avail) { 384 acpi_px_to_set(sc->dev, 385 &sc->px_states[sc->px_max_avail], &set); 386 acpi_px_set(sc->dev, &set); 387 } 388 } else 389 sc->px_max_avail = 0; 390 } 391 392 static int 393 acpi_px_to_set(device_t dev, struct acpi_px *px, struct cf_setting *set) 394 { 395 396 if (px == NULL || set == NULL) 397 return (EINVAL); 398 399 set->freq = px->core_freq; 400 set->power = px->power; 401 /* XXX Include BM latency too? */ 402 set->lat = px->trans_lat; 403 set->volts = CPUFREQ_VAL_UNKNOWN; 404 set->dev = dev; 405 set->spec[PX_SPEC_CONTROL] = px->ctrl_val; 406 set->spec[PX_SPEC_STATUS] = px->sts_val; 407 408 return (0); 409 } 410 411 static int 412 acpi_px_settings(device_t dev, struct cf_setting *sets, int *count) 413 { 414 struct acpi_perf_softc *sc; 415 int x, y; 416 417 sc = device_get_softc(dev); 418 if (sets == NULL || count == NULL) 419 return (EINVAL); 420 if (*count < sc->px_count - sc->px_max_avail) 421 return (E2BIG); 422 423 /* Return a list of settings that are currently valid. */ 424 y = 0; 425 for (x = sc->px_max_avail; x < sc->px_count; x++, y++) 426 acpi_px_to_set(dev, &sc->px_states[x], &sets[y]); 427 *count = sc->px_count - sc->px_max_avail; 428 429 return (0); 430 } 431 432 static int 433 acpi_px_set(device_t dev, const struct cf_setting *set) 434 { 435 struct acpi_perf_softc *sc; 436 int i, status, sts_val, tries; 437 438 if (set == NULL) 439 return (EINVAL); 440 sc = device_get_softc(dev); 441 442 /* If we can't set new states, return immediately. */ 443 if (sc->info_only) 444 return (ENXIO); 445 446 /* Look up appropriate state, based on frequency. */ 447 for (i = sc->px_max_avail; i < sc->px_count; i++) { 448 if (CPUFREQ_CMP(set->freq, sc->px_states[i].core_freq)) 449 break; 450 } 451 if (i == sc->px_count) 452 return (EINVAL); 453 454 /* Write the appropriate value to the register. */ 455 PX_SET_REG(sc->perf_ctrl, sc->px_states[i].ctrl_val); 456 457 /* 458 * Try for up to 10 ms to verify the desired state was selected. 459 * This is longer than the standard says (1 ms) but in some modes, 460 * systems may take longer to respond. 461 */ 462 sts_val = sc->px_states[i].sts_val; 463 for (tries = 0; tries < 1000; tries++) { 464 status = PX_GET_REG(sc->perf_status); 465 466 /* 467 * If we match the status or the desired status is 8 bits 468 * and matches the relevant bits, assume we succeeded. It 469 * appears some systems (IBM R32) expect byte-wide access 470 * even though the standard says the register is 32-bit. 471 */ 472 if (status == sts_val || 473 ((sts_val & ~0xff) == 0 && (status & 0xff) == sts_val)) 474 break; 475 DELAY(10); 476 } 477 if (tries == 1000) { 478 device_printf(dev, "Px transition to %d failed\n", 479 sc->px_states[i].core_freq); 480 return (ENXIO); 481 } 482 sc->px_curr_state = i; 483 484 return (0); 485 } 486 487 static int 488 acpi_px_get(device_t dev, struct cf_setting *set) 489 { 490 struct acpi_perf_softc *sc; 491 uint64_t rate; 492 int i; 493 struct pcpu *pc; 494 495 if (set == NULL) 496 return (EINVAL); 497 sc = device_get_softc(dev); 498 499 /* If we can't get new states, return immediately. */ 500 if (sc->info_only) 501 return (ENXIO); 502 503 /* If we've set the rate before, use the cached value. */ 504 if (sc->px_curr_state != CPUFREQ_VAL_UNKNOWN) { 505 acpi_px_to_set(dev, &sc->px_states[sc->px_curr_state], set); 506 return (0); 507 } 508 509 /* Otherwise, estimate and try to match against our settings. */ 510 pc = cpu_get_pcpu(dev); 511 if (pc == NULL) 512 return (ENXIO); 513 cpu_est_clockrate(pc->pc_cpuid, &rate); 514 rate /= 1000000; 515 for (i = 0; i < sc->px_count; i++) { 516 if (CPUFREQ_CMP(sc->px_states[i].core_freq, rate)) { 517 sc->px_curr_state = i; 518 acpi_px_to_set(dev, &sc->px_states[i], set); 519 break; 520 } 521 } 522 523 /* No match, give up. */ 524 if (i == sc->px_count) { 525 sc->px_curr_state = CPUFREQ_VAL_UNKNOWN; 526 set->freq = CPUFREQ_VAL_UNKNOWN; 527 } 528 529 return (0); 530 } 531 532 static int 533 acpi_px_type(device_t dev, int *type) 534 { 535 struct acpi_perf_softc *sc; 536 537 if (type == NULL) 538 return (EINVAL); 539 sc = device_get_softc(dev); 540 541 *type = CPUFREQ_TYPE_ABSOLUTE; 542 if (sc->info_only) 543 *type |= CPUFREQ_FLAG_INFO_ONLY; 544 return (0); 545 } 546