1 /*- 2 * Copyright (c) 2003-2005 Nate Lawson (SDG) 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include "opt_acpi.h" 31 #include <sys/param.h> 32 #include <sys/kernel.h> 33 #include <sys/proc.h> 34 #include <sys/sched.h> 35 #include <sys/bus.h> 36 #include <sys/cpu.h> 37 #include <sys/power.h> 38 #include <sys/malloc.h> 39 #include <sys/module.h> 40 #include <sys/sbuf.h> 41 #include <sys/pcpu.h> 42 43 #include <machine/bus.h> 44 #include <machine/resource.h> 45 #include <sys/rman.h> 46 47 #include <contrib/dev/acpica/include/acpi.h> 48 49 #include <dev/acpica/acpivar.h> 50 51 #include "cpufreq_if.h" 52 53 /* 54 * Support for ACPI processor performance states (Px) according to 55 * section 8.3.3 of the ACPI 2.0c specification. 56 */ 57 58 struct acpi_px { 59 uint32_t core_freq; 60 uint32_t power; 61 uint32_t trans_lat; 62 uint32_t bm_lat; 63 uint32_t ctrl_val; 64 uint32_t sts_val; 65 }; 66 67 /* Offsets in struct cf_setting array for storing driver-specific values. */ 68 #define PX_SPEC_CONTROL 0 69 #define PX_SPEC_STATUS 1 70 71 #define MAX_PX_STATES 16 72 73 struct acpi_perf_softc { 74 device_t dev; 75 ACPI_HANDLE handle; 76 struct resource *perf_ctrl; /* Set new performance state. */ 77 int perf_ctrl_type; /* Resource type for perf_ctrl. */ 78 struct resource *perf_status; /* Check that transition succeeded. */ 79 int perf_sts_type; /* Resource type for perf_status. */ 80 struct acpi_px *px_states; /* ACPI perf states. */ 81 uint32_t px_count; /* Total number of perf states. */ 82 uint32_t px_max_avail; /* Lowest index state available. */ 83 int px_curr_state; /* Active state index. */ 84 int px_rid; 85 int info_only; /* Can we set new states? */ 86 }; 87 88 #define PX_GET_REG(reg) \ 89 (bus_space_read_4(rman_get_bustag((reg)), \ 90 rman_get_bushandle((reg)), 0)) 91 #define PX_SET_REG(reg, val) \ 92 (bus_space_write_4(rman_get_bustag((reg)), \ 93 rman_get_bushandle((reg)), 0, (val))) 94 95 #define ACPI_NOTIFY_PERF_STATES 0x80 /* _PSS changed. */ 96 97 static void acpi_perf_identify(driver_t *driver, device_t parent); 98 static int acpi_perf_probe(device_t dev); 99 static int acpi_perf_attach(device_t dev); 100 static int acpi_perf_detach(device_t dev); 101 static int acpi_perf_evaluate(device_t dev); 102 static int acpi_px_to_set(device_t dev, struct acpi_px *px, 103 struct cf_setting *set); 104 static void acpi_px_available(struct acpi_perf_softc *sc); 105 static void acpi_px_startup(void *arg); 106 static void acpi_px_notify(ACPI_HANDLE h, UINT32 notify, void *context); 107 static int acpi_px_settings(device_t dev, struct cf_setting *sets, 108 int *count); 109 static int acpi_px_set(device_t dev, const struct cf_setting *set); 110 static int acpi_px_get(device_t dev, struct cf_setting *set); 111 static int acpi_px_type(device_t dev, int *type); 112 113 static device_method_t acpi_perf_methods[] = { 114 /* Device interface */ 115 DEVMETHOD(device_identify, acpi_perf_identify), 116 DEVMETHOD(device_probe, acpi_perf_probe), 117 DEVMETHOD(device_attach, acpi_perf_attach), 118 DEVMETHOD(device_detach, acpi_perf_detach), 119 120 /* cpufreq interface */ 121 DEVMETHOD(cpufreq_drv_set, acpi_px_set), 122 DEVMETHOD(cpufreq_drv_get, acpi_px_get), 123 DEVMETHOD(cpufreq_drv_type, acpi_px_type), 124 DEVMETHOD(cpufreq_drv_settings, acpi_px_settings), 125 126 DEVMETHOD_END 127 }; 128 129 static driver_t acpi_perf_driver = { 130 "acpi_perf", 131 acpi_perf_methods, 132 sizeof(struct acpi_perf_softc), 133 }; 134 135 static devclass_t acpi_perf_devclass; 136 DRIVER_MODULE(acpi_perf, cpu, acpi_perf_driver, acpi_perf_devclass, 0, 0); 137 MODULE_DEPEND(acpi_perf, acpi, 1, 1, 1); 138 139 static MALLOC_DEFINE(M_ACPIPERF, "acpi_perf", "ACPI Performance states"); 140 141 static void 142 acpi_perf_identify(driver_t *driver, device_t parent) 143 { 144 ACPI_HANDLE handle; 145 device_t dev; 146 147 /* Make sure we're not being doubly invoked. */ 148 if (device_find_child(parent, "acpi_perf", -1) != NULL) 149 return; 150 151 /* Get the handle for the Processor object and check for perf states. */ 152 handle = acpi_get_handle(parent); 153 if (handle == NULL) 154 return; 155 if (ACPI_FAILURE(AcpiEvaluateObject(handle, "_PSS", NULL, NULL))) 156 return; 157 158 /* 159 * Add a child to every CPU that has the right methods. In future 160 * versions of the ACPI spec, CPUs can have different settings. 161 * We probe this child now so that other devices that depend 162 * on it (i.e., for info about supported states) will see it. 163 */ 164 if ((dev = BUS_ADD_CHILD(parent, 0, "acpi_perf", 165 device_get_unit(parent))) != NULL) 166 device_probe_and_attach(dev); 167 else 168 device_printf(parent, "add acpi_perf child failed\n"); 169 } 170 171 static int 172 acpi_perf_probe(device_t dev) 173 { 174 ACPI_HANDLE handle; 175 ACPI_OBJECT *pkg; 176 struct resource *res; 177 ACPI_BUFFER buf; 178 int error, rid, type; 179 180 if (resource_disabled("acpi_perf", 0)) 181 return (ENXIO); 182 183 /* 184 * Check the performance state registers. If they are of type 185 * "functional fixed hardware", we attach quietly since we will 186 * only be providing information on settings to other drivers. 187 */ 188 error = ENXIO; 189 handle = acpi_get_handle(dev); 190 buf.Pointer = NULL; 191 buf.Length = ACPI_ALLOCATE_BUFFER; 192 if (ACPI_FAILURE(AcpiEvaluateObject(handle, "_PCT", NULL, &buf))) 193 return (error); 194 pkg = (ACPI_OBJECT *)buf.Pointer; 195 if (ACPI_PKG_VALID(pkg, 2)) { 196 rid = 0; 197 error = acpi_PkgGas(dev, pkg, 0, &type, &rid, &res, 0); 198 switch (error) { 199 case 0: 200 bus_release_resource(dev, type, rid, res); 201 bus_delete_resource(dev, type, rid); 202 device_set_desc(dev, "ACPI CPU Frequency Control"); 203 break; 204 case EOPNOTSUPP: 205 device_quiet(dev); 206 error = 0; 207 break; 208 } 209 } 210 AcpiOsFree(buf.Pointer); 211 212 return (error); 213 } 214 215 static int 216 acpi_perf_attach(device_t dev) 217 { 218 struct acpi_perf_softc *sc; 219 220 sc = device_get_softc(dev); 221 sc->dev = dev; 222 sc->handle = acpi_get_handle(dev); 223 sc->px_max_avail = 0; 224 sc->px_curr_state = CPUFREQ_VAL_UNKNOWN; 225 if (acpi_perf_evaluate(dev) != 0) 226 return (ENXIO); 227 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_px_startup, NULL); 228 if (!sc->info_only) 229 cpufreq_register(dev); 230 231 return (0); 232 } 233 234 static int 235 acpi_perf_detach(device_t dev) 236 { 237 /* TODO: teardown registers, remove notify handler. */ 238 return (ENXIO); 239 } 240 241 /* Probe and setup any valid performance states (Px). */ 242 static int 243 acpi_perf_evaluate(device_t dev) 244 { 245 struct acpi_perf_softc *sc; 246 ACPI_BUFFER buf; 247 ACPI_OBJECT *pkg, *res; 248 ACPI_STATUS status; 249 int count, error, i, j; 250 static int once = 1; 251 uint32_t *p; 252 253 /* Get the control values and parameters for each state. */ 254 error = ENXIO; 255 sc = device_get_softc(dev); 256 buf.Pointer = NULL; 257 buf.Length = ACPI_ALLOCATE_BUFFER; 258 status = AcpiEvaluateObject(sc->handle, "_PSS", NULL, &buf); 259 if (ACPI_FAILURE(status)) 260 return (ENXIO); 261 262 pkg = (ACPI_OBJECT *)buf.Pointer; 263 if (!ACPI_PKG_VALID(pkg, 1)) { 264 device_printf(dev, "invalid top level _PSS package\n"); 265 goto out; 266 } 267 sc->px_count = pkg->Package.Count; 268 269 sc->px_states = malloc(sc->px_count * sizeof(struct acpi_px), 270 M_ACPIPERF, M_WAITOK | M_ZERO); 271 272 /* 273 * Each state is a package of {CoreFreq, Power, TransitionLatency, 274 * BusMasterLatency, ControlVal, StatusVal}, sorted from highest 275 * performance to lowest. 276 */ 277 count = 0; 278 for (i = 0; i < sc->px_count; i++) { 279 res = &pkg->Package.Elements[i]; 280 if (!ACPI_PKG_VALID(res, 6)) { 281 if (once) { 282 once = 0; 283 device_printf(dev, "invalid _PSS package\n"); 284 } 285 continue; 286 } 287 288 /* Parse the rest of the package into the struct. */ 289 p = &sc->px_states[count].core_freq; 290 for (j = 0; j < 6; j++, p++) 291 acpi_PkgInt32(res, j, p); 292 293 /* 294 * Check for some impossible frequencies that some systems 295 * use to indicate they don't actually support this Px state. 296 */ 297 if (sc->px_states[count].core_freq == 0 || 298 sc->px_states[count].core_freq == 9999 || 299 sc->px_states[count].core_freq == 0x9999 || 300 sc->px_states[count].core_freq >= 0xffff) 301 continue; 302 303 /* Check for duplicate entries */ 304 if (count > 0 && 305 sc->px_states[count - 1].core_freq == 306 sc->px_states[count].core_freq) 307 continue; 308 309 count++; 310 } 311 sc->px_count = count; 312 313 /* No valid Px state found so give up. */ 314 if (count == 0) 315 goto out; 316 AcpiOsFree(buf.Pointer); 317 318 /* Get the control and status registers (one of each). */ 319 buf.Pointer = NULL; 320 buf.Length = ACPI_ALLOCATE_BUFFER; 321 status = AcpiEvaluateObject(sc->handle, "_PCT", NULL, &buf); 322 if (ACPI_FAILURE(status)) 323 goto out; 324 325 /* Check the package of two registers, each a Buffer in GAS format. */ 326 pkg = (ACPI_OBJECT *)buf.Pointer; 327 if (!ACPI_PKG_VALID(pkg, 2)) { 328 device_printf(dev, "invalid perf register package\n"); 329 goto out; 330 } 331 332 error = acpi_PkgGas(sc->dev, pkg, 0, &sc->perf_ctrl_type, &sc->px_rid, 333 &sc->perf_ctrl, 0); 334 if (error) { 335 /* 336 * If the register is of type FFixedHW, we can only return 337 * info, we can't get or set new settings. 338 */ 339 if (error == EOPNOTSUPP) { 340 sc->info_only = TRUE; 341 error = 0; 342 } else 343 device_printf(dev, "failed in PERF_CTL attach\n"); 344 goto out; 345 } 346 sc->px_rid++; 347 348 error = acpi_PkgGas(sc->dev, pkg, 1, &sc->perf_sts_type, &sc->px_rid, 349 &sc->perf_status, 0); 350 if (error) { 351 if (error == EOPNOTSUPP) { 352 sc->info_only = TRUE; 353 error = 0; 354 } else 355 device_printf(dev, "failed in PERF_STATUS attach\n"); 356 goto out; 357 } 358 sc->px_rid++; 359 360 /* Get our current limit and register for notifies. */ 361 acpi_px_available(sc); 362 AcpiInstallNotifyHandler(sc->handle, ACPI_DEVICE_NOTIFY, 363 acpi_px_notify, sc); 364 error = 0; 365 366 out: 367 if (error) { 368 if (sc->px_states) { 369 free(sc->px_states, M_ACPIPERF); 370 sc->px_states = NULL; 371 } 372 if (sc->perf_ctrl) { 373 bus_release_resource(sc->dev, sc->perf_ctrl_type, 0, 374 sc->perf_ctrl); 375 bus_delete_resource(sc->dev, sc->perf_ctrl_type, 0); 376 sc->perf_ctrl = NULL; 377 } 378 if (sc->perf_status) { 379 bus_release_resource(sc->dev, sc->perf_sts_type, 1, 380 sc->perf_status); 381 bus_delete_resource(sc->dev, sc->perf_sts_type, 1); 382 sc->perf_status = NULL; 383 } 384 sc->px_rid = 0; 385 sc->px_count = 0; 386 } 387 if (buf.Pointer) 388 AcpiOsFree(buf.Pointer); 389 return (error); 390 } 391 392 static void 393 acpi_px_startup(void *arg) 394 { 395 396 /* Signal to the platform that we are taking over CPU control. */ 397 if (AcpiGbl_FADT.PstateControl == 0) 398 return; 399 ACPI_LOCK(acpi); 400 AcpiOsWritePort(AcpiGbl_FADT.SmiCommand, AcpiGbl_FADT.PstateControl, 8); 401 ACPI_UNLOCK(acpi); 402 } 403 404 static void 405 acpi_px_notify(ACPI_HANDLE h, UINT32 notify, void *context) 406 { 407 struct acpi_perf_softc *sc; 408 409 sc = context; 410 if (notify != ACPI_NOTIFY_PERF_STATES) 411 return; 412 413 acpi_px_available(sc); 414 415 /* TODO: Implement notification when frequency changes. */ 416 } 417 418 /* 419 * Find the highest currently-supported performance state. 420 * This can be called at runtime (e.g., due to a docking event) at 421 * the request of a Notify on the processor object. 422 */ 423 static void 424 acpi_px_available(struct acpi_perf_softc *sc) 425 { 426 ACPI_STATUS status; 427 struct cf_setting set; 428 429 status = acpi_GetInteger(sc->handle, "_PPC", &sc->px_max_avail); 430 431 /* If the old state is too high, set current state to the new max. */ 432 if (ACPI_SUCCESS(status)) { 433 if (sc->px_curr_state != CPUFREQ_VAL_UNKNOWN && 434 sc->px_curr_state > sc->px_max_avail) { 435 acpi_px_to_set(sc->dev, 436 &sc->px_states[sc->px_max_avail], &set); 437 acpi_px_set(sc->dev, &set); 438 } 439 } else 440 sc->px_max_avail = 0; 441 } 442 443 static int 444 acpi_px_to_set(device_t dev, struct acpi_px *px, struct cf_setting *set) 445 { 446 447 if (px == NULL || set == NULL) 448 return (EINVAL); 449 450 set->freq = px->core_freq; 451 set->power = px->power; 452 /* XXX Include BM latency too? */ 453 set->lat = px->trans_lat; 454 set->volts = CPUFREQ_VAL_UNKNOWN; 455 set->dev = dev; 456 set->spec[PX_SPEC_CONTROL] = px->ctrl_val; 457 set->spec[PX_SPEC_STATUS] = px->sts_val; 458 459 return (0); 460 } 461 462 static int 463 acpi_px_settings(device_t dev, struct cf_setting *sets, int *count) 464 { 465 struct acpi_perf_softc *sc; 466 int x, y; 467 468 sc = device_get_softc(dev); 469 if (sets == NULL || count == NULL) 470 return (EINVAL); 471 if (*count < sc->px_count - sc->px_max_avail) 472 return (E2BIG); 473 474 /* Return a list of settings that are currently valid. */ 475 y = 0; 476 for (x = sc->px_max_avail; x < sc->px_count; x++, y++) 477 acpi_px_to_set(dev, &sc->px_states[x], &sets[y]); 478 *count = sc->px_count - sc->px_max_avail; 479 480 return (0); 481 } 482 483 static int 484 acpi_px_set(device_t dev, const struct cf_setting *set) 485 { 486 struct acpi_perf_softc *sc; 487 int i, status, sts_val, tries; 488 489 if (set == NULL) 490 return (EINVAL); 491 sc = device_get_softc(dev); 492 493 /* If we can't set new states, return immediately. */ 494 if (sc->info_only) 495 return (ENXIO); 496 497 /* Look up appropriate state, based on frequency. */ 498 for (i = sc->px_max_avail; i < sc->px_count; i++) { 499 if (CPUFREQ_CMP(set->freq, sc->px_states[i].core_freq)) 500 break; 501 } 502 if (i == sc->px_count) 503 return (EINVAL); 504 505 /* Write the appropriate value to the register. */ 506 PX_SET_REG(sc->perf_ctrl, sc->px_states[i].ctrl_val); 507 508 /* 509 * Try for up to 10 ms to verify the desired state was selected. 510 * This is longer than the standard says (1 ms) but in some modes, 511 * systems may take longer to respond. 512 */ 513 sts_val = sc->px_states[i].sts_val; 514 for (tries = 0; tries < 1000; tries++) { 515 status = PX_GET_REG(sc->perf_status); 516 517 /* 518 * If we match the status or the desired status is 8 bits 519 * and matches the relevant bits, assume we succeeded. It 520 * appears some systems (IBM R32) expect byte-wide access 521 * even though the standard says the register is 32-bit. 522 */ 523 if (status == sts_val || 524 ((sts_val & ~0xff) == 0 && (status & 0xff) == sts_val)) 525 break; 526 DELAY(10); 527 } 528 if (tries == 1000) { 529 device_printf(dev, "Px transition to %d failed\n", 530 sc->px_states[i].core_freq); 531 return (ENXIO); 532 } 533 sc->px_curr_state = i; 534 535 return (0); 536 } 537 538 static int 539 acpi_px_get(device_t dev, struct cf_setting *set) 540 { 541 struct acpi_perf_softc *sc; 542 uint64_t rate; 543 int i; 544 struct pcpu *pc; 545 546 if (set == NULL) 547 return (EINVAL); 548 sc = device_get_softc(dev); 549 550 /* If we can't get new states, return immediately. */ 551 if (sc->info_only) 552 return (ENXIO); 553 554 /* If we've set the rate before, use the cached value. */ 555 if (sc->px_curr_state != CPUFREQ_VAL_UNKNOWN) { 556 acpi_px_to_set(dev, &sc->px_states[sc->px_curr_state], set); 557 return (0); 558 } 559 560 /* Otherwise, estimate and try to match against our settings. */ 561 pc = cpu_get_pcpu(dev); 562 if (pc == NULL) 563 return (ENXIO); 564 cpu_est_clockrate(pc->pc_cpuid, &rate); 565 rate /= 1000000; 566 for (i = 0; i < sc->px_count; i++) { 567 if (CPUFREQ_CMP(sc->px_states[i].core_freq, rate)) { 568 sc->px_curr_state = i; 569 acpi_px_to_set(dev, &sc->px_states[i], set); 570 break; 571 } 572 } 573 574 /* No match, give up. */ 575 if (i == sc->px_count) { 576 sc->px_curr_state = CPUFREQ_VAL_UNKNOWN; 577 set->freq = CPUFREQ_VAL_UNKNOWN; 578 } 579 580 return (0); 581 } 582 583 static int 584 acpi_px_type(device_t dev, int *type) 585 { 586 struct acpi_perf_softc *sc; 587 588 if (type == NULL) 589 return (EINVAL); 590 sc = device_get_softc(dev); 591 592 *type = CPUFREQ_TYPE_ABSOLUTE; 593 if (sc->info_only) 594 *type |= CPUFREQ_FLAG_INFO_ONLY; 595 return (0); 596 } 597