1 /*- 2 * Copyright (c) 2000 Michael Smith 3 * Copyright (c) 2000 BSDi 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include "opt_acpi.h" 32 #include "opt_pci.h" 33 34 #include <sys/param.h> 35 #include <sys/bus.h> 36 #include <sys/kernel.h> 37 #include <sys/limits.h> 38 #include <sys/malloc.h> 39 #include <sys/module.h> 40 #include <sys/rman.h> 41 #include <sys/sysctl.h> 42 43 #include <contrib/dev/acpica/include/acpi.h> 44 #include <contrib/dev/acpica/include/accommon.h> 45 46 #include <dev/acpica/acpivar.h> 47 48 #include <machine/pci_cfgreg.h> 49 #include <dev/pci/pcireg.h> 50 #include <dev/pci/pcivar.h> 51 #include <dev/pci/pcib_private.h> 52 #include "pcib_if.h" 53 54 #include <dev/acpica/acpi_pcibvar.h> 55 56 /* Hooks for the ACPI CA debugging infrastructure. */ 57 #define _COMPONENT ACPI_BUS 58 ACPI_MODULE_NAME("PCI_ACPI") 59 60 struct acpi_hpcib_softc { 61 device_t ap_dev; 62 ACPI_HANDLE ap_handle; 63 int ap_flags; 64 uint32_t ap_osc_ctl; 65 66 int ap_segment; /* PCI domain */ 67 int ap_bus; /* bios-assigned bus number */ 68 int ap_addr; /* device/func of PCI-Host bridge */ 69 70 ACPI_BUFFER ap_prt; /* interrupt routing table */ 71 #ifdef NEW_PCIB 72 struct pcib_host_resources ap_host_res; 73 #endif 74 }; 75 76 static int acpi_pcib_acpi_probe(device_t bus); 77 static int acpi_pcib_acpi_attach(device_t bus); 78 static int acpi_pcib_read_ivar(device_t dev, device_t child, 79 int which, uintptr_t *result); 80 static int acpi_pcib_write_ivar(device_t dev, device_t child, 81 int which, uintptr_t value); 82 static uint32_t acpi_pcib_read_config(device_t dev, u_int bus, 83 u_int slot, u_int func, u_int reg, int bytes); 84 static void acpi_pcib_write_config(device_t dev, u_int bus, 85 u_int slot, u_int func, u_int reg, uint32_t data, 86 int bytes); 87 static int acpi_pcib_acpi_route_interrupt(device_t pcib, 88 device_t dev, int pin); 89 static int acpi_pcib_alloc_msi(device_t pcib, device_t dev, 90 int count, int maxcount, int *irqs); 91 static int acpi_pcib_map_msi(device_t pcib, device_t dev, 92 int irq, uint64_t *addr, uint32_t *data); 93 static int acpi_pcib_alloc_msix(device_t pcib, device_t dev, 94 int *irq); 95 static struct resource *acpi_pcib_acpi_alloc_resource(device_t dev, 96 device_t child, int type, int *rid, 97 rman_res_t start, rman_res_t end, rman_res_t count, 98 u_int flags); 99 #ifdef NEW_PCIB 100 static int acpi_pcib_acpi_adjust_resource(device_t dev, 101 device_t child, int type, struct resource *r, 102 rman_res_t start, rman_res_t end); 103 #ifdef PCI_RES_BUS 104 static int acpi_pcib_acpi_release_resource(device_t dev, 105 device_t child, int type, int rid, 106 struct resource *r); 107 #endif 108 #endif 109 static int acpi_pcib_request_feature(device_t pcib, device_t dev, 110 enum pci_feature feature); 111 112 static device_method_t acpi_pcib_acpi_methods[] = { 113 /* Device interface */ 114 DEVMETHOD(device_probe, acpi_pcib_acpi_probe), 115 DEVMETHOD(device_attach, acpi_pcib_acpi_attach), 116 DEVMETHOD(device_shutdown, bus_generic_shutdown), 117 DEVMETHOD(device_suspend, bus_generic_suspend), 118 DEVMETHOD(device_resume, bus_generic_resume), 119 120 /* Bus interface */ 121 DEVMETHOD(bus_read_ivar, acpi_pcib_read_ivar), 122 DEVMETHOD(bus_write_ivar, acpi_pcib_write_ivar), 123 DEVMETHOD(bus_alloc_resource, acpi_pcib_acpi_alloc_resource), 124 #ifdef NEW_PCIB 125 DEVMETHOD(bus_adjust_resource, acpi_pcib_acpi_adjust_resource), 126 #else 127 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource), 128 #endif 129 #if defined(NEW_PCIB) && defined(PCI_RES_BUS) 130 DEVMETHOD(bus_release_resource, acpi_pcib_acpi_release_resource), 131 #else 132 DEVMETHOD(bus_release_resource, bus_generic_release_resource), 133 #endif 134 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 135 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 136 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 137 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 138 DEVMETHOD(bus_get_cpus, acpi_pcib_get_cpus), 139 140 /* pcib interface */ 141 DEVMETHOD(pcib_maxslots, pcib_maxslots), 142 DEVMETHOD(pcib_read_config, acpi_pcib_read_config), 143 DEVMETHOD(pcib_write_config, acpi_pcib_write_config), 144 DEVMETHOD(pcib_route_interrupt, acpi_pcib_acpi_route_interrupt), 145 DEVMETHOD(pcib_alloc_msi, acpi_pcib_alloc_msi), 146 DEVMETHOD(pcib_release_msi, pcib_release_msi), 147 DEVMETHOD(pcib_alloc_msix, acpi_pcib_alloc_msix), 148 DEVMETHOD(pcib_release_msix, pcib_release_msix), 149 DEVMETHOD(pcib_map_msi, acpi_pcib_map_msi), 150 DEVMETHOD(pcib_power_for_sleep, acpi_pcib_power_for_sleep), 151 DEVMETHOD(pcib_request_feature, acpi_pcib_request_feature), 152 153 DEVMETHOD_END 154 }; 155 156 static devclass_t pcib_devclass; 157 158 DEFINE_CLASS_0(pcib, acpi_pcib_acpi_driver, acpi_pcib_acpi_methods, 159 sizeof(struct acpi_hpcib_softc)); 160 DRIVER_MODULE(acpi_pcib, acpi, acpi_pcib_acpi_driver, pcib_devclass, 0, 0); 161 MODULE_DEPEND(acpi_pcib, acpi, 1, 1, 1); 162 163 static int 164 acpi_pcib_acpi_probe(device_t dev) 165 { 166 ACPI_DEVICE_INFO *devinfo; 167 ACPI_HANDLE h; 168 int root; 169 170 if (acpi_disabled("pcib") || (h = acpi_get_handle(dev)) == NULL || 171 ACPI_FAILURE(AcpiGetObjectInfo(h, &devinfo))) 172 return (ENXIO); 173 root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0; 174 AcpiOsFree(devinfo); 175 if (!root || pci_cfgregopen() == 0) 176 return (ENXIO); 177 178 device_set_desc(dev, "ACPI Host-PCI bridge"); 179 return (0); 180 } 181 182 #ifdef NEW_PCIB 183 static ACPI_STATUS 184 acpi_pcib_producer_handler(ACPI_RESOURCE *res, void *context) 185 { 186 struct acpi_hpcib_softc *sc; 187 UINT64 length, min, max; 188 u_int flags; 189 int error, type; 190 191 sc = context; 192 switch (res->Type) { 193 case ACPI_RESOURCE_TYPE_START_DEPENDENT: 194 case ACPI_RESOURCE_TYPE_END_DEPENDENT: 195 panic("host bridge has depenedent resources"); 196 case ACPI_RESOURCE_TYPE_ADDRESS16: 197 case ACPI_RESOURCE_TYPE_ADDRESS32: 198 case ACPI_RESOURCE_TYPE_ADDRESS64: 199 case ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64: 200 if (res->Data.Address.ProducerConsumer != ACPI_PRODUCER) 201 break; 202 switch (res->Type) { 203 case ACPI_RESOURCE_TYPE_ADDRESS16: 204 min = res->Data.Address16.Address.Minimum; 205 max = res->Data.Address16.Address.Maximum; 206 length = res->Data.Address16.Address.AddressLength; 207 break; 208 case ACPI_RESOURCE_TYPE_ADDRESS32: 209 min = res->Data.Address32.Address.Minimum; 210 max = res->Data.Address32.Address.Maximum; 211 length = res->Data.Address32.Address.AddressLength; 212 break; 213 case ACPI_RESOURCE_TYPE_ADDRESS64: 214 min = res->Data.Address64.Address.Minimum; 215 max = res->Data.Address64.Address.Maximum; 216 length = res->Data.Address64.Address.AddressLength; 217 break; 218 default: 219 KASSERT(res->Type == 220 ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64, 221 ("should never happen")); 222 min = res->Data.ExtAddress64.Address.Minimum; 223 max = res->Data.ExtAddress64.Address.Maximum; 224 length = res->Data.ExtAddress64.Address.AddressLength; 225 break; 226 } 227 if (length == 0) 228 break; 229 if (min + length - 1 != max && 230 (res->Data.Address.MinAddressFixed != ACPI_ADDRESS_FIXED || 231 res->Data.Address.MaxAddressFixed != ACPI_ADDRESS_FIXED)) 232 break; 233 flags = 0; 234 switch (res->Data.Address.ResourceType) { 235 case ACPI_MEMORY_RANGE: 236 type = SYS_RES_MEMORY; 237 if (res->Type != ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64) { 238 if (res->Data.Address.Info.Mem.Caching == 239 ACPI_PREFETCHABLE_MEMORY) 240 flags |= RF_PREFETCHABLE; 241 } else { 242 /* 243 * XXX: Parse prefetch flag out of 244 * TypeSpecific. 245 */ 246 } 247 break; 248 case ACPI_IO_RANGE: 249 type = SYS_RES_IOPORT; 250 break; 251 #ifdef PCI_RES_BUS 252 case ACPI_BUS_NUMBER_RANGE: 253 type = PCI_RES_BUS; 254 break; 255 #endif 256 default: 257 return (AE_OK); 258 } 259 260 if (min + length - 1 != max) 261 device_printf(sc->ap_dev, 262 "Length mismatch for %d range: %jx vs %jx\n", type, 263 (uintmax_t)(max - min + 1), (uintmax_t)length); 264 #ifdef __i386__ 265 if (min > ULONG_MAX) { 266 device_printf(sc->ap_dev, 267 "Ignoring %d range above 4GB (%#jx-%#jx)\n", 268 type, (uintmax_t)min, (uintmax_t)max); 269 break; 270 } 271 if (max > ULONG_MAX) { 272 device_printf(sc->ap_dev, 273 "Truncating end of %d range above 4GB (%#jx-%#jx)\n", 274 type, (uintmax_t)min, (uintmax_t)max); 275 max = ULONG_MAX; 276 } 277 #endif 278 error = pcib_host_res_decodes(&sc->ap_host_res, type, min, max, 279 flags); 280 if (error) 281 panic("Failed to manage %d range (%#jx-%#jx): %d", 282 type, (uintmax_t)min, (uintmax_t)max, error); 283 break; 284 default: 285 break; 286 } 287 return (AE_OK); 288 } 289 #endif 290 291 #if defined(NEW_PCIB) && defined(PCI_RES_BUS) 292 static int 293 first_decoded_bus(struct acpi_hpcib_softc *sc, rman_res_t *startp) 294 { 295 struct resource_list_entry *rle; 296 297 rle = resource_list_find(&sc->ap_host_res.hr_rl, PCI_RES_BUS, 0); 298 if (rle == NULL) 299 return (ENXIO); 300 *startp = rle->start; 301 return (0); 302 } 303 #endif 304 305 static int 306 acpi_pcib_osc(struct acpi_hpcib_softc *sc, uint32_t osc_ctl) 307 { 308 ACPI_STATUS status; 309 uint32_t cap_set[3]; 310 311 static uint8_t pci_host_bridge_uuid[ACPI_UUID_LENGTH] = { 312 0x5b, 0x4d, 0xdb, 0x33, 0xf7, 0x1f, 0x1c, 0x40, 313 0x96, 0x57, 0x74, 0x41, 0xc0, 0x3d, 0xd7, 0x66 314 }; 315 316 /* Status Field */ 317 cap_set[PCI_OSC_STATUS] = 0; 318 319 /* Support Field: Extended PCI Config Space, MSI */ 320 cap_set[PCI_OSC_SUPPORT] = PCIM_OSC_SUPPORT_EXT_PCI_CONF | 321 PCIM_OSC_SUPPORT_MSI; 322 323 /* Control Field */ 324 sc->ap_osc_ctl |= osc_ctl; 325 cap_set[PCI_OSC_CTL] = sc->ap_osc_ctl; 326 327 status = acpi_EvaluateOSC(sc->ap_handle, pci_host_bridge_uuid, 1, 328 nitems(cap_set), cap_set, cap_set, false); 329 if (ACPI_FAILURE(status)) { 330 if (status == AE_NOT_FOUND) 331 return (0); 332 device_printf(sc->ap_dev, "_OSC failed: %s\n", 333 AcpiFormatException(status)); 334 return (EIO); 335 } 336 337 if (cap_set[PCI_OSC_STATUS] == 0) 338 sc->ap_osc_ctl = cap_set[PCI_OSC_CTL]; 339 340 if (cap_set[PCI_OSC_STATUS] != 0 || 341 (cap_set[PCI_OSC_CTL] & osc_ctl) != osc_ctl) 342 return (EIO); 343 344 return (0); 345 } 346 347 static int 348 acpi_pcib_acpi_attach(device_t dev) 349 { 350 struct acpi_hpcib_softc *sc; 351 ACPI_STATUS status; 352 static int bus0_seen = 0; 353 u_int slot, func, busok; 354 #if defined(NEW_PCIB) && defined(PCI_RES_BUS) 355 struct resource *bus_res; 356 rman_res_t start; 357 int rid; 358 #endif 359 uint8_t busno; 360 361 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 362 363 sc = device_get_softc(dev); 364 sc->ap_dev = dev; 365 sc->ap_handle = acpi_get_handle(dev); 366 367 /* 368 * Don't attach if we're not really there. 369 */ 370 if (!acpi_DeviceIsPresent(dev)) 371 return (ENXIO); 372 373 acpi_pcib_osc(sc, 0); 374 375 /* 376 * Get our segment number by evaluating _SEG. 377 * It's OK for this to not exist. 378 */ 379 status = acpi_GetInteger(sc->ap_handle, "_SEG", &sc->ap_segment); 380 if (ACPI_FAILURE(status)) { 381 if (status != AE_NOT_FOUND) { 382 device_printf(dev, "could not evaluate _SEG - %s\n", 383 AcpiFormatException(status)); 384 return_VALUE (ENXIO); 385 } 386 /* If it's not found, assume 0. */ 387 sc->ap_segment = 0; 388 } 389 390 /* 391 * Get the address (device and function) of the associated 392 * PCI-Host bridge device from _ADR. Assume we don't have one if 393 * it doesn't exist. 394 */ 395 status = acpi_GetInteger(sc->ap_handle, "_ADR", &sc->ap_addr); 396 if (ACPI_FAILURE(status)) { 397 device_printf(dev, "could not evaluate _ADR - %s\n", 398 AcpiFormatException(status)); 399 sc->ap_addr = -1; 400 } 401 402 #ifdef NEW_PCIB 403 /* 404 * Determine which address ranges this bridge decodes and setup 405 * resource managers for those ranges. 406 */ 407 if (pcib_host_res_init(sc->ap_dev, &sc->ap_host_res) != 0) 408 panic("failed to init hostb resources"); 409 if (!acpi_disabled("hostres")) { 410 status = AcpiWalkResources(sc->ap_handle, "_CRS", 411 acpi_pcib_producer_handler, sc); 412 if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) 413 device_printf(sc->ap_dev, "failed to parse resources: %s\n", 414 AcpiFormatException(status)); 415 } 416 #endif 417 418 /* 419 * Get our base bus number by evaluating _BBN. 420 * If this doesn't work, we assume we're bus number 0. 421 * 422 * XXX note that it may also not exist in the case where we are 423 * meant to use a private configuration space mechanism for this bus, 424 * so we should dig out our resources and check to see if we have 425 * anything like that. How do we do this? 426 * XXX If we have the requisite information, and if we don't think the 427 * default PCI configuration space handlers can deal with this bus, 428 * we should attach our own handler. 429 * XXX invoke _REG on this for the PCI config space address space? 430 * XXX It seems many BIOS's with multiple Host-PCI bridges do not set 431 * _BBN correctly. They set _BBN to zero for all bridges. Thus, 432 * if _BBN is zero and PCI bus 0 already exists, we try to read our 433 * bus number from the configuration registers at address _ADR. 434 * We only do this for domain/segment 0 in the hopes that this is 435 * only needed for old single-domain machines. 436 */ 437 status = acpi_GetInteger(sc->ap_handle, "_BBN", &sc->ap_bus); 438 if (ACPI_FAILURE(status)) { 439 if (status != AE_NOT_FOUND) { 440 device_printf(dev, "could not evaluate _BBN - %s\n", 441 AcpiFormatException(status)); 442 return (ENXIO); 443 } else { 444 /* If it's not found, assume 0. */ 445 sc->ap_bus = 0; 446 } 447 } 448 449 /* 450 * If this is segment 0, the bus is zero, and PCI bus 0 already 451 * exists, read the bus number via PCI config space. 452 */ 453 busok = 1; 454 if (sc->ap_segment == 0 && sc->ap_bus == 0 && bus0_seen) { 455 busok = 0; 456 if (sc->ap_addr != -1) { 457 /* XXX: We assume bus 0. */ 458 slot = ACPI_ADR_PCI_SLOT(sc->ap_addr); 459 func = ACPI_ADR_PCI_FUNC(sc->ap_addr); 460 if (bootverbose) 461 device_printf(dev, "reading config registers from 0:%d:%d\n", 462 slot, func); 463 if (host_pcib_get_busno(pci_cfgregread, 0, slot, func, &busno) == 0) 464 device_printf(dev, "couldn't read bus number from cfg space\n"); 465 else { 466 sc->ap_bus = busno; 467 busok = 1; 468 } 469 } 470 } 471 472 #if defined(NEW_PCIB) && defined(PCI_RES_BUS) 473 /* 474 * If nothing else worked, hope that ACPI at least lays out the 475 * Host-PCI bridges in order and that as a result the next free 476 * bus number is our bus number. 477 */ 478 if (busok == 0) { 479 /* 480 * If we have a region of bus numbers, use the first 481 * number for our bus. 482 */ 483 if (first_decoded_bus(sc, &start) == 0) 484 sc->ap_bus = start; 485 else { 486 rid = 0; 487 bus_res = pci_domain_alloc_bus(sc->ap_segment, dev, &rid, 0, 488 PCI_BUSMAX, 1, 0); 489 if (bus_res == NULL) { 490 device_printf(dev, 491 "could not allocate bus number\n"); 492 pcib_host_res_free(dev, &sc->ap_host_res); 493 return (ENXIO); 494 } 495 sc->ap_bus = rman_get_start(bus_res); 496 pci_domain_release_bus(sc->ap_segment, dev, rid, bus_res); 497 } 498 } else { 499 /* 500 * Require the bus number from _BBN to match the start of any 501 * decoded range. 502 */ 503 if (first_decoded_bus(sc, &start) == 0 && sc->ap_bus != start) { 504 device_printf(dev, 505 "bus number %d does not match start of decoded range %ju\n", 506 sc->ap_bus, (uintmax_t)start); 507 pcib_host_res_free(dev, &sc->ap_host_res); 508 return (ENXIO); 509 } 510 } 511 #else 512 /* 513 * If nothing else worked, hope that ACPI at least lays out the 514 * host-PCI bridges in order and that as a result our unit number 515 * is actually our bus number. There are several reasons this 516 * might not be true. 517 */ 518 if (busok == 0) { 519 sc->ap_bus = device_get_unit(dev); 520 device_printf(dev, "trying bus number %d\n", sc->ap_bus); 521 } 522 #endif 523 524 /* If this is bus 0 on segment 0, note that it has been seen already. */ 525 if (sc->ap_segment == 0 && sc->ap_bus == 0) 526 bus0_seen = 1; 527 528 acpi_pcib_fetch_prt(dev, &sc->ap_prt); 529 530 if (device_add_child(dev, "pci", -1) == NULL) { 531 device_printf(device_get_parent(dev), "couldn't attach pci bus\n"); 532 #if defined(NEW_PCIB) && defined(PCI_RES_BUS) 533 pcib_host_res_free(dev, &sc->ap_host_res); 534 #endif 535 return (ENXIO); 536 } 537 return (bus_generic_attach(dev)); 538 } 539 540 /* 541 * Support for standard PCI bridge ivars. 542 */ 543 static int 544 acpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 545 { 546 struct acpi_hpcib_softc *sc = device_get_softc(dev); 547 548 switch (which) { 549 case PCIB_IVAR_DOMAIN: 550 *result = sc->ap_segment; 551 return (0); 552 case PCIB_IVAR_BUS: 553 *result = sc->ap_bus; 554 return (0); 555 case ACPI_IVAR_HANDLE: 556 *result = (uintptr_t)sc->ap_handle; 557 return (0); 558 case ACPI_IVAR_FLAGS: 559 *result = (uintptr_t)sc->ap_flags; 560 return (0); 561 } 562 return (ENOENT); 563 } 564 565 static int 566 acpi_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 567 { 568 struct acpi_hpcib_softc *sc = device_get_softc(dev); 569 570 switch (which) { 571 case PCIB_IVAR_DOMAIN: 572 return (EINVAL); 573 case PCIB_IVAR_BUS: 574 sc->ap_bus = value; 575 return (0); 576 case ACPI_IVAR_HANDLE: 577 sc->ap_handle = (ACPI_HANDLE)value; 578 return (0); 579 case ACPI_IVAR_FLAGS: 580 sc->ap_flags = (int)value; 581 return (0); 582 } 583 return (ENOENT); 584 } 585 586 static uint32_t 587 acpi_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func, 588 u_int reg, int bytes) 589 { 590 return (pci_cfgregread(bus, slot, func, reg, bytes)); 591 } 592 593 static void 594 acpi_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func, 595 u_int reg, uint32_t data, int bytes) 596 { 597 pci_cfgregwrite(bus, slot, func, reg, data, bytes); 598 } 599 600 static int 601 acpi_pcib_acpi_route_interrupt(device_t pcib, device_t dev, int pin) 602 { 603 struct acpi_hpcib_softc *sc = device_get_softc(pcib); 604 605 return (acpi_pcib_route_interrupt(pcib, dev, pin, &sc->ap_prt)); 606 } 607 608 static int 609 acpi_pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, 610 int *irqs) 611 { 612 device_t bus; 613 614 bus = device_get_parent(pcib); 615 return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount, 616 irqs)); 617 } 618 619 static int 620 acpi_pcib_alloc_msix(device_t pcib, device_t dev, int *irq) 621 { 622 device_t bus; 623 624 bus = device_get_parent(pcib); 625 return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq)); 626 } 627 628 static int 629 acpi_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr, 630 uint32_t *data) 631 { 632 struct acpi_hpcib_softc *sc; 633 device_t bus, hostb; 634 int error; 635 636 bus = device_get_parent(pcib); 637 error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data); 638 if (error) 639 return (error); 640 641 sc = device_get_softc(pcib); 642 if (sc->ap_addr == -1) 643 return (0); 644 /* XXX: Assumes all bridges are on bus 0. */ 645 hostb = pci_find_dbsf(sc->ap_segment, 0, ACPI_ADR_PCI_SLOT(sc->ap_addr), 646 ACPI_ADR_PCI_FUNC(sc->ap_addr)); 647 if (hostb != NULL) 648 pci_ht_map_msi(hostb, *addr); 649 return (0); 650 } 651 652 struct resource * 653 acpi_pcib_acpi_alloc_resource(device_t dev, device_t child, int type, int *rid, 654 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 655 { 656 #ifdef NEW_PCIB 657 struct acpi_hpcib_softc *sc; 658 struct resource *res; 659 #endif 660 661 #if defined(__i386__) || defined(__amd64__) 662 start = hostb_alloc_start(type, start, end, count); 663 #endif 664 665 #ifdef NEW_PCIB 666 sc = device_get_softc(dev); 667 #ifdef PCI_RES_BUS 668 if (type == PCI_RES_BUS) 669 return (pci_domain_alloc_bus(sc->ap_segment, child, rid, start, end, 670 count, flags)); 671 #endif 672 res = pcib_host_res_alloc(&sc->ap_host_res, child, type, rid, start, end, 673 count, flags); 674 675 /* 676 * XXX: If this is a request for a specific range, assume it is 677 * correct and pass it up to the parent. What we probably want to 678 * do long-term is explicitly trust any firmware-configured 679 * resources during the initial bus scan on boot and then disable 680 * this after that. 681 */ 682 if (res == NULL && start + count - 1 == end) 683 res = bus_generic_alloc_resource(dev, child, type, rid, start, end, 684 count, flags); 685 return (res); 686 #else 687 return (bus_generic_alloc_resource(dev, child, type, rid, start, end, 688 count, flags)); 689 #endif 690 } 691 692 #ifdef NEW_PCIB 693 int 694 acpi_pcib_acpi_adjust_resource(device_t dev, device_t child, int type, 695 struct resource *r, rman_res_t start, rman_res_t end) 696 { 697 struct acpi_hpcib_softc *sc; 698 699 sc = device_get_softc(dev); 700 #ifdef PCI_RES_BUS 701 if (type == PCI_RES_BUS) 702 return (pci_domain_adjust_bus(sc->ap_segment, child, r, start, 703 end)); 704 #endif 705 return (pcib_host_res_adjust(&sc->ap_host_res, child, type, r, start, 706 end)); 707 } 708 709 #ifdef PCI_RES_BUS 710 int 711 acpi_pcib_acpi_release_resource(device_t dev, device_t child, int type, int rid, 712 struct resource *r) 713 { 714 struct acpi_hpcib_softc *sc; 715 716 sc = device_get_softc(dev); 717 if (type == PCI_RES_BUS) 718 return (pci_domain_release_bus(sc->ap_segment, child, rid, r)); 719 return (bus_generic_release_resource(dev, child, type, rid, r)); 720 } 721 #endif 722 #endif 723 724 static int 725 acpi_pcib_request_feature(device_t pcib, device_t dev, enum pci_feature feature) 726 { 727 uint32_t osc_ctl; 728 struct acpi_hpcib_softc *sc; 729 730 sc = device_get_softc(dev); 731 732 switch (feature) { 733 case PCI_FEATURE_HP: 734 osc_ctl = PCIM_OSC_CTL_PCIE_HP; 735 break; 736 case PCI_FEATURE_AER: 737 osc_ctl = PCIM_OSC_CTL_PCIE_AER; 738 break; 739 default: 740 return (EINVAL); 741 } 742 743 return (acpi_pcib_osc(sc, osc_ctl)); 744 } 745