1 /*- 2 * Copyright (c) 2000 Michael Smith 3 * Copyright (c) 2000 BSDi 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 #include "opt_acpi.h" 30 #include "opt_pci.h" 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/kernel.h> 35 #include <sys/limits.h> 36 #include <sys/malloc.h> 37 #include <sys/module.h> 38 #include <sys/rman.h> 39 #include <sys/sysctl.h> 40 41 #include <contrib/dev/acpica/include/acpi.h> 42 #include <contrib/dev/acpica/include/accommon.h> 43 44 #include <dev/acpica/acpivar.h> 45 46 #include <machine/pci_cfgreg.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcivar.h> 49 #include <dev/pci/pcib_private.h> 50 #include "pcib_if.h" 51 52 #include <dev/acpica/acpi_pcibvar.h> 53 54 /* Hooks for the ACPI CA debugging infrastructure. */ 55 #define _COMPONENT ACPI_BUS 56 ACPI_MODULE_NAME("PCI_ACPI") 57 58 struct acpi_hpcib_softc { 59 device_t ap_dev; 60 ACPI_HANDLE ap_handle; 61 bus_dma_tag_t ap_dma_tag; 62 int ap_flags; 63 uint32_t ap_osc_ctl; 64 65 int ap_segment; /* PCI domain */ 66 int ap_bus; /* bios-assigned bus number */ 67 int ap_addr; /* device/func of PCI-Host bridge */ 68 69 ACPI_BUFFER ap_prt; /* interrupt routing table */ 70 #ifdef NEW_PCIB 71 struct pcib_host_resources ap_host_res; 72 #endif 73 }; 74 75 static int acpi_pcib_acpi_probe(device_t bus); 76 static int acpi_pcib_acpi_attach(device_t bus); 77 static int acpi_pcib_read_ivar(device_t dev, device_t child, 78 int which, uintptr_t *result); 79 static int acpi_pcib_write_ivar(device_t dev, device_t child, 80 int which, uintptr_t value); 81 static uint32_t acpi_pcib_read_config(device_t dev, u_int bus, 82 u_int slot, u_int func, u_int reg, int bytes); 83 static void acpi_pcib_write_config(device_t dev, u_int bus, 84 u_int slot, u_int func, u_int reg, uint32_t data, 85 int bytes); 86 static int acpi_pcib_acpi_route_interrupt(device_t pcib, 87 device_t dev, int pin); 88 static int acpi_pcib_alloc_msi(device_t pcib, device_t dev, 89 int count, int maxcount, int *irqs); 90 static int acpi_pcib_map_msi(device_t pcib, device_t dev, 91 int irq, uint64_t *addr, uint32_t *data); 92 static int acpi_pcib_alloc_msix(device_t pcib, device_t dev, 93 int *irq); 94 static struct resource *acpi_pcib_acpi_alloc_resource(device_t dev, 95 device_t child, int type, int *rid, 96 rman_res_t start, rman_res_t end, rman_res_t count, 97 u_int flags); 98 #ifdef NEW_PCIB 99 static int acpi_pcib_acpi_adjust_resource(device_t dev, 100 device_t child, int type, struct resource *r, 101 rman_res_t start, rman_res_t end); 102 #ifdef PCI_RES_BUS 103 static int acpi_pcib_acpi_release_resource(device_t dev, 104 device_t child, int type, int rid, 105 struct resource *r); 106 static int acpi_pcib_acpi_activate_resource(device_t dev, 107 device_t child, int type, int rid, 108 struct resource *r); 109 static int acpi_pcib_acpi_deactivate_resource(device_t dev, 110 device_t child, int type, int rid, 111 struct resource *r); 112 #endif 113 #endif 114 static int acpi_pcib_request_feature(device_t pcib, device_t dev, 115 enum pci_feature feature); 116 static bus_dma_tag_t acpi_pcib_get_dma_tag(device_t bus, device_t child); 117 118 static device_method_t acpi_pcib_acpi_methods[] = { 119 /* Device interface */ 120 DEVMETHOD(device_probe, acpi_pcib_acpi_probe), 121 DEVMETHOD(device_attach, acpi_pcib_acpi_attach), 122 DEVMETHOD(device_shutdown, bus_generic_shutdown), 123 DEVMETHOD(device_suspend, bus_generic_suspend), 124 DEVMETHOD(device_resume, bus_generic_resume), 125 126 /* Bus interface */ 127 DEVMETHOD(bus_read_ivar, acpi_pcib_read_ivar), 128 DEVMETHOD(bus_write_ivar, acpi_pcib_write_ivar), 129 DEVMETHOD(bus_alloc_resource, acpi_pcib_acpi_alloc_resource), 130 #ifdef NEW_PCIB 131 DEVMETHOD(bus_adjust_resource, acpi_pcib_acpi_adjust_resource), 132 #else 133 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource), 134 #endif 135 #if defined(NEW_PCIB) && defined(PCI_RES_BUS) 136 DEVMETHOD(bus_release_resource, acpi_pcib_acpi_release_resource), 137 DEVMETHOD(bus_activate_resource, acpi_pcib_acpi_activate_resource), 138 DEVMETHOD(bus_deactivate_resource, acpi_pcib_acpi_deactivate_resource), 139 #else 140 DEVMETHOD(bus_release_resource, bus_generic_release_resource), 141 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 142 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 143 #endif 144 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 145 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 146 DEVMETHOD(bus_get_cpus, acpi_pcib_get_cpus), 147 DEVMETHOD(bus_get_dma_tag, acpi_pcib_get_dma_tag), 148 149 /* pcib interface */ 150 DEVMETHOD(pcib_maxslots, pcib_maxslots), 151 DEVMETHOD(pcib_read_config, acpi_pcib_read_config), 152 DEVMETHOD(pcib_write_config, acpi_pcib_write_config), 153 DEVMETHOD(pcib_route_interrupt, acpi_pcib_acpi_route_interrupt), 154 DEVMETHOD(pcib_alloc_msi, acpi_pcib_alloc_msi), 155 DEVMETHOD(pcib_release_msi, pcib_release_msi), 156 DEVMETHOD(pcib_alloc_msix, acpi_pcib_alloc_msix), 157 DEVMETHOD(pcib_release_msix, pcib_release_msix), 158 DEVMETHOD(pcib_map_msi, acpi_pcib_map_msi), 159 DEVMETHOD(pcib_power_for_sleep, acpi_pcib_power_for_sleep), 160 DEVMETHOD(pcib_request_feature, acpi_pcib_request_feature), 161 162 DEVMETHOD_END 163 }; 164 165 DEFINE_CLASS_0(pcib, acpi_pcib_acpi_driver, acpi_pcib_acpi_methods, 166 sizeof(struct acpi_hpcib_softc)); 167 DRIVER_MODULE(acpi_pcib, acpi, acpi_pcib_acpi_driver, 0, 0); 168 MODULE_DEPEND(acpi_pcib, acpi, 1, 1, 1); 169 170 static int 171 acpi_pcib_acpi_probe(device_t dev) 172 { 173 ACPI_DEVICE_INFO *devinfo; 174 ACPI_HANDLE h; 175 int root; 176 177 if (acpi_disabled("pcib") || (h = acpi_get_handle(dev)) == NULL || 178 ACPI_FAILURE(AcpiGetObjectInfo(h, &devinfo))) 179 return (ENXIO); 180 root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0; 181 AcpiOsFree(devinfo); 182 if (!root || pci_cfgregopen() == 0) 183 return (ENXIO); 184 185 device_set_desc(dev, "ACPI Host-PCI bridge"); 186 return (0); 187 } 188 189 #ifdef NEW_PCIB 190 static ACPI_STATUS 191 acpi_pcib_producer_handler(ACPI_RESOURCE *res, void *context) 192 { 193 struct acpi_hpcib_softc *sc; 194 UINT64 length, min, max; 195 u_int flags; 196 int error, type; 197 198 sc = context; 199 switch (res->Type) { 200 case ACPI_RESOURCE_TYPE_START_DEPENDENT: 201 case ACPI_RESOURCE_TYPE_END_DEPENDENT: 202 panic("host bridge has depenedent resources"); 203 case ACPI_RESOURCE_TYPE_ADDRESS16: 204 case ACPI_RESOURCE_TYPE_ADDRESS32: 205 case ACPI_RESOURCE_TYPE_ADDRESS64: 206 case ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64: 207 if (res->Data.Address.ProducerConsumer != ACPI_PRODUCER) 208 break; 209 switch (res->Type) { 210 case ACPI_RESOURCE_TYPE_ADDRESS16: 211 min = res->Data.Address16.Address.Minimum; 212 max = res->Data.Address16.Address.Maximum; 213 length = res->Data.Address16.Address.AddressLength; 214 break; 215 case ACPI_RESOURCE_TYPE_ADDRESS32: 216 min = res->Data.Address32.Address.Minimum; 217 max = res->Data.Address32.Address.Maximum; 218 length = res->Data.Address32.Address.AddressLength; 219 break; 220 case ACPI_RESOURCE_TYPE_ADDRESS64: 221 min = res->Data.Address64.Address.Minimum; 222 max = res->Data.Address64.Address.Maximum; 223 length = res->Data.Address64.Address.AddressLength; 224 break; 225 default: 226 KASSERT(res->Type == 227 ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64, 228 ("should never happen")); 229 min = res->Data.ExtAddress64.Address.Minimum; 230 max = res->Data.ExtAddress64.Address.Maximum; 231 length = res->Data.ExtAddress64.Address.AddressLength; 232 break; 233 } 234 if (length == 0) 235 break; 236 if (min + length - 1 != max && 237 (res->Data.Address.MinAddressFixed != ACPI_ADDRESS_FIXED || 238 res->Data.Address.MaxAddressFixed != ACPI_ADDRESS_FIXED)) 239 break; 240 flags = 0; 241 switch (res->Data.Address.ResourceType) { 242 case ACPI_MEMORY_RANGE: 243 type = SYS_RES_MEMORY; 244 if (res->Type != ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64) { 245 if (res->Data.Address.Info.Mem.Caching == 246 ACPI_PREFETCHABLE_MEMORY) 247 flags |= RF_PREFETCHABLE; 248 } else { 249 /* 250 * XXX: Parse prefetch flag out of 251 * TypeSpecific. 252 */ 253 } 254 break; 255 case ACPI_IO_RANGE: 256 type = SYS_RES_IOPORT; 257 break; 258 #ifdef PCI_RES_BUS 259 case ACPI_BUS_NUMBER_RANGE: 260 type = PCI_RES_BUS; 261 break; 262 #endif 263 default: 264 return (AE_OK); 265 } 266 267 if (min + length - 1 != max) 268 device_printf(sc->ap_dev, 269 "Length mismatch for %d range: %jx vs %jx\n", type, 270 (uintmax_t)(max - min + 1), (uintmax_t)length); 271 #ifdef __i386__ 272 if (min > ULONG_MAX) { 273 device_printf(sc->ap_dev, 274 "Ignoring %d range above 4GB (%#jx-%#jx)\n", 275 type, (uintmax_t)min, (uintmax_t)max); 276 break; 277 } 278 if (max > ULONG_MAX) { 279 device_printf(sc->ap_dev, 280 "Truncating end of %d range above 4GB (%#jx-%#jx)\n", 281 type, (uintmax_t)min, (uintmax_t)max); 282 max = ULONG_MAX; 283 } 284 #endif 285 error = pcib_host_res_decodes(&sc->ap_host_res, type, min, max, 286 flags); 287 if (error) 288 panic("Failed to manage %d range (%#jx-%#jx): %d", 289 type, (uintmax_t)min, (uintmax_t)max, error); 290 break; 291 default: 292 break; 293 } 294 return (AE_OK); 295 } 296 #endif 297 298 #if defined(NEW_PCIB) && defined(PCI_RES_BUS) 299 static bool 300 get_decoded_bus_range(struct acpi_hpcib_softc *sc, rman_res_t *startp, 301 rman_res_t *endp) 302 { 303 struct resource_list_entry *rle; 304 305 rle = resource_list_find(&sc->ap_host_res.hr_rl, PCI_RES_BUS, 0); 306 if (rle == NULL) 307 return (false); 308 *startp = rle->start; 309 *endp = rle->end; 310 return (true); 311 } 312 #endif 313 314 static int 315 acpi_pcib_osc(struct acpi_hpcib_softc *sc, uint32_t osc_ctl) 316 { 317 ACPI_STATUS status; 318 uint32_t cap_set[3]; 319 320 static uint8_t pci_host_bridge_uuid[ACPI_UUID_LENGTH] = { 321 0x5b, 0x4d, 0xdb, 0x33, 0xf7, 0x1f, 0x1c, 0x40, 322 0x96, 0x57, 0x74, 0x41, 0xc0, 0x3d, 0xd7, 0x66 323 }; 324 325 /* 326 * Don't invoke _OSC if a control is already granted. 327 * However, always invoke _OSC during attach when 0 is passed. 328 */ 329 if (osc_ctl != 0 && (sc->ap_osc_ctl & osc_ctl) == osc_ctl) 330 return (0); 331 332 /* Support Field: Extended PCI Config Space, PCI Segment Groups, MSI */ 333 cap_set[PCI_OSC_SUPPORT] = PCIM_OSC_SUPPORT_EXT_PCI_CONF | 334 PCIM_OSC_SUPPORT_SEG_GROUP | PCIM_OSC_SUPPORT_MSI; 335 /* Active State Power Management, Clock Power Management Capability */ 336 if (pci_enable_aspm) 337 cap_set[PCI_OSC_SUPPORT] |= PCIM_OSC_SUPPORT_ASPM | 338 PCIM_OSC_SUPPORT_CPMC; 339 340 /* Control Field */ 341 cap_set[PCI_OSC_CTL] = sc->ap_osc_ctl | osc_ctl; 342 343 status = acpi_EvaluateOSC(sc->ap_handle, pci_host_bridge_uuid, 1, 344 nitems(cap_set), cap_set, cap_set, false); 345 if (ACPI_FAILURE(status)) { 346 if (status == AE_NOT_FOUND) { 347 sc->ap_osc_ctl |= osc_ctl; 348 return (0); 349 } 350 device_printf(sc->ap_dev, "_OSC failed: %s\n", 351 AcpiFormatException(status)); 352 return (EIO); 353 } 354 355 /* 356 * _OSC may return an error in the status word, but will 357 * update the control mask always. _OSC should not revoke 358 * previously-granted controls. 359 */ 360 if ((cap_set[PCI_OSC_CTL] & sc->ap_osc_ctl) != sc->ap_osc_ctl) 361 device_printf(sc->ap_dev, "_OSC revoked %#x\n", 362 (cap_set[PCI_OSC_CTL] & sc->ap_osc_ctl) ^ sc->ap_osc_ctl); 363 sc->ap_osc_ctl = cap_set[PCI_OSC_CTL]; 364 if ((sc->ap_osc_ctl & osc_ctl) != osc_ctl) 365 return (EIO); 366 367 return (0); 368 } 369 370 static int 371 acpi_pcib_acpi_attach(device_t dev) 372 { 373 struct acpi_hpcib_softc *sc; 374 ACPI_STATUS status; 375 static int bus0_seen = 0; 376 u_int slot, func, busok; 377 #if defined(NEW_PCIB) && defined(PCI_RES_BUS) 378 struct resource *bus_res; 379 rman_res_t end, start; 380 int rid; 381 #endif 382 int error, domain; 383 uint8_t busno; 384 385 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 386 387 sc = device_get_softc(dev); 388 sc->ap_dev = dev; 389 sc->ap_handle = acpi_get_handle(dev); 390 391 /* 392 * Don't attach if we're not really there. 393 */ 394 if (!acpi_DeviceIsPresent(dev)) 395 return (ENXIO); 396 397 acpi_pcib_osc(sc, 0); 398 399 /* 400 * Get our segment number by evaluating _SEG. 401 * It's OK for this to not exist. 402 */ 403 status = acpi_GetInteger(sc->ap_handle, "_SEG", &sc->ap_segment); 404 if (ACPI_FAILURE(status)) { 405 if (status != AE_NOT_FOUND) { 406 device_printf(dev, "could not evaluate _SEG - %s\n", 407 AcpiFormatException(status)); 408 return_VALUE (ENXIO); 409 } 410 /* If it's not found, assume 0. */ 411 sc->ap_segment = 0; 412 } 413 414 /* 415 * Get the address (device and function) of the associated 416 * PCI-Host bridge device from _ADR. Assume we don't have one if 417 * it doesn't exist. 418 */ 419 status = acpi_GetInteger(sc->ap_handle, "_ADR", &sc->ap_addr); 420 if (ACPI_FAILURE(status)) { 421 if (status != AE_NOT_FOUND) 422 device_printf(dev, "could not evaluate _ADR - %s\n", 423 AcpiFormatException(status)); 424 sc->ap_addr = -1; 425 } 426 427 #ifdef NEW_PCIB 428 /* 429 * Determine which address ranges this bridge decodes and setup 430 * resource managers for those ranges. 431 */ 432 if (pcib_host_res_init(sc->ap_dev, &sc->ap_host_res) != 0) 433 panic("failed to init hostb resources"); 434 if (!acpi_disabled("hostres")) { 435 status = AcpiWalkResources(sc->ap_handle, "_CRS", 436 acpi_pcib_producer_handler, sc); 437 if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) 438 device_printf(sc->ap_dev, "failed to parse resources: %s\n", 439 AcpiFormatException(status)); 440 } 441 #endif 442 443 /* 444 * Get our base bus number by evaluating _BBN. 445 * If this doesn't work, we assume we're bus number 0. 446 * 447 * XXX note that it may also not exist in the case where we are 448 * meant to use a private configuration space mechanism for this bus, 449 * so we should dig out our resources and check to see if we have 450 * anything like that. How do we do this? 451 * XXX If we have the requisite information, and if we don't think the 452 * default PCI configuration space handlers can deal with this bus, 453 * we should attach our own handler. 454 * XXX invoke _REG on this for the PCI config space address space? 455 * XXX It seems many BIOS's with multiple Host-PCI bridges do not set 456 * _BBN correctly. They set _BBN to zero for all bridges. Thus, 457 * if _BBN is zero and PCI bus 0 already exists, we try to read our 458 * bus number from the configuration registers at address _ADR. 459 * We only do this for domain/segment 0 in the hopes that this is 460 * only needed for old single-domain machines. 461 */ 462 status = acpi_GetInteger(sc->ap_handle, "_BBN", &sc->ap_bus); 463 if (ACPI_FAILURE(status)) { 464 if (status != AE_NOT_FOUND) { 465 device_printf(dev, "could not evaluate _BBN - %s\n", 466 AcpiFormatException(status)); 467 return (ENXIO); 468 } else { 469 /* If it's not found, assume 0. */ 470 sc->ap_bus = 0; 471 } 472 } 473 474 /* 475 * If this is segment 0, the bus is zero, and PCI bus 0 already 476 * exists, read the bus number via PCI config space. 477 */ 478 busok = 1; 479 if (sc->ap_segment == 0 && sc->ap_bus == 0 && bus0_seen) { 480 busok = 0; 481 if (sc->ap_addr != -1) { 482 /* XXX: We assume bus 0. */ 483 slot = ACPI_ADR_PCI_SLOT(sc->ap_addr); 484 func = ACPI_ADR_PCI_FUNC(sc->ap_addr); 485 if (bootverbose) 486 device_printf(dev, "reading config registers from 0:%d:%d\n", 487 slot, func); 488 if (host_pcib_get_busno(pci_cfgregread, 0, slot, func, &busno) == 0) 489 device_printf(dev, "couldn't read bus number from cfg space\n"); 490 else { 491 sc->ap_bus = busno; 492 busok = 1; 493 } 494 } 495 } 496 497 #if defined(NEW_PCIB) && defined(PCI_RES_BUS) 498 /* 499 * If nothing else worked, hope that ACPI at least lays out the 500 * Host-PCI bridges in order and that as a result the next free 501 * bus number is our bus number. 502 */ 503 if (busok == 0) { 504 /* 505 * If we have a region of bus numbers, use the first 506 * number for our bus. 507 */ 508 if (get_decoded_bus_range(sc, &start, &end)) 509 sc->ap_bus = start; 510 else { 511 rid = 0; 512 bus_res = pci_domain_alloc_bus(sc->ap_segment, dev, &rid, 0, 513 PCI_BUSMAX, 1, 0); 514 if (bus_res == NULL) { 515 device_printf(dev, 516 "could not allocate bus number\n"); 517 pcib_host_res_free(dev, &sc->ap_host_res); 518 return (ENXIO); 519 } 520 sc->ap_bus = rman_get_start(bus_res); 521 pci_domain_release_bus(sc->ap_segment, dev, rid, bus_res); 522 } 523 } else { 524 /* 525 * If there is a decoded bus range, assume the bus number is 526 * the first value in the range. Warn if _BBN doesn't match. 527 */ 528 if (get_decoded_bus_range(sc, &start, &end)) { 529 if (sc->ap_bus != start) { 530 device_printf(dev, 531 "WARNING: BIOS configured bus number (%d) is " 532 "not within decoded bus number range " 533 "(%ju - %ju).\n", 534 sc->ap_bus, (uintmax_t)start, (uintmax_t)end); 535 device_printf(dev, 536 "Using range start (%ju) as bus number.\n", 537 (uintmax_t)start); 538 sc->ap_bus = start; 539 } 540 } 541 } 542 #else 543 /* 544 * If nothing else worked, hope that ACPI at least lays out the 545 * host-PCI bridges in order and that as a result our unit number 546 * is actually our bus number. There are several reasons this 547 * might not be true. 548 */ 549 if (busok == 0) { 550 sc->ap_bus = device_get_unit(dev); 551 device_printf(dev, "trying bus number %d\n", sc->ap_bus); 552 } 553 #endif 554 555 /* If this is bus 0 on segment 0, note that it has been seen already. */ 556 if (sc->ap_segment == 0 && sc->ap_bus == 0) 557 bus0_seen = 1; 558 559 acpi_pcib_fetch_prt(dev, &sc->ap_prt); 560 561 error = bus_dma_tag_create(bus_get_dma_tag(dev), 1, 562 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 563 NULL, NULL, BUS_SPACE_MAXSIZE, BUS_SPACE_UNRESTRICTED, 564 BUS_SPACE_MAXSIZE, 0, NULL, NULL, &sc->ap_dma_tag); 565 if (error != 0) 566 goto errout; 567 error = bus_get_domain(dev, &domain); 568 if (error == 0) 569 error = bus_dma_tag_set_domain(sc->ap_dma_tag, domain); 570 /* Don't fail to attach if the domain can't be queried or set. */ 571 error = 0; 572 573 bus_generic_probe(dev); 574 if (device_add_child(dev, "pci", -1) == NULL) { 575 bus_dma_tag_destroy(sc->ap_dma_tag); 576 sc->ap_dma_tag = NULL; 577 error = ENXIO; 578 goto errout; 579 } 580 return (bus_generic_attach(dev)); 581 582 errout: 583 device_printf(device_get_parent(dev), "couldn't attach pci bus\n"); 584 #if defined(NEW_PCIB) && defined(PCI_RES_BUS) 585 pcib_host_res_free(dev, &sc->ap_host_res); 586 #endif 587 return (error); 588 } 589 590 /* 591 * Support for standard PCI bridge ivars. 592 */ 593 static int 594 acpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 595 { 596 struct acpi_hpcib_softc *sc = device_get_softc(dev); 597 598 switch (which) { 599 case PCIB_IVAR_DOMAIN: 600 *result = sc->ap_segment; 601 return (0); 602 case PCIB_IVAR_BUS: 603 *result = sc->ap_bus; 604 return (0); 605 case ACPI_IVAR_HANDLE: 606 *result = (uintptr_t)sc->ap_handle; 607 return (0); 608 case ACPI_IVAR_FLAGS: 609 *result = (uintptr_t)sc->ap_flags; 610 return (0); 611 } 612 return (ENOENT); 613 } 614 615 static int 616 acpi_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 617 { 618 struct acpi_hpcib_softc *sc = device_get_softc(dev); 619 620 switch (which) { 621 case PCIB_IVAR_DOMAIN: 622 return (EINVAL); 623 case PCIB_IVAR_BUS: 624 sc->ap_bus = value; 625 return (0); 626 case ACPI_IVAR_HANDLE: 627 sc->ap_handle = (ACPI_HANDLE)value; 628 return (0); 629 case ACPI_IVAR_FLAGS: 630 sc->ap_flags = (int)value; 631 return (0); 632 } 633 return (ENOENT); 634 } 635 636 static uint32_t 637 acpi_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func, 638 u_int reg, int bytes) 639 { 640 struct acpi_hpcib_softc *sc = device_get_softc(dev); 641 642 return (pci_cfgregread(sc->ap_segment, bus, slot, func, reg, bytes)); 643 } 644 645 static void 646 acpi_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func, 647 u_int reg, uint32_t data, int bytes) 648 { 649 struct acpi_hpcib_softc *sc = device_get_softc(dev); 650 651 pci_cfgregwrite(sc->ap_segment, bus, slot, func, reg, data, bytes); 652 } 653 654 static int 655 acpi_pcib_acpi_route_interrupt(device_t pcib, device_t dev, int pin) 656 { 657 struct acpi_hpcib_softc *sc = device_get_softc(pcib); 658 659 return (acpi_pcib_route_interrupt(pcib, dev, pin, &sc->ap_prt)); 660 } 661 662 static int 663 acpi_pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, 664 int *irqs) 665 { 666 device_t bus; 667 668 bus = device_get_parent(pcib); 669 return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount, 670 irqs)); 671 } 672 673 static int 674 acpi_pcib_alloc_msix(device_t pcib, device_t dev, int *irq) 675 { 676 device_t bus; 677 678 bus = device_get_parent(pcib); 679 return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq)); 680 } 681 682 static int 683 acpi_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr, 684 uint32_t *data) 685 { 686 struct acpi_hpcib_softc *sc; 687 device_t bus, hostb; 688 int error; 689 690 bus = device_get_parent(pcib); 691 error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data); 692 if (error) 693 return (error); 694 695 sc = device_get_softc(pcib); 696 if (sc->ap_addr == -1) 697 return (0); 698 /* XXX: Assumes all bridges are on bus 0. */ 699 hostb = pci_find_dbsf(sc->ap_segment, 0, ACPI_ADR_PCI_SLOT(sc->ap_addr), 700 ACPI_ADR_PCI_FUNC(sc->ap_addr)); 701 if (hostb != NULL) 702 pci_ht_map_msi(hostb, *addr); 703 return (0); 704 } 705 706 struct resource * 707 acpi_pcib_acpi_alloc_resource(device_t dev, device_t child, int type, int *rid, 708 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 709 { 710 #ifdef NEW_PCIB 711 struct acpi_hpcib_softc *sc; 712 struct resource *res; 713 #endif 714 715 #if defined(__i386__) || defined(__amd64__) 716 start = hostb_alloc_start(type, start, end, count); 717 #endif 718 719 #ifdef NEW_PCIB 720 sc = device_get_softc(dev); 721 #ifdef PCI_RES_BUS 722 if (type == PCI_RES_BUS) 723 return (pci_domain_alloc_bus(sc->ap_segment, child, rid, start, end, 724 count, flags)); 725 #endif 726 res = pcib_host_res_alloc(&sc->ap_host_res, child, type, rid, start, end, 727 count, flags); 728 729 /* 730 * XXX: If this is a request for a specific range, assume it is 731 * correct and pass it up to the parent. What we probably want to 732 * do long-term is explicitly trust any firmware-configured 733 * resources during the initial bus scan on boot and then disable 734 * this after that. 735 */ 736 if (res == NULL && start + count - 1 == end) 737 res = bus_generic_alloc_resource(dev, child, type, rid, start, end, 738 count, flags); 739 return (res); 740 #else 741 return (bus_generic_alloc_resource(dev, child, type, rid, start, end, 742 count, flags)); 743 #endif 744 } 745 746 #ifdef NEW_PCIB 747 int 748 acpi_pcib_acpi_adjust_resource(device_t dev, device_t child, int type, 749 struct resource *r, rman_res_t start, rman_res_t end) 750 { 751 struct acpi_hpcib_softc *sc; 752 753 sc = device_get_softc(dev); 754 #ifdef PCI_RES_BUS 755 if (type == PCI_RES_BUS) 756 return (pci_domain_adjust_bus(sc->ap_segment, child, r, start, 757 end)); 758 #endif 759 return (pcib_host_res_adjust(&sc->ap_host_res, child, type, r, start, 760 end)); 761 } 762 763 #ifdef PCI_RES_BUS 764 int 765 acpi_pcib_acpi_release_resource(device_t dev, device_t child, int type, int rid, 766 struct resource *r) 767 { 768 struct acpi_hpcib_softc *sc; 769 770 sc = device_get_softc(dev); 771 if (type == PCI_RES_BUS) 772 return (pci_domain_release_bus(sc->ap_segment, child, rid, r)); 773 return (bus_generic_release_resource(dev, child, type, rid, r)); 774 } 775 776 int 777 acpi_pcib_acpi_activate_resource(device_t dev, device_t child, int type, int rid, 778 struct resource *r) 779 { 780 struct acpi_hpcib_softc *sc; 781 782 sc = device_get_softc(dev); 783 if (type == PCI_RES_BUS) 784 return (pci_domain_activate_bus(sc->ap_segment, child, rid, r)); 785 return (bus_generic_activate_resource(dev, child, type, rid, r)); 786 } 787 788 int 789 acpi_pcib_acpi_deactivate_resource(device_t dev, device_t child, int type, 790 int rid, struct resource *r) 791 { 792 struct acpi_hpcib_softc *sc; 793 794 sc = device_get_softc(dev); 795 if (type == PCI_RES_BUS) 796 return (pci_domain_deactivate_bus(sc->ap_segment, child, rid, 797 r)); 798 return (bus_generic_deactivate_resource(dev, child, type, rid, r)); 799 } 800 #endif 801 #endif 802 803 static int 804 acpi_pcib_request_feature(device_t pcib, device_t dev, enum pci_feature feature) 805 { 806 uint32_t osc_ctl; 807 struct acpi_hpcib_softc *sc; 808 809 sc = device_get_softc(pcib); 810 811 switch (feature) { 812 case PCI_FEATURE_HP: 813 osc_ctl = PCIM_OSC_CTL_PCIE_HP; 814 break; 815 case PCI_FEATURE_AER: 816 osc_ctl = PCIM_OSC_CTL_PCIE_AER; 817 break; 818 default: 819 return (EINVAL); 820 } 821 822 return (acpi_pcib_osc(sc, osc_ctl)); 823 } 824 825 static bus_dma_tag_t 826 acpi_pcib_get_dma_tag(device_t bus, device_t child) 827 { 828 struct acpi_hpcib_softc *sc; 829 830 sc = device_get_softc(bus); 831 832 return (sc->ap_dma_tag); 833 } 834