xref: /freebsd/sys/dev/acpica/acpi_pcib_acpi.c (revision 55620f43deef5c0eb5b4b0f675de18b30c8d1c2d)
1 /*-
2  * Copyright (c) 2000 Michael Smith
3  * Copyright (c) 2000 BSDi
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30 
31 #include "opt_acpi.h"
32 #include "opt_pci.h"
33 
34 #include <sys/param.h>
35 #include <sys/bus.h>
36 #include <sys/kernel.h>
37 #include <sys/limits.h>
38 #include <sys/malloc.h>
39 #include <sys/module.h>
40 #include <sys/rman.h>
41 #include <sys/sysctl.h>
42 
43 #include <contrib/dev/acpica/include/acpi.h>
44 #include <contrib/dev/acpica/include/accommon.h>
45 
46 #include <dev/acpica/acpivar.h>
47 
48 #include <machine/pci_cfgreg.h>
49 #include <dev/pci/pcireg.h>
50 #include <dev/pci/pcivar.h>
51 #include <dev/pci/pcib_private.h>
52 #include "pcib_if.h"
53 
54 #include <dev/acpica/acpi_pcibvar.h>
55 
56 /* Hooks for the ACPI CA debugging infrastructure. */
57 #define _COMPONENT	ACPI_BUS
58 ACPI_MODULE_NAME("PCI_ACPI")
59 
60 struct acpi_hpcib_softc {
61     device_t		ap_dev;
62     ACPI_HANDLE		ap_handle;
63     int			ap_flags;
64 
65     int			ap_segment;	/* PCI domain */
66     int			ap_bus;		/* bios-assigned bus number */
67     int			ap_addr;	/* device/func of PCI-Host bridge */
68 
69     ACPI_BUFFER		ap_prt;		/* interrupt routing table */
70 #ifdef NEW_PCIB
71     struct pcib_host_resources ap_host_res;
72 #endif
73 };
74 
75 static int		acpi_pcib_acpi_probe(device_t bus);
76 static int		acpi_pcib_acpi_attach(device_t bus);
77 static int		acpi_pcib_read_ivar(device_t dev, device_t child,
78 			    int which, uintptr_t *result);
79 static int		acpi_pcib_write_ivar(device_t dev, device_t child,
80 			    int which, uintptr_t value);
81 static uint32_t		acpi_pcib_read_config(device_t dev, u_int bus,
82 			    u_int slot, u_int func, u_int reg, int bytes);
83 static void		acpi_pcib_write_config(device_t dev, u_int bus,
84 			    u_int slot, u_int func, u_int reg, uint32_t data,
85 			    int bytes);
86 static int		acpi_pcib_acpi_route_interrupt(device_t pcib,
87 			    device_t dev, int pin);
88 static int		acpi_pcib_alloc_msi(device_t pcib, device_t dev,
89 			    int count, int maxcount, int *irqs);
90 static int		acpi_pcib_map_msi(device_t pcib, device_t dev,
91 			    int irq, uint64_t *addr, uint32_t *data);
92 static int		acpi_pcib_alloc_msix(device_t pcib, device_t dev,
93 			    int *irq);
94 static struct resource *acpi_pcib_acpi_alloc_resource(device_t dev,
95 			    device_t child, int type, int *rid,
96 			    rman_res_t start, rman_res_t end, rman_res_t count,
97 			    u_int flags);
98 #ifdef NEW_PCIB
99 static int		acpi_pcib_acpi_adjust_resource(device_t dev,
100 			    device_t child, int type, struct resource *r,
101 			    rman_res_t start, rman_res_t end);
102 #ifdef PCI_RES_BUS
103 static int		acpi_pcib_acpi_release_resource(device_t dev,
104 			    device_t child, int type, int rid,
105 			    struct resource *r);
106 #endif
107 #endif
108 
109 static device_method_t acpi_pcib_acpi_methods[] = {
110     /* Device interface */
111     DEVMETHOD(device_probe,		acpi_pcib_acpi_probe),
112     DEVMETHOD(device_attach,		acpi_pcib_acpi_attach),
113     DEVMETHOD(device_shutdown,		bus_generic_shutdown),
114     DEVMETHOD(device_suspend,		bus_generic_suspend),
115     DEVMETHOD(device_resume,		bus_generic_resume),
116 
117     /* Bus interface */
118     DEVMETHOD(bus_read_ivar,		acpi_pcib_read_ivar),
119     DEVMETHOD(bus_write_ivar,		acpi_pcib_write_ivar),
120     DEVMETHOD(bus_alloc_resource,	acpi_pcib_acpi_alloc_resource),
121 #ifdef NEW_PCIB
122     DEVMETHOD(bus_adjust_resource,	acpi_pcib_acpi_adjust_resource),
123 #else
124     DEVMETHOD(bus_adjust_resource,	bus_generic_adjust_resource),
125 #endif
126 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
127     DEVMETHOD(bus_release_resource,	acpi_pcib_acpi_release_resource),
128 #else
129     DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
130 #endif
131     DEVMETHOD(bus_activate_resource,	bus_generic_activate_resource),
132     DEVMETHOD(bus_deactivate_resource,	bus_generic_deactivate_resource),
133     DEVMETHOD(bus_setup_intr,		bus_generic_setup_intr),
134     DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
135     DEVMETHOD(bus_get_cpus,		acpi_pcib_get_cpus),
136 
137     /* pcib interface */
138     DEVMETHOD(pcib_maxslots,		pcib_maxslots),
139     DEVMETHOD(pcib_read_config,		acpi_pcib_read_config),
140     DEVMETHOD(pcib_write_config,	acpi_pcib_write_config),
141     DEVMETHOD(pcib_route_interrupt,	acpi_pcib_acpi_route_interrupt),
142     DEVMETHOD(pcib_alloc_msi,		acpi_pcib_alloc_msi),
143     DEVMETHOD(pcib_release_msi,		pcib_release_msi),
144     DEVMETHOD(pcib_alloc_msix,		acpi_pcib_alloc_msix),
145     DEVMETHOD(pcib_release_msix,	pcib_release_msix),
146     DEVMETHOD(pcib_map_msi,		acpi_pcib_map_msi),
147     DEVMETHOD(pcib_power_for_sleep,	acpi_pcib_power_for_sleep),
148 
149     DEVMETHOD_END
150 };
151 
152 static devclass_t pcib_devclass;
153 
154 DEFINE_CLASS_0(pcib, acpi_pcib_acpi_driver, acpi_pcib_acpi_methods,
155     sizeof(struct acpi_hpcib_softc));
156 DRIVER_MODULE(acpi_pcib, acpi, acpi_pcib_acpi_driver, pcib_devclass, 0, 0);
157 MODULE_DEPEND(acpi_pcib, acpi, 1, 1, 1);
158 
159 static int
160 acpi_pcib_acpi_probe(device_t dev)
161 {
162     ACPI_DEVICE_INFO	*devinfo;
163     ACPI_HANDLE		h;
164     int			root;
165 
166     if (acpi_disabled("pcib") || (h = acpi_get_handle(dev)) == NULL ||
167 	ACPI_FAILURE(AcpiGetObjectInfo(h, &devinfo)))
168 	return (ENXIO);
169     root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0;
170     AcpiOsFree(devinfo);
171     if (!root || pci_cfgregopen() == 0)
172 	return (ENXIO);
173 
174     device_set_desc(dev, "ACPI Host-PCI bridge");
175     return (0);
176 }
177 
178 #ifdef NEW_PCIB
179 static ACPI_STATUS
180 acpi_pcib_producer_handler(ACPI_RESOURCE *res, void *context)
181 {
182 	struct acpi_hpcib_softc *sc;
183 	UINT64 length, min, max;
184 	u_int flags;
185 	int error, type;
186 
187 	sc = context;
188 	switch (res->Type) {
189 	case ACPI_RESOURCE_TYPE_START_DEPENDENT:
190 	case ACPI_RESOURCE_TYPE_END_DEPENDENT:
191 		panic("host bridge has depenedent resources");
192 	case ACPI_RESOURCE_TYPE_ADDRESS16:
193 	case ACPI_RESOURCE_TYPE_ADDRESS32:
194 	case ACPI_RESOURCE_TYPE_ADDRESS64:
195 	case ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64:
196 		if (res->Data.Address.ProducerConsumer != ACPI_PRODUCER)
197 			break;
198 		switch (res->Type) {
199 		case ACPI_RESOURCE_TYPE_ADDRESS16:
200 			min = res->Data.Address16.Address.Minimum;
201 			max = res->Data.Address16.Address.Maximum;
202 			length = res->Data.Address16.Address.AddressLength;
203 			break;
204 		case ACPI_RESOURCE_TYPE_ADDRESS32:
205 			min = res->Data.Address32.Address.Minimum;
206 			max = res->Data.Address32.Address.Maximum;
207 			length = res->Data.Address32.Address.AddressLength;
208 			break;
209 		case ACPI_RESOURCE_TYPE_ADDRESS64:
210 			min = res->Data.Address64.Address.Minimum;
211 			max = res->Data.Address64.Address.Maximum;
212 			length = res->Data.Address64.Address.AddressLength;
213 			break;
214 		default:
215 			KASSERT(res->Type ==
216 			    ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64,
217 			    ("should never happen"));
218 			min = res->Data.ExtAddress64.Address.Minimum;
219 			max = res->Data.ExtAddress64.Address.Maximum;
220 			length = res->Data.ExtAddress64.Address.AddressLength;
221 			break;
222 		}
223 		if (length == 0)
224 			break;
225 		if (min + length - 1 != max &&
226 		    (res->Data.Address.MinAddressFixed != ACPI_ADDRESS_FIXED ||
227 		    res->Data.Address.MaxAddressFixed != ACPI_ADDRESS_FIXED))
228 			break;
229 		flags = 0;
230 		switch (res->Data.Address.ResourceType) {
231 		case ACPI_MEMORY_RANGE:
232 			type = SYS_RES_MEMORY;
233 			if (res->Type != ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64) {
234 				if (res->Data.Address.Info.Mem.Caching ==
235 				    ACPI_PREFETCHABLE_MEMORY)
236 					flags |= RF_PREFETCHABLE;
237 			} else {
238 				/*
239 				 * XXX: Parse prefetch flag out of
240 				 * TypeSpecific.
241 				 */
242 			}
243 			break;
244 		case ACPI_IO_RANGE:
245 			type = SYS_RES_IOPORT;
246 			break;
247 #ifdef PCI_RES_BUS
248 		case ACPI_BUS_NUMBER_RANGE:
249 			type = PCI_RES_BUS;
250 			break;
251 #endif
252 		default:
253 			return (AE_OK);
254 		}
255 
256 		if (min + length - 1 != max)
257 			device_printf(sc->ap_dev,
258 			    "Length mismatch for %d range: %jx vs %jx\n", type,
259 			    (uintmax_t)(max - min + 1), (uintmax_t)length);
260 #ifdef __i386__
261 		if (min > ULONG_MAX) {
262 			device_printf(sc->ap_dev,
263 			    "Ignoring %d range above 4GB (%#jx-%#jx)\n",
264 			    type, (uintmax_t)min, (uintmax_t)max);
265 			break;
266 		}
267 		if (max > ULONG_MAX) {
268 			device_printf(sc->ap_dev,
269        		    "Truncating end of %d range above 4GB (%#jx-%#jx)\n",
270 			    type, (uintmax_t)min, (uintmax_t)max);
271 			max = ULONG_MAX;
272 		}
273 #endif
274 		error = pcib_host_res_decodes(&sc->ap_host_res, type, min, max,
275 		    flags);
276 		if (error)
277 			panic("Failed to manage %d range (%#jx-%#jx): %d",
278 			    type, (uintmax_t)min, (uintmax_t)max, error);
279 		break;
280 	default:
281 		break;
282 	}
283 	return (AE_OK);
284 }
285 #endif
286 
287 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
288 static int
289 first_decoded_bus(struct acpi_hpcib_softc *sc, rman_res_t *startp)
290 {
291 	struct resource_list_entry *rle;
292 
293 	rle = resource_list_find(&sc->ap_host_res.hr_rl, PCI_RES_BUS, 0);
294 	if (rle == NULL)
295 		return (ENXIO);
296 	*startp = rle->start;
297 	return (0);
298 }
299 #endif
300 
301 static void
302 acpi_pcib_osc(struct acpi_hpcib_softc *sc)
303 {
304 	ACPI_STATUS status;
305 	uint32_t cap_set[3];
306 
307 	static uint8_t pci_host_bridge_uuid[ACPI_UUID_LENGTH] = {
308 		0x5b, 0x4d, 0xdb, 0x33, 0xf7, 0x1f, 0x1c, 0x40,
309 		0x96, 0x57, 0x74, 0x41, 0xc0, 0x3d, 0xd7, 0x66
310 	};
311 
312 	/* Support Field: Extended PCI Config Space, MSI */
313 	cap_set[1] = 0x11;
314 
315 	/* Control Field */
316 	cap_set[2] = 0;
317 
318 #ifdef PCI_HP
319 	/* Control Field: PCI Express Native Hot Plug */
320 	cap_set[2] |= 0x1;
321 #endif
322 
323 	status = acpi_EvaluateOSC(sc->ap_handle, pci_host_bridge_uuid, 1,
324 	    nitems(cap_set), cap_set, cap_set, false);
325 	if (ACPI_FAILURE(status)) {
326 		if (status == AE_NOT_FOUND)
327 			return;
328 		device_printf(sc->ap_dev, "_OSC failed: %s\n",
329 		    AcpiFormatException(status));
330 		return;
331 	}
332 
333 	if (cap_set[0] != 0) {
334 		device_printf(sc->ap_dev, "_OSC returned error %#x\n",
335 		    cap_set[0]);
336 	}
337 }
338 
339 static int
340 acpi_pcib_acpi_attach(device_t dev)
341 {
342     struct acpi_hpcib_softc	*sc;
343     ACPI_STATUS			status;
344     static int bus0_seen = 0;
345     u_int slot, func, busok;
346 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
347     struct resource *bus_res;
348     rman_res_t start;
349     int rid;
350 #endif
351     uint8_t busno;
352 
353     ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
354 
355     sc = device_get_softc(dev);
356     sc->ap_dev = dev;
357     sc->ap_handle = acpi_get_handle(dev);
358 
359     /*
360      * Don't attach if we're not really there.
361      */
362     if (!acpi_DeviceIsPresent(dev))
363 	return (ENXIO);
364 
365     acpi_pcib_osc(sc);
366 
367     /*
368      * Get our segment number by evaluating _SEG.
369      * It's OK for this to not exist.
370      */
371     status = acpi_GetInteger(sc->ap_handle, "_SEG", &sc->ap_segment);
372     if (ACPI_FAILURE(status)) {
373 	if (status != AE_NOT_FOUND) {
374 	    device_printf(dev, "could not evaluate _SEG - %s\n",
375 		AcpiFormatException(status));
376 	    return_VALUE (ENXIO);
377 	}
378 	/* If it's not found, assume 0. */
379 	sc->ap_segment = 0;
380     }
381 
382     /*
383      * Get the address (device and function) of the associated
384      * PCI-Host bridge device from _ADR.  Assume we don't have one if
385      * it doesn't exist.
386      */
387     status = acpi_GetInteger(sc->ap_handle, "_ADR", &sc->ap_addr);
388     if (ACPI_FAILURE(status)) {
389 	device_printf(dev, "could not evaluate _ADR - %s\n",
390 	    AcpiFormatException(status));
391 	sc->ap_addr = -1;
392     }
393 
394 #ifdef NEW_PCIB
395     /*
396      * Determine which address ranges this bridge decodes and setup
397      * resource managers for those ranges.
398      */
399     if (pcib_host_res_init(sc->ap_dev, &sc->ap_host_res) != 0)
400 	    panic("failed to init hostb resources");
401     if (!acpi_disabled("hostres")) {
402 	status = AcpiWalkResources(sc->ap_handle, "_CRS",
403 	    acpi_pcib_producer_handler, sc);
404 	if (ACPI_FAILURE(status) && status != AE_NOT_FOUND)
405 	    device_printf(sc->ap_dev, "failed to parse resources: %s\n",
406 		AcpiFormatException(status));
407     }
408 #endif
409 
410     /*
411      * Get our base bus number by evaluating _BBN.
412      * If this doesn't work, we assume we're bus number 0.
413      *
414      * XXX note that it may also not exist in the case where we are
415      *     meant to use a private configuration space mechanism for this bus,
416      *     so we should dig out our resources and check to see if we have
417      *     anything like that.  How do we do this?
418      * XXX If we have the requisite information, and if we don't think the
419      *     default PCI configuration space handlers can deal with this bus,
420      *     we should attach our own handler.
421      * XXX invoke _REG on this for the PCI config space address space?
422      * XXX It seems many BIOS's with multiple Host-PCI bridges do not set
423      *     _BBN correctly.  They set _BBN to zero for all bridges.  Thus,
424      *     if _BBN is zero and PCI bus 0 already exists, we try to read our
425      *     bus number from the configuration registers at address _ADR.
426      *     We only do this for domain/segment 0 in the hopes that this is
427      *     only needed for old single-domain machines.
428      */
429     status = acpi_GetInteger(sc->ap_handle, "_BBN", &sc->ap_bus);
430     if (ACPI_FAILURE(status)) {
431 	if (status != AE_NOT_FOUND) {
432 	    device_printf(dev, "could not evaluate _BBN - %s\n",
433 		AcpiFormatException(status));
434 	    return (ENXIO);
435 	} else {
436 	    /* If it's not found, assume 0. */
437 	    sc->ap_bus = 0;
438 	}
439     }
440 
441     /*
442      * If this is segment 0, the bus is zero, and PCI bus 0 already
443      * exists, read the bus number via PCI config space.
444      */
445     busok = 1;
446     if (sc->ap_segment == 0 && sc->ap_bus == 0 && bus0_seen) {
447 	busok = 0;
448 	if (sc->ap_addr != -1) {
449 	    /* XXX: We assume bus 0. */
450 	    slot = ACPI_ADR_PCI_SLOT(sc->ap_addr);
451 	    func = ACPI_ADR_PCI_FUNC(sc->ap_addr);
452 	    if (bootverbose)
453 		device_printf(dev, "reading config registers from 0:%d:%d\n",
454 		    slot, func);
455 	    if (host_pcib_get_busno(pci_cfgregread, 0, slot, func, &busno) == 0)
456 		device_printf(dev, "couldn't read bus number from cfg space\n");
457 	    else {
458 		sc->ap_bus = busno;
459 		busok = 1;
460 	    }
461 	}
462     }
463 
464 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
465     /*
466      * If nothing else worked, hope that ACPI at least lays out the
467      * Host-PCI bridges in order and that as a result the next free
468      * bus number is our bus number.
469      */
470     if (busok == 0) {
471 	    /*
472 	     * If we have a region of bus numbers, use the first
473 	     * number for our bus.
474 	     */
475 	    if (first_decoded_bus(sc, &start) == 0)
476 		    sc->ap_bus = start;
477 	    else {
478 		    rid = 0;
479 		    bus_res = pci_domain_alloc_bus(sc->ap_segment, dev, &rid, 0,
480 			PCI_BUSMAX, 1, 0);
481 		    if (bus_res == NULL) {
482 			    device_printf(dev,
483 				"could not allocate bus number\n");
484 			    pcib_host_res_free(dev, &sc->ap_host_res);
485 			    return (ENXIO);
486 		    }
487 		    sc->ap_bus = rman_get_start(bus_res);
488 		    pci_domain_release_bus(sc->ap_segment, dev, rid, bus_res);
489 	    }
490     } else {
491 #ifdef INVARIANTS
492 	    if (first_decoded_bus(sc, &start) == 0)
493 		    KASSERT(start == sc->ap_bus, ("bus number mismatch"));
494 #endif
495     }
496 #else
497     /*
498      * If nothing else worked, hope that ACPI at least lays out the
499      * host-PCI bridges in order and that as a result our unit number
500      * is actually our bus number.  There are several reasons this
501      * might not be true.
502      */
503     if (busok == 0) {
504 	sc->ap_bus = device_get_unit(dev);
505 	device_printf(dev, "trying bus number %d\n", sc->ap_bus);
506     }
507 #endif
508 
509     /* If this is bus 0 on segment 0, note that it has been seen already. */
510     if (sc->ap_segment == 0 && sc->ap_bus == 0)
511 	    bus0_seen = 1;
512 
513     acpi_pcib_fetch_prt(dev, &sc->ap_prt);
514 
515     if (device_add_child(dev, "pci", -1) == NULL) {
516 	device_printf(device_get_parent(dev), "couldn't attach pci bus\n");
517 	return (ENXIO);
518     }
519     return (bus_generic_attach(dev));
520 }
521 
522 /*
523  * Support for standard PCI bridge ivars.
524  */
525 static int
526 acpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
527 {
528     struct acpi_hpcib_softc	*sc = device_get_softc(dev);
529 
530     switch (which) {
531     case PCIB_IVAR_DOMAIN:
532 	*result = sc->ap_segment;
533 	return (0);
534     case PCIB_IVAR_BUS:
535 	*result = sc->ap_bus;
536 	return (0);
537     case ACPI_IVAR_HANDLE:
538 	*result = (uintptr_t)sc->ap_handle;
539 	return (0);
540     case ACPI_IVAR_FLAGS:
541 	*result = (uintptr_t)sc->ap_flags;
542 	return (0);
543     }
544     return (ENOENT);
545 }
546 
547 static int
548 acpi_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
549 {
550     struct acpi_hpcib_softc	*sc = device_get_softc(dev);
551 
552     switch (which) {
553     case PCIB_IVAR_DOMAIN:
554 	return (EINVAL);
555     case PCIB_IVAR_BUS:
556 	sc->ap_bus = value;
557 	return (0);
558     case ACPI_IVAR_HANDLE:
559 	sc->ap_handle = (ACPI_HANDLE)value;
560 	return (0);
561     case ACPI_IVAR_FLAGS:
562 	sc->ap_flags = (int)value;
563 	return (0);
564     }
565     return (ENOENT);
566 }
567 
568 static uint32_t
569 acpi_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func,
570     u_int reg, int bytes)
571 {
572     return (pci_cfgregread(bus, slot, func, reg, bytes));
573 }
574 
575 static void
576 acpi_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func,
577     u_int reg, uint32_t data, int bytes)
578 {
579     pci_cfgregwrite(bus, slot, func, reg, data, bytes);
580 }
581 
582 static int
583 acpi_pcib_acpi_route_interrupt(device_t pcib, device_t dev, int pin)
584 {
585     struct acpi_hpcib_softc *sc = device_get_softc(pcib);
586 
587     return (acpi_pcib_route_interrupt(pcib, dev, pin, &sc->ap_prt));
588 }
589 
590 static int
591 acpi_pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount,
592     int *irqs)
593 {
594 	device_t bus;
595 
596 	bus = device_get_parent(pcib);
597 	return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
598 	    irqs));
599 }
600 
601 static int
602 acpi_pcib_alloc_msix(device_t pcib, device_t dev, int *irq)
603 {
604 	device_t bus;
605 
606 	bus = device_get_parent(pcib);
607 	return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
608 }
609 
610 static int
611 acpi_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
612     uint32_t *data)
613 {
614 	struct acpi_hpcib_softc *sc;
615 	device_t bus, hostb;
616 	int error;
617 
618 	bus = device_get_parent(pcib);
619 	error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data);
620 	if (error)
621 		return (error);
622 
623 	sc = device_get_softc(pcib);
624 	if (sc->ap_addr == -1)
625 		return (0);
626 	/* XXX: Assumes all bridges are on bus 0. */
627 	hostb = pci_find_dbsf(sc->ap_segment, 0, ACPI_ADR_PCI_SLOT(sc->ap_addr),
628 	    ACPI_ADR_PCI_FUNC(sc->ap_addr));
629 	if (hostb != NULL)
630 		pci_ht_map_msi(hostb, *addr);
631 	return (0);
632 }
633 
634 struct resource *
635 acpi_pcib_acpi_alloc_resource(device_t dev, device_t child, int type, int *rid,
636     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
637 {
638 #ifdef NEW_PCIB
639     struct acpi_hpcib_softc *sc;
640     struct resource *res;
641 #endif
642 
643 #if defined(__i386__) || defined(__amd64__)
644     start = hostb_alloc_start(type, start, end, count);
645 #endif
646 
647 #ifdef NEW_PCIB
648     sc = device_get_softc(dev);
649 #ifdef PCI_RES_BUS
650     if (type == PCI_RES_BUS)
651 	return (pci_domain_alloc_bus(sc->ap_segment, child, rid, start, end,
652 	    count, flags));
653 #endif
654     res = pcib_host_res_alloc(&sc->ap_host_res, child, type, rid, start, end,
655 	count, flags);
656 
657     /*
658      * XXX: If this is a request for a specific range, assume it is
659      * correct and pass it up to the parent.  What we probably want to
660      * do long-term is explicitly trust any firmware-configured
661      * resources during the initial bus scan on boot and then disable
662      * this after that.
663      */
664     if (res == NULL && start + count - 1 == end)
665 	res = bus_generic_alloc_resource(dev, child, type, rid, start, end,
666 	    count, flags);
667     return (res);
668 #else
669     return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
670 	count, flags));
671 #endif
672 }
673 
674 #ifdef NEW_PCIB
675 int
676 acpi_pcib_acpi_adjust_resource(device_t dev, device_t child, int type,
677     struct resource *r, rman_res_t start, rman_res_t end)
678 {
679 	struct acpi_hpcib_softc *sc;
680 
681 	sc = device_get_softc(dev);
682 #ifdef PCI_RES_BUS
683 	if (type == PCI_RES_BUS)
684 		return (pci_domain_adjust_bus(sc->ap_segment, child, r, start,
685 		    end));
686 #endif
687 	return (pcib_host_res_adjust(&sc->ap_host_res, child, type, r, start,
688 	    end));
689 }
690 
691 #ifdef PCI_RES_BUS
692 int
693 acpi_pcib_acpi_release_resource(device_t dev, device_t child, int type, int rid,
694     struct resource *r)
695 {
696 	struct acpi_hpcib_softc *sc;
697 
698 	sc = device_get_softc(dev);
699 	if (type == PCI_RES_BUS)
700 		return (pci_domain_release_bus(sc->ap_segment, child, rid, r));
701 	return (bus_generic_release_resource(dev, child, type, rid, r));
702 }
703 #endif
704 #endif
705