xref: /freebsd/sys/dev/acpica/acpi_pcib_acpi.c (revision 1c4ee7dfb8affed302171232b0f612e6bcba3c10)
1 /*-
2  * Copyright (c) 2000 Michael Smith
3  * Copyright (c) 2000 BSDi
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 #include "opt_acpi.h"
30 #include "opt_pci.h"
31 
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/kernel.h>
35 #include <sys/limits.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
38 #include <sys/rman.h>
39 #include <sys/sysctl.h>
40 
41 #include <contrib/dev/acpica/include/acpi.h>
42 #include <contrib/dev/acpica/include/accommon.h>
43 
44 #include <dev/acpica/acpivar.h>
45 
46 #include <machine/pci_cfgreg.h>
47 #include <dev/pci/pcireg.h>
48 #include <dev/pci/pcivar.h>
49 #include <dev/pci/pcib_private.h>
50 #include "pcib_if.h"
51 
52 #include <dev/acpica/acpi_pcibvar.h>
53 
54 /* Hooks for the ACPI CA debugging infrastructure. */
55 #define _COMPONENT	ACPI_BUS
56 ACPI_MODULE_NAME("PCI_ACPI")
57 
58 struct acpi_hpcib_softc {
59     device_t		ap_dev;
60     ACPI_HANDLE		ap_handle;
61     bus_dma_tag_t	ap_dma_tag;
62     int			ap_flags;
63     uint32_t		ap_osc_ctl;
64 
65     int			ap_segment;	/* PCI domain */
66     int			ap_bus;		/* bios-assigned bus number */
67     int			ap_addr;	/* device/func of PCI-Host bridge */
68 
69     ACPI_BUFFER		ap_prt;		/* interrupt routing table */
70 #ifdef NEW_PCIB
71     struct pcib_host_resources ap_host_res;
72 #endif
73 };
74 
75 static int		acpi_pcib_acpi_probe(device_t bus);
76 static int		acpi_pcib_acpi_attach(device_t bus);
77 static int		acpi_pcib_read_ivar(device_t dev, device_t child,
78 			    int which, uintptr_t *result);
79 static int		acpi_pcib_write_ivar(device_t dev, device_t child,
80 			    int which, uintptr_t value);
81 static uint32_t		acpi_pcib_read_config(device_t dev, u_int bus,
82 			    u_int slot, u_int func, u_int reg, int bytes);
83 static void		acpi_pcib_write_config(device_t dev, u_int bus,
84 			    u_int slot, u_int func, u_int reg, uint32_t data,
85 			    int bytes);
86 static int		acpi_pcib_acpi_route_interrupt(device_t pcib,
87 			    device_t dev, int pin);
88 static int		acpi_pcib_alloc_msi(device_t pcib, device_t dev,
89 			    int count, int maxcount, int *irqs);
90 static int		acpi_pcib_map_msi(device_t pcib, device_t dev,
91 			    int irq, uint64_t *addr, uint32_t *data);
92 static int		acpi_pcib_alloc_msix(device_t pcib, device_t dev,
93 			    int *irq);
94 static struct resource *acpi_pcib_acpi_alloc_resource(device_t dev,
95 			    device_t child, int type, int *rid,
96 			    rman_res_t start, rman_res_t end, rman_res_t count,
97 			    u_int flags);
98 #ifdef NEW_PCIB
99 static int		acpi_pcib_acpi_adjust_resource(device_t dev,
100 			    device_t child, struct resource *r,
101 			    rman_res_t start, rman_res_t end);
102 #ifdef PCI_RES_BUS
103 static int		acpi_pcib_acpi_release_resource(device_t dev,
104 			    device_t child, struct resource *r);
105 static int		acpi_pcib_acpi_activate_resource(device_t dev,
106 			    device_t child, struct resource *r);
107 static int		acpi_pcib_acpi_deactivate_resource(device_t dev,
108 			    device_t child, struct resource *r);
109 #endif
110 #endif
111 static int		acpi_pcib_request_feature(device_t pcib, device_t dev,
112 			    enum pci_feature feature);
113 static bus_dma_tag_t	acpi_pcib_get_dma_tag(device_t bus, device_t child);
114 
115 static device_method_t acpi_pcib_acpi_methods[] = {
116     /* Device interface */
117     DEVMETHOD(device_probe,		acpi_pcib_acpi_probe),
118     DEVMETHOD(device_attach,		acpi_pcib_acpi_attach),
119     DEVMETHOD(device_shutdown,		bus_generic_shutdown),
120     DEVMETHOD(device_suspend,		bus_generic_suspend),
121     DEVMETHOD(device_resume,		bus_generic_resume),
122 
123     /* Bus interface */
124     DEVMETHOD(bus_read_ivar,		acpi_pcib_read_ivar),
125     DEVMETHOD(bus_write_ivar,		acpi_pcib_write_ivar),
126     DEVMETHOD(bus_alloc_resource,	acpi_pcib_acpi_alloc_resource),
127 #ifdef NEW_PCIB
128     DEVMETHOD(bus_adjust_resource,	acpi_pcib_acpi_adjust_resource),
129 #else
130     DEVMETHOD(bus_adjust_resource,	bus_generic_adjust_resource),
131 #endif
132 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
133     DEVMETHOD(bus_release_resource,	acpi_pcib_acpi_release_resource),
134     DEVMETHOD(bus_activate_resource,	acpi_pcib_acpi_activate_resource),
135     DEVMETHOD(bus_deactivate_resource,	acpi_pcib_acpi_deactivate_resource),
136 #else
137     DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
138     DEVMETHOD(bus_activate_resource,	bus_generic_activate_resource),
139     DEVMETHOD(bus_deactivate_resource,	bus_generic_deactivate_resource),
140 #endif
141     DEVMETHOD(bus_setup_intr,		bus_generic_setup_intr),
142     DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
143     DEVMETHOD(bus_get_cpus,		acpi_pcib_get_cpus),
144     DEVMETHOD(bus_get_dma_tag,		acpi_pcib_get_dma_tag),
145 
146     /* pcib interface */
147     DEVMETHOD(pcib_maxslots,		pcib_maxslots),
148     DEVMETHOD(pcib_read_config,		acpi_pcib_read_config),
149     DEVMETHOD(pcib_write_config,	acpi_pcib_write_config),
150     DEVMETHOD(pcib_route_interrupt,	acpi_pcib_acpi_route_interrupt),
151     DEVMETHOD(pcib_alloc_msi,		acpi_pcib_alloc_msi),
152     DEVMETHOD(pcib_release_msi,		pcib_release_msi),
153     DEVMETHOD(pcib_alloc_msix,		acpi_pcib_alloc_msix),
154     DEVMETHOD(pcib_release_msix,	pcib_release_msix),
155     DEVMETHOD(pcib_map_msi,		acpi_pcib_map_msi),
156     DEVMETHOD(pcib_power_for_sleep,	acpi_pcib_power_for_sleep),
157     DEVMETHOD(pcib_request_feature,	acpi_pcib_request_feature),
158 
159     DEVMETHOD_END
160 };
161 
162 DEFINE_CLASS_0(pcib, acpi_pcib_acpi_driver, acpi_pcib_acpi_methods,
163     sizeof(struct acpi_hpcib_softc));
164 DRIVER_MODULE(acpi_pcib, acpi, acpi_pcib_acpi_driver, 0, 0);
165 MODULE_DEPEND(acpi_pcib, acpi, 1, 1, 1);
166 
167 static int
168 acpi_pcib_acpi_probe(device_t dev)
169 {
170     ACPI_DEVICE_INFO	*devinfo;
171     ACPI_HANDLE		h;
172     int			root;
173 
174     if (acpi_disabled("pcib") || (h = acpi_get_handle(dev)) == NULL ||
175 	ACPI_FAILURE(AcpiGetObjectInfo(h, &devinfo)))
176 	return (ENXIO);
177     root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0;
178     AcpiOsFree(devinfo);
179     if (!root || pci_cfgregopen() == 0)
180 	return (ENXIO);
181 
182     device_set_desc(dev, "ACPI Host-PCI bridge");
183     return (0);
184 }
185 
186 #ifdef NEW_PCIB
187 static ACPI_STATUS
188 acpi_pcib_producer_handler(ACPI_RESOURCE *res, void *context)
189 {
190 	struct acpi_hpcib_softc *sc;
191 	UINT64 length, min, max;
192 	u_int flags;
193 	int error, type;
194 
195 	sc = context;
196 	switch (res->Type) {
197 	case ACPI_RESOURCE_TYPE_START_DEPENDENT:
198 	case ACPI_RESOURCE_TYPE_END_DEPENDENT:
199 		panic("host bridge has depenedent resources");
200 	case ACPI_RESOURCE_TYPE_ADDRESS16:
201 	case ACPI_RESOURCE_TYPE_ADDRESS32:
202 	case ACPI_RESOURCE_TYPE_ADDRESS64:
203 	case ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64:
204 		if (res->Data.Address.ProducerConsumer != ACPI_PRODUCER)
205 			break;
206 		switch (res->Type) {
207 		case ACPI_RESOURCE_TYPE_ADDRESS16:
208 			min = res->Data.Address16.Address.Minimum;
209 			max = res->Data.Address16.Address.Maximum;
210 			length = res->Data.Address16.Address.AddressLength;
211 			break;
212 		case ACPI_RESOURCE_TYPE_ADDRESS32:
213 			min = res->Data.Address32.Address.Minimum;
214 			max = res->Data.Address32.Address.Maximum;
215 			length = res->Data.Address32.Address.AddressLength;
216 			break;
217 		case ACPI_RESOURCE_TYPE_ADDRESS64:
218 			min = res->Data.Address64.Address.Minimum;
219 			max = res->Data.Address64.Address.Maximum;
220 			length = res->Data.Address64.Address.AddressLength;
221 			break;
222 		default:
223 			KASSERT(res->Type ==
224 			    ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64,
225 			    ("should never happen"));
226 			min = res->Data.ExtAddress64.Address.Minimum;
227 			max = res->Data.ExtAddress64.Address.Maximum;
228 			length = res->Data.ExtAddress64.Address.AddressLength;
229 			break;
230 		}
231 		if (length == 0)
232 			break;
233 		if (min + length - 1 != max &&
234 		    (res->Data.Address.MinAddressFixed != ACPI_ADDRESS_FIXED ||
235 		    res->Data.Address.MaxAddressFixed != ACPI_ADDRESS_FIXED))
236 			break;
237 		flags = 0;
238 		switch (res->Data.Address.ResourceType) {
239 		case ACPI_MEMORY_RANGE:
240 			type = SYS_RES_MEMORY;
241 			if (res->Type != ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64) {
242 				if (res->Data.Address.Info.Mem.Caching ==
243 				    ACPI_PREFETCHABLE_MEMORY)
244 					flags |= RF_PREFETCHABLE;
245 			} else {
246 				/*
247 				 * XXX: Parse prefetch flag out of
248 				 * TypeSpecific.
249 				 */
250 			}
251 			break;
252 		case ACPI_IO_RANGE:
253 			type = SYS_RES_IOPORT;
254 			break;
255 #ifdef PCI_RES_BUS
256 		case ACPI_BUS_NUMBER_RANGE:
257 			type = PCI_RES_BUS;
258 			break;
259 #endif
260 		default:
261 			return (AE_OK);
262 		}
263 
264 		if (min + length - 1 != max)
265 			device_printf(sc->ap_dev,
266 			    "Length mismatch for %d range: %jx vs %jx\n", type,
267 			    (uintmax_t)(max - min + 1), (uintmax_t)length);
268 #ifdef __i386__
269 		if (min > ULONG_MAX) {
270 			device_printf(sc->ap_dev,
271 			    "Ignoring %d range above 4GB (%#jx-%#jx)\n",
272 			    type, (uintmax_t)min, (uintmax_t)max);
273 			break;
274 		}
275 		if (max > ULONG_MAX) {
276 			device_printf(sc->ap_dev,
277        		    "Truncating end of %d range above 4GB (%#jx-%#jx)\n",
278 			    type, (uintmax_t)min, (uintmax_t)max);
279 			max = ULONG_MAX;
280 		}
281 #endif
282 		error = pcib_host_res_decodes(&sc->ap_host_res, type, min, max,
283 		    flags);
284 		if (error)
285 			panic("Failed to manage %d range (%#jx-%#jx): %d",
286 			    type, (uintmax_t)min, (uintmax_t)max, error);
287 		break;
288 	default:
289 		break;
290 	}
291 	return (AE_OK);
292 }
293 #endif
294 
295 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
296 static bool
297 get_decoded_bus_range(struct acpi_hpcib_softc *sc, rman_res_t *startp,
298     rman_res_t *endp)
299 {
300 	struct resource_list_entry *rle;
301 
302 	rle = resource_list_find(&sc->ap_host_res.hr_rl, PCI_RES_BUS, 0);
303 	if (rle == NULL)
304 		return (false);
305 	*startp = rle->start;
306 	*endp = rle->end;
307 	return (true);
308 }
309 #endif
310 
311 static int
312 acpi_pcib_osc(struct acpi_hpcib_softc *sc, uint32_t osc_ctl)
313 {
314 	ACPI_STATUS status;
315 	uint32_t cap_set[3];
316 
317 	static uint8_t pci_host_bridge_uuid[ACPI_UUID_LENGTH] = {
318 		0x5b, 0x4d, 0xdb, 0x33, 0xf7, 0x1f, 0x1c, 0x40,
319 		0x96, 0x57, 0x74, 0x41, 0xc0, 0x3d, 0xd7, 0x66
320 	};
321 
322 	/*
323 	 * Don't invoke _OSC if a control is already granted.
324 	 * However, always invoke _OSC during attach when 0 is passed.
325 	 */
326 	if (osc_ctl != 0 && (sc->ap_osc_ctl & osc_ctl) == osc_ctl)
327 		return (0);
328 
329 	/* Support Field: Extended PCI Config Space, PCI Segment Groups, MSI */
330 	cap_set[PCI_OSC_SUPPORT] = PCIM_OSC_SUPPORT_EXT_PCI_CONF |
331 	    PCIM_OSC_SUPPORT_SEG_GROUP | PCIM_OSC_SUPPORT_MSI;
332 	/* Active State Power Management, Clock Power Management Capability */
333 	if (pci_enable_aspm)
334 		cap_set[PCI_OSC_SUPPORT] |= PCIM_OSC_SUPPORT_ASPM |
335 		    PCIM_OSC_SUPPORT_CPMC;
336 
337 	/* Control Field */
338 	cap_set[PCI_OSC_CTL] = sc->ap_osc_ctl | osc_ctl;
339 
340 	status = acpi_EvaluateOSC(sc->ap_handle, pci_host_bridge_uuid, 1,
341 	    nitems(cap_set), cap_set, cap_set, false);
342 	if (ACPI_FAILURE(status)) {
343 		if (status == AE_NOT_FOUND) {
344 			sc->ap_osc_ctl |= osc_ctl;
345 			return (0);
346 		}
347 		device_printf(sc->ap_dev, "_OSC failed: %s\n",
348 		    AcpiFormatException(status));
349 		return (EIO);
350 	}
351 
352 	/*
353 	 * _OSC may return an error in the status word, but will
354 	 * update the control mask always.  _OSC should not revoke
355 	 * previously-granted controls.
356 	 */
357 	if ((cap_set[PCI_OSC_CTL] & sc->ap_osc_ctl) != sc->ap_osc_ctl)
358 		device_printf(sc->ap_dev, "_OSC revoked %#x\n",
359 		    (cap_set[PCI_OSC_CTL] & sc->ap_osc_ctl) ^ sc->ap_osc_ctl);
360 	sc->ap_osc_ctl = cap_set[PCI_OSC_CTL];
361 	if ((sc->ap_osc_ctl & osc_ctl) != osc_ctl)
362 		return (EIO);
363 
364 	return (0);
365 }
366 
367 static int
368 acpi_pcib_acpi_attach(device_t dev)
369 {
370     struct acpi_hpcib_softc	*sc;
371     ACPI_STATUS			status;
372     static int bus0_seen = 0;
373     u_int slot, func, busok;
374 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
375     struct resource *bus_res;
376     rman_res_t end, start;
377     int rid;
378 #endif
379     int error, domain;
380     uint8_t busno;
381 
382     ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
383 
384     sc = device_get_softc(dev);
385     sc->ap_dev = dev;
386     sc->ap_handle = acpi_get_handle(dev);
387 
388     /*
389      * Don't attach if we're not really there.
390      */
391     if (!acpi_DeviceIsPresent(dev))
392 	return (ENXIO);
393 
394     acpi_pcib_osc(sc, 0);
395 
396     /*
397      * Get our segment number by evaluating _SEG.
398      * It's OK for this to not exist.
399      */
400     status = acpi_GetInteger(sc->ap_handle, "_SEG", &sc->ap_segment);
401     if (ACPI_FAILURE(status)) {
402 	if (status != AE_NOT_FOUND) {
403 	    device_printf(dev, "could not evaluate _SEG - %s\n",
404 		AcpiFormatException(status));
405 	    return_VALUE (ENXIO);
406 	}
407 	/* If it's not found, assume 0. */
408 	sc->ap_segment = 0;
409     }
410 
411     /*
412      * Get the address (device and function) of the associated
413      * PCI-Host bridge device from _ADR.  Assume we don't have one if
414      * it doesn't exist.
415      */
416     status = acpi_GetInteger(sc->ap_handle, "_ADR", &sc->ap_addr);
417     if (ACPI_FAILURE(status)) {
418 	if (status != AE_NOT_FOUND)
419 	    device_printf(dev, "could not evaluate _ADR - %s\n",
420 		AcpiFormatException(status));
421 	sc->ap_addr = -1;
422     }
423 
424 #ifdef NEW_PCIB
425     /*
426      * Determine which address ranges this bridge decodes and setup
427      * resource managers for those ranges.
428      */
429     if (pcib_host_res_init(sc->ap_dev, &sc->ap_host_res) != 0)
430 	    panic("failed to init hostb resources");
431     if (!acpi_disabled("hostres")) {
432 	status = AcpiWalkResources(sc->ap_handle, "_CRS",
433 	    acpi_pcib_producer_handler, sc);
434 	if (ACPI_FAILURE(status) && status != AE_NOT_FOUND)
435 	    device_printf(sc->ap_dev, "failed to parse resources: %s\n",
436 		AcpiFormatException(status));
437     }
438 #endif
439 
440     /*
441      * Get our base bus number by evaluating _BBN.
442      * If this doesn't work, we assume we're bus number 0.
443      *
444      * XXX note that it may also not exist in the case where we are
445      *     meant to use a private configuration space mechanism for this bus,
446      *     so we should dig out our resources and check to see if we have
447      *     anything like that.  How do we do this?
448      * XXX If we have the requisite information, and if we don't think the
449      *     default PCI configuration space handlers can deal with this bus,
450      *     we should attach our own handler.
451      * XXX invoke _REG on this for the PCI config space address space?
452      * XXX It seems many BIOS's with multiple Host-PCI bridges do not set
453      *     _BBN correctly.  They set _BBN to zero for all bridges.  Thus,
454      *     if _BBN is zero and PCI bus 0 already exists, we try to read our
455      *     bus number from the configuration registers at address _ADR.
456      *     We only do this for domain/segment 0 in the hopes that this is
457      *     only needed for old single-domain machines.
458      */
459     status = acpi_GetInteger(sc->ap_handle, "_BBN", &sc->ap_bus);
460     if (ACPI_FAILURE(status)) {
461 	if (status != AE_NOT_FOUND) {
462 	    device_printf(dev, "could not evaluate _BBN - %s\n",
463 		AcpiFormatException(status));
464 	    return (ENXIO);
465 	} else {
466 	    /* If it's not found, assume 0. */
467 	    sc->ap_bus = 0;
468 	}
469     }
470 
471     /*
472      * If this is segment 0, the bus is zero, and PCI bus 0 already
473      * exists, read the bus number via PCI config space.
474      */
475     busok = 1;
476     if (sc->ap_segment == 0 && sc->ap_bus == 0 && bus0_seen) {
477 	busok = 0;
478 	if (sc->ap_addr != -1) {
479 	    /* XXX: We assume bus 0. */
480 	    slot = ACPI_ADR_PCI_SLOT(sc->ap_addr);
481 	    func = ACPI_ADR_PCI_FUNC(sc->ap_addr);
482 	    if (bootverbose)
483 		device_printf(dev, "reading config registers from 0:%d:%d\n",
484 		    slot, func);
485 	    if (host_pcib_get_busno(pci_cfgregread, 0, slot, func, &busno) == 0)
486 		device_printf(dev, "couldn't read bus number from cfg space\n");
487 	    else {
488 		sc->ap_bus = busno;
489 		busok = 1;
490 	    }
491 	}
492     }
493 
494 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
495     /*
496      * If nothing else worked, hope that ACPI at least lays out the
497      * Host-PCI bridges in order and that as a result the next free
498      * bus number is our bus number.
499      */
500     if (busok == 0) {
501 	    /*
502 	     * If we have a region of bus numbers, use the first
503 	     * number for our bus.
504 	     */
505 	    if (get_decoded_bus_range(sc, &start, &end))
506 		    sc->ap_bus = start;
507 	    else {
508 		    rid = 0;
509 		    bus_res = pci_domain_alloc_bus(sc->ap_segment, dev, &rid, 0,
510 			PCI_BUSMAX, 1, 0);
511 		    if (bus_res == NULL) {
512 			    device_printf(dev,
513 				"could not allocate bus number\n");
514 			    pcib_host_res_free(dev, &sc->ap_host_res);
515 			    return (ENXIO);
516 		    }
517 		    sc->ap_bus = rman_get_start(bus_res);
518 		    pci_domain_release_bus(sc->ap_segment, dev, bus_res);
519 	    }
520     } else {
521 	    /*
522 	     * If there is a decoded bus range, assume the bus number is
523 	     * the first value in the range.  Warn if _BBN doesn't match.
524 	     */
525 	    if (get_decoded_bus_range(sc, &start, &end)) {
526 		    if (sc->ap_bus != start) {
527 			    device_printf(dev,
528 				"WARNING: BIOS configured bus number (%d) is "
529 				"not within decoded bus number range "
530 				"(%ju - %ju).\n",
531 				sc->ap_bus, (uintmax_t)start, (uintmax_t)end);
532 			    device_printf(dev,
533 				"Using range start (%ju) as bus number.\n",
534 				(uintmax_t)start);
535 			    sc->ap_bus = start;
536 		    }
537 	    }
538     }
539 #else
540     /*
541      * If nothing else worked, hope that ACPI at least lays out the
542      * host-PCI bridges in order and that as a result our unit number
543      * is actually our bus number.  There are several reasons this
544      * might not be true.
545      */
546     if (busok == 0) {
547 	sc->ap_bus = device_get_unit(dev);
548 	device_printf(dev, "trying bus number %d\n", sc->ap_bus);
549     }
550 #endif
551 
552     /* If this is bus 0 on segment 0, note that it has been seen already. */
553     if (sc->ap_segment == 0 && sc->ap_bus == 0)
554 	    bus0_seen = 1;
555 
556     acpi_pcib_fetch_prt(dev, &sc->ap_prt);
557 
558     error = bus_dma_tag_create(bus_get_dma_tag(dev), 1,
559 	0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
560 	NULL, NULL, BUS_SPACE_MAXSIZE, BUS_SPACE_UNRESTRICTED,
561 	BUS_SPACE_MAXSIZE, 0, NULL, NULL, &sc->ap_dma_tag);
562     if (error != 0)
563 	goto errout;
564     error = bus_get_domain(dev, &domain);
565     if (error == 0)
566 	error = bus_dma_tag_set_domain(sc->ap_dma_tag, domain);
567     /* Don't fail to attach if the domain can't be queried or set. */
568     error = 0;
569 
570     bus_generic_probe(dev);
571     if (device_add_child(dev, "pci", -1) == NULL) {
572 	bus_dma_tag_destroy(sc->ap_dma_tag);
573 	sc->ap_dma_tag = NULL;
574 	error = ENXIO;
575 	goto errout;
576     }
577     return (bus_generic_attach(dev));
578 
579 errout:
580     device_printf(device_get_parent(dev), "couldn't attach pci bus\n");
581 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
582     pcib_host_res_free(dev, &sc->ap_host_res);
583 #endif
584     return (error);
585 }
586 
587 /*
588  * Support for standard PCI bridge ivars.
589  */
590 static int
591 acpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
592 {
593     struct acpi_hpcib_softc	*sc = device_get_softc(dev);
594 
595     switch (which) {
596     case PCIB_IVAR_DOMAIN:
597 	*result = sc->ap_segment;
598 	return (0);
599     case PCIB_IVAR_BUS:
600 	*result = sc->ap_bus;
601 	return (0);
602     case ACPI_IVAR_HANDLE:
603 	*result = (uintptr_t)sc->ap_handle;
604 	return (0);
605     case ACPI_IVAR_FLAGS:
606 	*result = (uintptr_t)sc->ap_flags;
607 	return (0);
608     }
609     return (ENOENT);
610 }
611 
612 static int
613 acpi_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
614 {
615     struct acpi_hpcib_softc	*sc = device_get_softc(dev);
616 
617     switch (which) {
618     case PCIB_IVAR_DOMAIN:
619 	return (EINVAL);
620     case PCIB_IVAR_BUS:
621 	sc->ap_bus = value;
622 	return (0);
623     case ACPI_IVAR_HANDLE:
624 	sc->ap_handle = (ACPI_HANDLE)value;
625 	return (0);
626     case ACPI_IVAR_FLAGS:
627 	sc->ap_flags = (int)value;
628 	return (0);
629     }
630     return (ENOENT);
631 }
632 
633 static uint32_t
634 acpi_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func,
635     u_int reg, int bytes)
636 {
637     struct acpi_hpcib_softc *sc = device_get_softc(dev);
638 
639     return (pci_cfgregread(sc->ap_segment, bus, slot, func, reg, bytes));
640 }
641 
642 static void
643 acpi_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func,
644     u_int reg, uint32_t data, int bytes)
645 {
646     struct acpi_hpcib_softc *sc = device_get_softc(dev);
647 
648     pci_cfgregwrite(sc->ap_segment, bus, slot, func, reg, data, bytes);
649 }
650 
651 static int
652 acpi_pcib_acpi_route_interrupt(device_t pcib, device_t dev, int pin)
653 {
654     struct acpi_hpcib_softc *sc = device_get_softc(pcib);
655 
656     return (acpi_pcib_route_interrupt(pcib, dev, pin, &sc->ap_prt));
657 }
658 
659 static int
660 acpi_pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount,
661     int *irqs)
662 {
663 	device_t bus;
664 
665 	bus = device_get_parent(pcib);
666 	return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
667 	    irqs));
668 }
669 
670 static int
671 acpi_pcib_alloc_msix(device_t pcib, device_t dev, int *irq)
672 {
673 	device_t bus;
674 
675 	bus = device_get_parent(pcib);
676 	return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
677 }
678 
679 static int
680 acpi_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
681     uint32_t *data)
682 {
683 	struct acpi_hpcib_softc *sc;
684 	device_t bus, hostb;
685 	int error;
686 
687 	bus = device_get_parent(pcib);
688 	error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data);
689 	if (error)
690 		return (error);
691 
692 	sc = device_get_softc(pcib);
693 	if (sc->ap_addr == -1)
694 		return (0);
695 	/* XXX: Assumes all bridges are on bus 0. */
696 	hostb = pci_find_dbsf(sc->ap_segment, 0, ACPI_ADR_PCI_SLOT(sc->ap_addr),
697 	    ACPI_ADR_PCI_FUNC(sc->ap_addr));
698 	if (hostb != NULL)
699 		pci_ht_map_msi(hostb, *addr);
700 	return (0);
701 }
702 
703 struct resource *
704 acpi_pcib_acpi_alloc_resource(device_t dev, device_t child, int type, int *rid,
705     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
706 {
707 #ifdef NEW_PCIB
708     struct acpi_hpcib_softc *sc;
709     struct resource *res;
710 #endif
711 
712 #if defined(__i386__) || defined(__amd64__)
713     start = hostb_alloc_start(type, start, end, count);
714 #endif
715 
716 #ifdef NEW_PCIB
717     sc = device_get_softc(dev);
718 #ifdef PCI_RES_BUS
719     if (type == PCI_RES_BUS)
720 	return (pci_domain_alloc_bus(sc->ap_segment, child, rid, start, end,
721 	    count, flags));
722 #endif
723     res = pcib_host_res_alloc(&sc->ap_host_res, child, type, rid, start, end,
724 	count, flags);
725 
726     /*
727      * XXX: If this is a request for a specific range, assume it is
728      * correct and pass it up to the parent.  What we probably want to
729      * do long-term is explicitly trust any firmware-configured
730      * resources during the initial bus scan on boot and then disable
731      * this after that.
732      */
733     if (res == NULL && start + count - 1 == end)
734 	res = bus_generic_alloc_resource(dev, child, type, rid, start, end,
735 	    count, flags);
736     return (res);
737 #else
738     return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
739 	count, flags));
740 #endif
741 }
742 
743 #ifdef NEW_PCIB
744 int
745 acpi_pcib_acpi_adjust_resource(device_t dev, device_t child,
746     struct resource *r, rman_res_t start, rman_res_t end)
747 {
748 	struct acpi_hpcib_softc *sc;
749 
750 	sc = device_get_softc(dev);
751 #ifdef PCI_RES_BUS
752 	if (rman_get_type(r) == PCI_RES_BUS)
753 		return (pci_domain_adjust_bus(sc->ap_segment, child, r, start,
754 		    end));
755 #endif
756 	return (pcib_host_res_adjust(&sc->ap_host_res, child, r, start, end));
757 }
758 
759 #ifdef PCI_RES_BUS
760 int
761 acpi_pcib_acpi_release_resource(device_t dev, device_t child,
762     struct resource *r)
763 {
764 	struct acpi_hpcib_softc *sc;
765 
766 	sc = device_get_softc(dev);
767 	if (rman_get_type(r) == PCI_RES_BUS)
768 		return (pci_domain_release_bus(sc->ap_segment, child, r));
769 	return (bus_generic_release_resource(dev, child, r));
770 }
771 
772 int
773 acpi_pcib_acpi_activate_resource(device_t dev, device_t child,
774     struct resource *r)
775 {
776 	struct acpi_hpcib_softc *sc;
777 
778 	sc = device_get_softc(dev);
779 	if (rman_get_type(r) == PCI_RES_BUS)
780 		return (pci_domain_activate_bus(sc->ap_segment, child, r));
781 	return (bus_generic_activate_resource(dev, child, r));
782 }
783 
784 int
785 acpi_pcib_acpi_deactivate_resource(device_t dev, device_t child,
786     struct resource *r)
787 {
788 	struct acpi_hpcib_softc *sc;
789 
790 	sc = device_get_softc(dev);
791 	if (rman_get_type(r) == PCI_RES_BUS)
792 		return (pci_domain_deactivate_bus(sc->ap_segment, child, r));
793 	return (bus_generic_deactivate_resource(dev, child, r));
794 }
795 #endif
796 #endif
797 
798 static int
799 acpi_pcib_request_feature(device_t pcib, device_t dev, enum pci_feature feature)
800 {
801 	uint32_t osc_ctl;
802 	struct acpi_hpcib_softc *sc;
803 
804 	sc = device_get_softc(pcib);
805 
806 	switch (feature) {
807 	case PCI_FEATURE_HP:
808 		osc_ctl = PCIM_OSC_CTL_PCIE_HP;
809 		break;
810 	case PCI_FEATURE_AER:
811 		osc_ctl = PCIM_OSC_CTL_PCIE_AER;
812 		break;
813 	default:
814 		return (EINVAL);
815 	}
816 
817 	return (acpi_pcib_osc(sc, osc_ctl));
818 }
819 
820 static bus_dma_tag_t
821 acpi_pcib_get_dma_tag(device_t bus, device_t child)
822 {
823 	struct acpi_hpcib_softc *sc;
824 
825 	sc = device_get_softc(bus);
826 
827 	return (sc->ap_dma_tag);
828 }
829