xref: /freebsd/sys/dev/acpica/acpi_pcib_acpi.c (revision 1c05a6ea6b849ff95e539c31adea887c644a6a01)
1 /*-
2  * Copyright (c) 2000 Michael Smith
3  * Copyright (c) 2000 BSDi
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30 
31 #include "opt_acpi.h"
32 #include "opt_pci.h"
33 
34 #include <sys/param.h>
35 #include <sys/bus.h>
36 #include <sys/kernel.h>
37 #include <sys/limits.h>
38 #include <sys/malloc.h>
39 #include <sys/module.h>
40 #include <sys/rman.h>
41 #include <sys/sysctl.h>
42 
43 #include <contrib/dev/acpica/include/acpi.h>
44 #include <contrib/dev/acpica/include/accommon.h>
45 
46 #include <dev/acpica/acpivar.h>
47 
48 #include <machine/pci_cfgreg.h>
49 #include <dev/pci/pcireg.h>
50 #include <dev/pci/pcivar.h>
51 #include <dev/pci/pcib_private.h>
52 #include "pcib_if.h"
53 
54 #include <dev/acpica/acpi_pcibvar.h>
55 
56 /* Hooks for the ACPI CA debugging infrastructure. */
57 #define _COMPONENT	ACPI_BUS
58 ACPI_MODULE_NAME("PCI_ACPI")
59 
60 struct acpi_hpcib_softc {
61     device_t		ap_dev;
62     ACPI_HANDLE		ap_handle;
63     int			ap_flags;
64     uint32_t		ap_osc_ctl;
65 
66     int			ap_segment;	/* PCI domain */
67     int			ap_bus;		/* bios-assigned bus number */
68     int			ap_addr;	/* device/func of PCI-Host bridge */
69 
70     ACPI_BUFFER		ap_prt;		/* interrupt routing table */
71 #ifdef NEW_PCIB
72     struct pcib_host_resources ap_host_res;
73 #endif
74 };
75 
76 static int		acpi_pcib_acpi_probe(device_t bus);
77 static int		acpi_pcib_acpi_attach(device_t bus);
78 static int		acpi_pcib_read_ivar(device_t dev, device_t child,
79 			    int which, uintptr_t *result);
80 static int		acpi_pcib_write_ivar(device_t dev, device_t child,
81 			    int which, uintptr_t value);
82 static uint32_t		acpi_pcib_read_config(device_t dev, u_int bus,
83 			    u_int slot, u_int func, u_int reg, int bytes);
84 static void		acpi_pcib_write_config(device_t dev, u_int bus,
85 			    u_int slot, u_int func, u_int reg, uint32_t data,
86 			    int bytes);
87 static int		acpi_pcib_acpi_route_interrupt(device_t pcib,
88 			    device_t dev, int pin);
89 static int		acpi_pcib_alloc_msi(device_t pcib, device_t dev,
90 			    int count, int maxcount, int *irqs);
91 static int		acpi_pcib_map_msi(device_t pcib, device_t dev,
92 			    int irq, uint64_t *addr, uint32_t *data);
93 static int		acpi_pcib_alloc_msix(device_t pcib, device_t dev,
94 			    int *irq);
95 static struct resource *acpi_pcib_acpi_alloc_resource(device_t dev,
96 			    device_t child, int type, int *rid,
97 			    rman_res_t start, rman_res_t end, rman_res_t count,
98 			    u_int flags);
99 #ifdef NEW_PCIB
100 static int		acpi_pcib_acpi_adjust_resource(device_t dev,
101 			    device_t child, int type, struct resource *r,
102 			    rman_res_t start, rman_res_t end);
103 #ifdef PCI_RES_BUS
104 static int		acpi_pcib_acpi_release_resource(device_t dev,
105 			    device_t child, int type, int rid,
106 			    struct resource *r);
107 #endif
108 #endif
109 static int		acpi_pcib_request_feature(device_t pcib, device_t dev,
110 			    enum pci_feature feature);
111 
112 static device_method_t acpi_pcib_acpi_methods[] = {
113     /* Device interface */
114     DEVMETHOD(device_probe,		acpi_pcib_acpi_probe),
115     DEVMETHOD(device_attach,		acpi_pcib_acpi_attach),
116     DEVMETHOD(device_shutdown,		bus_generic_shutdown),
117     DEVMETHOD(device_suspend,		bus_generic_suspend),
118     DEVMETHOD(device_resume,		bus_generic_resume),
119 
120     /* Bus interface */
121     DEVMETHOD(bus_read_ivar,		acpi_pcib_read_ivar),
122     DEVMETHOD(bus_write_ivar,		acpi_pcib_write_ivar),
123     DEVMETHOD(bus_alloc_resource,	acpi_pcib_acpi_alloc_resource),
124 #ifdef NEW_PCIB
125     DEVMETHOD(bus_adjust_resource,	acpi_pcib_acpi_adjust_resource),
126 #else
127     DEVMETHOD(bus_adjust_resource,	bus_generic_adjust_resource),
128 #endif
129 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
130     DEVMETHOD(bus_release_resource,	acpi_pcib_acpi_release_resource),
131 #else
132     DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
133 #endif
134     DEVMETHOD(bus_activate_resource,	bus_generic_activate_resource),
135     DEVMETHOD(bus_deactivate_resource,	bus_generic_deactivate_resource),
136     DEVMETHOD(bus_setup_intr,		bus_generic_setup_intr),
137     DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
138     DEVMETHOD(bus_get_cpus,		acpi_pcib_get_cpus),
139 
140     /* pcib interface */
141     DEVMETHOD(pcib_maxslots,		pcib_maxslots),
142     DEVMETHOD(pcib_read_config,		acpi_pcib_read_config),
143     DEVMETHOD(pcib_write_config,	acpi_pcib_write_config),
144     DEVMETHOD(pcib_route_interrupt,	acpi_pcib_acpi_route_interrupt),
145     DEVMETHOD(pcib_alloc_msi,		acpi_pcib_alloc_msi),
146     DEVMETHOD(pcib_release_msi,		pcib_release_msi),
147     DEVMETHOD(pcib_alloc_msix,		acpi_pcib_alloc_msix),
148     DEVMETHOD(pcib_release_msix,	pcib_release_msix),
149     DEVMETHOD(pcib_map_msi,		acpi_pcib_map_msi),
150     DEVMETHOD(pcib_power_for_sleep,	acpi_pcib_power_for_sleep),
151     DEVMETHOD(pcib_request_feature,	acpi_pcib_request_feature),
152 
153     DEVMETHOD_END
154 };
155 
156 static devclass_t pcib_devclass;
157 
158 DEFINE_CLASS_0(pcib, acpi_pcib_acpi_driver, acpi_pcib_acpi_methods,
159     sizeof(struct acpi_hpcib_softc));
160 DRIVER_MODULE(acpi_pcib, acpi, acpi_pcib_acpi_driver, pcib_devclass, 0, 0);
161 MODULE_DEPEND(acpi_pcib, acpi, 1, 1, 1);
162 
163 static int
164 acpi_pcib_acpi_probe(device_t dev)
165 {
166     ACPI_DEVICE_INFO	*devinfo;
167     ACPI_HANDLE		h;
168     int			root;
169 
170     if (acpi_disabled("pcib") || (h = acpi_get_handle(dev)) == NULL ||
171 	ACPI_FAILURE(AcpiGetObjectInfo(h, &devinfo)))
172 	return (ENXIO);
173     root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0;
174     AcpiOsFree(devinfo);
175     if (!root || pci_cfgregopen() == 0)
176 	return (ENXIO);
177 
178     device_set_desc(dev, "ACPI Host-PCI bridge");
179     return (0);
180 }
181 
182 #ifdef NEW_PCIB
183 static ACPI_STATUS
184 acpi_pcib_producer_handler(ACPI_RESOURCE *res, void *context)
185 {
186 	struct acpi_hpcib_softc *sc;
187 	UINT64 length, min, max;
188 	u_int flags;
189 	int error, type;
190 
191 	sc = context;
192 	switch (res->Type) {
193 	case ACPI_RESOURCE_TYPE_START_DEPENDENT:
194 	case ACPI_RESOURCE_TYPE_END_DEPENDENT:
195 		panic("host bridge has depenedent resources");
196 	case ACPI_RESOURCE_TYPE_ADDRESS16:
197 	case ACPI_RESOURCE_TYPE_ADDRESS32:
198 	case ACPI_RESOURCE_TYPE_ADDRESS64:
199 	case ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64:
200 		if (res->Data.Address.ProducerConsumer != ACPI_PRODUCER)
201 			break;
202 		switch (res->Type) {
203 		case ACPI_RESOURCE_TYPE_ADDRESS16:
204 			min = res->Data.Address16.Address.Minimum;
205 			max = res->Data.Address16.Address.Maximum;
206 			length = res->Data.Address16.Address.AddressLength;
207 			break;
208 		case ACPI_RESOURCE_TYPE_ADDRESS32:
209 			min = res->Data.Address32.Address.Minimum;
210 			max = res->Data.Address32.Address.Maximum;
211 			length = res->Data.Address32.Address.AddressLength;
212 			break;
213 		case ACPI_RESOURCE_TYPE_ADDRESS64:
214 			min = res->Data.Address64.Address.Minimum;
215 			max = res->Data.Address64.Address.Maximum;
216 			length = res->Data.Address64.Address.AddressLength;
217 			break;
218 		default:
219 			KASSERT(res->Type ==
220 			    ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64,
221 			    ("should never happen"));
222 			min = res->Data.ExtAddress64.Address.Minimum;
223 			max = res->Data.ExtAddress64.Address.Maximum;
224 			length = res->Data.ExtAddress64.Address.AddressLength;
225 			break;
226 		}
227 		if (length == 0)
228 			break;
229 		if (min + length - 1 != max &&
230 		    (res->Data.Address.MinAddressFixed != ACPI_ADDRESS_FIXED ||
231 		    res->Data.Address.MaxAddressFixed != ACPI_ADDRESS_FIXED))
232 			break;
233 		flags = 0;
234 		switch (res->Data.Address.ResourceType) {
235 		case ACPI_MEMORY_RANGE:
236 			type = SYS_RES_MEMORY;
237 			if (res->Type != ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64) {
238 				if (res->Data.Address.Info.Mem.Caching ==
239 				    ACPI_PREFETCHABLE_MEMORY)
240 					flags |= RF_PREFETCHABLE;
241 			} else {
242 				/*
243 				 * XXX: Parse prefetch flag out of
244 				 * TypeSpecific.
245 				 */
246 			}
247 			break;
248 		case ACPI_IO_RANGE:
249 			type = SYS_RES_IOPORT;
250 			break;
251 #ifdef PCI_RES_BUS
252 		case ACPI_BUS_NUMBER_RANGE:
253 			type = PCI_RES_BUS;
254 			break;
255 #endif
256 		default:
257 			return (AE_OK);
258 		}
259 
260 		if (min + length - 1 != max)
261 			device_printf(sc->ap_dev,
262 			    "Length mismatch for %d range: %jx vs %jx\n", type,
263 			    (uintmax_t)(max - min + 1), (uintmax_t)length);
264 #ifdef __i386__
265 		if (min > ULONG_MAX) {
266 			device_printf(sc->ap_dev,
267 			    "Ignoring %d range above 4GB (%#jx-%#jx)\n",
268 			    type, (uintmax_t)min, (uintmax_t)max);
269 			break;
270 		}
271 		if (max > ULONG_MAX) {
272 			device_printf(sc->ap_dev,
273        		    "Truncating end of %d range above 4GB (%#jx-%#jx)\n",
274 			    type, (uintmax_t)min, (uintmax_t)max);
275 			max = ULONG_MAX;
276 		}
277 #endif
278 		error = pcib_host_res_decodes(&sc->ap_host_res, type, min, max,
279 		    flags);
280 		if (error)
281 			panic("Failed to manage %d range (%#jx-%#jx): %d",
282 			    type, (uintmax_t)min, (uintmax_t)max, error);
283 		break;
284 	default:
285 		break;
286 	}
287 	return (AE_OK);
288 }
289 #endif
290 
291 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
292 static int
293 first_decoded_bus(struct acpi_hpcib_softc *sc, rman_res_t *startp)
294 {
295 	struct resource_list_entry *rle;
296 
297 	rle = resource_list_find(&sc->ap_host_res.hr_rl, PCI_RES_BUS, 0);
298 	if (rle == NULL)
299 		return (ENXIO);
300 	*startp = rle->start;
301 	return (0);
302 }
303 #endif
304 
305 static int
306 acpi_pcib_osc(struct acpi_hpcib_softc *sc, uint32_t osc_ctl)
307 {
308 	ACPI_STATUS status;
309 	uint32_t cap_set[3];
310 
311 	static uint8_t pci_host_bridge_uuid[ACPI_UUID_LENGTH] = {
312 		0x5b, 0x4d, 0xdb, 0x33, 0xf7, 0x1f, 0x1c, 0x40,
313 		0x96, 0x57, 0x74, 0x41, 0xc0, 0x3d, 0xd7, 0x66
314 	};
315 
316 	/*
317 	 * Don't invoke _OSC if a control is already granted.
318 	 * However, always invoke _OSC during attach when 0 is passed.
319 	 */
320 	if (osc_ctl != 0 && (sc->ap_osc_ctl & osc_ctl) == osc_ctl)
321 		return (0);
322 
323 	/* Support Field: Extended PCI Config Space, MSI */
324 	cap_set[PCI_OSC_SUPPORT] = PCIM_OSC_SUPPORT_EXT_PCI_CONF |
325 	    PCIM_OSC_SUPPORT_MSI;
326 
327 	/* Control Field */
328 	cap_set[PCI_OSC_CTL] = sc->ap_osc_ctl | osc_ctl;
329 
330 	status = acpi_EvaluateOSC(sc->ap_handle, pci_host_bridge_uuid, 1,
331 	    nitems(cap_set), cap_set, cap_set, false);
332 	if (ACPI_FAILURE(status)) {
333 		if (status == AE_NOT_FOUND) {
334 			sc->ap_osc_ctl |= osc_ctl;
335 			return (0);
336 		}
337 		device_printf(sc->ap_dev, "_OSC failed: %s\n",
338 		    AcpiFormatException(status));
339 		return (EIO);
340 	}
341 
342 	/*
343 	 * _OSC may return an error in the status word, but will
344 	 * update the control mask always.  _OSC should not revoke
345 	 * previously-granted controls.
346 	 */
347 	if ((cap_set[PCI_OSC_CTL] & sc->ap_osc_ctl) != sc->ap_osc_ctl)
348 		device_printf(sc->ap_dev, "_OSC revoked %#x\n",
349 		    (cap_set[PCI_OSC_CTL] & sc->ap_osc_ctl) ^ sc->ap_osc_ctl);
350 	sc->ap_osc_ctl = cap_set[PCI_OSC_CTL];
351 	if ((sc->ap_osc_ctl & osc_ctl) != osc_ctl)
352 		return (EIO);
353 
354 	return (0);
355 }
356 
357 static int
358 acpi_pcib_acpi_attach(device_t dev)
359 {
360     struct acpi_hpcib_softc	*sc;
361     ACPI_STATUS			status;
362     static int bus0_seen = 0;
363     u_int slot, func, busok;
364 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
365     struct resource *bus_res;
366     rman_res_t start;
367     int rid;
368 #endif
369     uint8_t busno;
370 
371     ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
372 
373     sc = device_get_softc(dev);
374     sc->ap_dev = dev;
375     sc->ap_handle = acpi_get_handle(dev);
376 
377     /*
378      * Don't attach if we're not really there.
379      */
380     if (!acpi_DeviceIsPresent(dev))
381 	return (ENXIO);
382 
383     acpi_pcib_osc(sc, 0);
384 
385     /*
386      * Get our segment number by evaluating _SEG.
387      * It's OK for this to not exist.
388      */
389     status = acpi_GetInteger(sc->ap_handle, "_SEG", &sc->ap_segment);
390     if (ACPI_FAILURE(status)) {
391 	if (status != AE_NOT_FOUND) {
392 	    device_printf(dev, "could not evaluate _SEG - %s\n",
393 		AcpiFormatException(status));
394 	    return_VALUE (ENXIO);
395 	}
396 	/* If it's not found, assume 0. */
397 	sc->ap_segment = 0;
398     }
399 
400     /*
401      * Get the address (device and function) of the associated
402      * PCI-Host bridge device from _ADR.  Assume we don't have one if
403      * it doesn't exist.
404      */
405     status = acpi_GetInteger(sc->ap_handle, "_ADR", &sc->ap_addr);
406     if (ACPI_FAILURE(status)) {
407 	device_printf(dev, "could not evaluate _ADR - %s\n",
408 	    AcpiFormatException(status));
409 	sc->ap_addr = -1;
410     }
411 
412 #ifdef NEW_PCIB
413     /*
414      * Determine which address ranges this bridge decodes and setup
415      * resource managers for those ranges.
416      */
417     if (pcib_host_res_init(sc->ap_dev, &sc->ap_host_res) != 0)
418 	    panic("failed to init hostb resources");
419     if (!acpi_disabled("hostres")) {
420 	status = AcpiWalkResources(sc->ap_handle, "_CRS",
421 	    acpi_pcib_producer_handler, sc);
422 	if (ACPI_FAILURE(status) && status != AE_NOT_FOUND)
423 	    device_printf(sc->ap_dev, "failed to parse resources: %s\n",
424 		AcpiFormatException(status));
425     }
426 #endif
427 
428     /*
429      * Get our base bus number by evaluating _BBN.
430      * If this doesn't work, we assume we're bus number 0.
431      *
432      * XXX note that it may also not exist in the case where we are
433      *     meant to use a private configuration space mechanism for this bus,
434      *     so we should dig out our resources and check to see if we have
435      *     anything like that.  How do we do this?
436      * XXX If we have the requisite information, and if we don't think the
437      *     default PCI configuration space handlers can deal with this bus,
438      *     we should attach our own handler.
439      * XXX invoke _REG on this for the PCI config space address space?
440      * XXX It seems many BIOS's with multiple Host-PCI bridges do not set
441      *     _BBN correctly.  They set _BBN to zero for all bridges.  Thus,
442      *     if _BBN is zero and PCI bus 0 already exists, we try to read our
443      *     bus number from the configuration registers at address _ADR.
444      *     We only do this for domain/segment 0 in the hopes that this is
445      *     only needed for old single-domain machines.
446      */
447     status = acpi_GetInteger(sc->ap_handle, "_BBN", &sc->ap_bus);
448     if (ACPI_FAILURE(status)) {
449 	if (status != AE_NOT_FOUND) {
450 	    device_printf(dev, "could not evaluate _BBN - %s\n",
451 		AcpiFormatException(status));
452 	    return (ENXIO);
453 	} else {
454 	    /* If it's not found, assume 0. */
455 	    sc->ap_bus = 0;
456 	}
457     }
458 
459     /*
460      * If this is segment 0, the bus is zero, and PCI bus 0 already
461      * exists, read the bus number via PCI config space.
462      */
463     busok = 1;
464     if (sc->ap_segment == 0 && sc->ap_bus == 0 && bus0_seen) {
465 	busok = 0;
466 	if (sc->ap_addr != -1) {
467 	    /* XXX: We assume bus 0. */
468 	    slot = ACPI_ADR_PCI_SLOT(sc->ap_addr);
469 	    func = ACPI_ADR_PCI_FUNC(sc->ap_addr);
470 	    if (bootverbose)
471 		device_printf(dev, "reading config registers from 0:%d:%d\n",
472 		    slot, func);
473 	    if (host_pcib_get_busno(pci_cfgregread, 0, slot, func, &busno) == 0)
474 		device_printf(dev, "couldn't read bus number from cfg space\n");
475 	    else {
476 		sc->ap_bus = busno;
477 		busok = 1;
478 	    }
479 	}
480     }
481 
482 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
483     /*
484      * If nothing else worked, hope that ACPI at least lays out the
485      * Host-PCI bridges in order and that as a result the next free
486      * bus number is our bus number.
487      */
488     if (busok == 0) {
489 	    /*
490 	     * If we have a region of bus numbers, use the first
491 	     * number for our bus.
492 	     */
493 	    if (first_decoded_bus(sc, &start) == 0)
494 		    sc->ap_bus = start;
495 	    else {
496 		    rid = 0;
497 		    bus_res = pci_domain_alloc_bus(sc->ap_segment, dev, &rid, 0,
498 			PCI_BUSMAX, 1, 0);
499 		    if (bus_res == NULL) {
500 			    device_printf(dev,
501 				"could not allocate bus number\n");
502 			    pcib_host_res_free(dev, &sc->ap_host_res);
503 			    return (ENXIO);
504 		    }
505 		    sc->ap_bus = rman_get_start(bus_res);
506 		    pci_domain_release_bus(sc->ap_segment, dev, rid, bus_res);
507 	    }
508     } else {
509 	    /*
510 	     * Require the bus number from _BBN to match the start of any
511 	     * decoded range.
512 	     */
513 	    if (first_decoded_bus(sc, &start) == 0 && sc->ap_bus != start) {
514 		    device_printf(dev,
515 		"bus number %d does not match start of decoded range %ju\n",
516 			sc->ap_bus, (uintmax_t)start);
517 		    pcib_host_res_free(dev, &sc->ap_host_res);
518 		    return (ENXIO);
519 	    }
520     }
521 #else
522     /*
523      * If nothing else worked, hope that ACPI at least lays out the
524      * host-PCI bridges in order and that as a result our unit number
525      * is actually our bus number.  There are several reasons this
526      * might not be true.
527      */
528     if (busok == 0) {
529 	sc->ap_bus = device_get_unit(dev);
530 	device_printf(dev, "trying bus number %d\n", sc->ap_bus);
531     }
532 #endif
533 
534     /* If this is bus 0 on segment 0, note that it has been seen already. */
535     if (sc->ap_segment == 0 && sc->ap_bus == 0)
536 	    bus0_seen = 1;
537 
538     acpi_pcib_fetch_prt(dev, &sc->ap_prt);
539 
540     bus_generic_probe(dev);
541     if (device_add_child(dev, "pci", -1) == NULL) {
542 	device_printf(device_get_parent(dev), "couldn't attach pci bus\n");
543 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
544 	pcib_host_res_free(dev, &sc->ap_host_res);
545 #endif
546 	return (ENXIO);
547     }
548     return (bus_generic_attach(dev));
549 }
550 
551 /*
552  * Support for standard PCI bridge ivars.
553  */
554 static int
555 acpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
556 {
557     struct acpi_hpcib_softc	*sc = device_get_softc(dev);
558 
559     switch (which) {
560     case PCIB_IVAR_DOMAIN:
561 	*result = sc->ap_segment;
562 	return (0);
563     case PCIB_IVAR_BUS:
564 	*result = sc->ap_bus;
565 	return (0);
566     case ACPI_IVAR_HANDLE:
567 	*result = (uintptr_t)sc->ap_handle;
568 	return (0);
569     case ACPI_IVAR_FLAGS:
570 	*result = (uintptr_t)sc->ap_flags;
571 	return (0);
572     }
573     return (ENOENT);
574 }
575 
576 static int
577 acpi_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
578 {
579     struct acpi_hpcib_softc	*sc = device_get_softc(dev);
580 
581     switch (which) {
582     case PCIB_IVAR_DOMAIN:
583 	return (EINVAL);
584     case PCIB_IVAR_BUS:
585 	sc->ap_bus = value;
586 	return (0);
587     case ACPI_IVAR_HANDLE:
588 	sc->ap_handle = (ACPI_HANDLE)value;
589 	return (0);
590     case ACPI_IVAR_FLAGS:
591 	sc->ap_flags = (int)value;
592 	return (0);
593     }
594     return (ENOENT);
595 }
596 
597 static uint32_t
598 acpi_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func,
599     u_int reg, int bytes)
600 {
601     return (pci_cfgregread(bus, slot, func, reg, bytes));
602 }
603 
604 static void
605 acpi_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func,
606     u_int reg, uint32_t data, int bytes)
607 {
608     pci_cfgregwrite(bus, slot, func, reg, data, bytes);
609 }
610 
611 static int
612 acpi_pcib_acpi_route_interrupt(device_t pcib, device_t dev, int pin)
613 {
614     struct acpi_hpcib_softc *sc = device_get_softc(pcib);
615 
616     return (acpi_pcib_route_interrupt(pcib, dev, pin, &sc->ap_prt));
617 }
618 
619 static int
620 acpi_pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount,
621     int *irqs)
622 {
623 	device_t bus;
624 
625 	bus = device_get_parent(pcib);
626 	return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
627 	    irqs));
628 }
629 
630 static int
631 acpi_pcib_alloc_msix(device_t pcib, device_t dev, int *irq)
632 {
633 	device_t bus;
634 
635 	bus = device_get_parent(pcib);
636 	return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
637 }
638 
639 static int
640 acpi_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
641     uint32_t *data)
642 {
643 	struct acpi_hpcib_softc *sc;
644 	device_t bus, hostb;
645 	int error;
646 
647 	bus = device_get_parent(pcib);
648 	error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data);
649 	if (error)
650 		return (error);
651 
652 	sc = device_get_softc(pcib);
653 	if (sc->ap_addr == -1)
654 		return (0);
655 	/* XXX: Assumes all bridges are on bus 0. */
656 	hostb = pci_find_dbsf(sc->ap_segment, 0, ACPI_ADR_PCI_SLOT(sc->ap_addr),
657 	    ACPI_ADR_PCI_FUNC(sc->ap_addr));
658 	if (hostb != NULL)
659 		pci_ht_map_msi(hostb, *addr);
660 	return (0);
661 }
662 
663 struct resource *
664 acpi_pcib_acpi_alloc_resource(device_t dev, device_t child, int type, int *rid,
665     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
666 {
667 #ifdef NEW_PCIB
668     struct acpi_hpcib_softc *sc;
669     struct resource *res;
670 #endif
671 
672 #if defined(__i386__) || defined(__amd64__)
673     start = hostb_alloc_start(type, start, end, count);
674 #endif
675 
676 #ifdef NEW_PCIB
677     sc = device_get_softc(dev);
678 #ifdef PCI_RES_BUS
679     if (type == PCI_RES_BUS)
680 	return (pci_domain_alloc_bus(sc->ap_segment, child, rid, start, end,
681 	    count, flags));
682 #endif
683     res = pcib_host_res_alloc(&sc->ap_host_res, child, type, rid, start, end,
684 	count, flags);
685 
686     /*
687      * XXX: If this is a request for a specific range, assume it is
688      * correct and pass it up to the parent.  What we probably want to
689      * do long-term is explicitly trust any firmware-configured
690      * resources during the initial bus scan on boot and then disable
691      * this after that.
692      */
693     if (res == NULL && start + count - 1 == end)
694 	res = bus_generic_alloc_resource(dev, child, type, rid, start, end,
695 	    count, flags);
696     return (res);
697 #else
698     return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
699 	count, flags));
700 #endif
701 }
702 
703 #ifdef NEW_PCIB
704 int
705 acpi_pcib_acpi_adjust_resource(device_t dev, device_t child, int type,
706     struct resource *r, rman_res_t start, rman_res_t end)
707 {
708 	struct acpi_hpcib_softc *sc;
709 
710 	sc = device_get_softc(dev);
711 #ifdef PCI_RES_BUS
712 	if (type == PCI_RES_BUS)
713 		return (pci_domain_adjust_bus(sc->ap_segment, child, r, start,
714 		    end));
715 #endif
716 	return (pcib_host_res_adjust(&sc->ap_host_res, child, type, r, start,
717 	    end));
718 }
719 
720 #ifdef PCI_RES_BUS
721 int
722 acpi_pcib_acpi_release_resource(device_t dev, device_t child, int type, int rid,
723     struct resource *r)
724 {
725 	struct acpi_hpcib_softc *sc;
726 
727 	sc = device_get_softc(dev);
728 	if (type == PCI_RES_BUS)
729 		return (pci_domain_release_bus(sc->ap_segment, child, rid, r));
730 	return (bus_generic_release_resource(dev, child, type, rid, r));
731 }
732 #endif
733 #endif
734 
735 static int
736 acpi_pcib_request_feature(device_t pcib, device_t dev, enum pci_feature feature)
737 {
738 	uint32_t osc_ctl;
739 	struct acpi_hpcib_softc *sc;
740 
741 	sc = device_get_softc(pcib);
742 
743 	switch (feature) {
744 	case PCI_FEATURE_HP:
745 		osc_ctl = PCIM_OSC_CTL_PCIE_HP;
746 		break;
747 	case PCI_FEATURE_AER:
748 		osc_ctl = PCIM_OSC_CTL_PCIE_AER;
749 		break;
750 	default:
751 		return (EINVAL);
752 	}
753 
754 	return (acpi_pcib_osc(sc, osc_ctl));
755 }
756