1 /*- 2 * Copyright (c) 2003-2005 Nate Lawson (SDG) 3 * Copyright (c) 2001 Michael Smith 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include "opt_acpi.h" 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/cpu.h> 35 #include <sys/kernel.h> 36 #include <sys/malloc.h> 37 #include <sys/module.h> 38 #include <sys/pcpu.h> 39 #include <sys/power.h> 40 #include <sys/proc.h> 41 #include <sys/sbuf.h> 42 #include <sys/smp.h> 43 44 #include <dev/pci/pcivar.h> 45 #include <machine/atomic.h> 46 #include <machine/bus.h> 47 #include <sys/rman.h> 48 49 #include <contrib/dev/acpica/acpi.h> 50 #include <dev/acpica/acpivar.h> 51 52 /* 53 * Support for ACPI Processor devices, including C[1-3] sleep states. 54 */ 55 56 /* Hooks for the ACPI CA debugging infrastructure */ 57 #define _COMPONENT ACPI_PROCESSOR 58 ACPI_MODULE_NAME("PROCESSOR") 59 60 struct acpi_cx { 61 struct resource *p_lvlx; /* Register to read to enter state. */ 62 uint32_t type; /* C1-3 (C4 and up treated as C3). */ 63 uint32_t trans_lat; /* Transition latency (usec). */ 64 uint32_t power; /* Power consumed (mW). */ 65 int res_type; /* Resource type for p_lvlx. */ 66 }; 67 #define MAX_CX_STATES 8 68 69 struct acpi_cpu_softc { 70 device_t cpu_dev; 71 ACPI_HANDLE cpu_handle; 72 struct pcpu *cpu_pcpu; 73 uint32_t cpu_acpi_id; /* ACPI processor id */ 74 uint32_t cpu_p_blk; /* ACPI P_BLK location */ 75 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */ 76 struct acpi_cx cpu_cx_states[MAX_CX_STATES]; 77 int cpu_cx_count; /* Number of valid Cx states. */ 78 int cpu_prev_sleep;/* Last idle sleep duration. */ 79 int cpu_features; /* Child driver supported features. */ 80 /* Runtime state. */ 81 int cpu_non_c3; /* Index of lowest non-C3 state. */ 82 int cpu_short_slp; /* Count of < 1us sleeps. */ 83 u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */ 84 /* Values for sysctl. */ 85 struct sysctl_ctx_list cpu_sysctl_ctx; 86 struct sysctl_oid *cpu_sysctl_tree; 87 int cpu_cx_lowest; 88 char cpu_cx_supported[64]; 89 int cpu_rid; 90 }; 91 92 struct acpi_cpu_device { 93 struct resource_list ad_rl; 94 }; 95 96 #define CPU_GET_REG(reg, width) \ 97 (bus_space_read_ ## width(rman_get_bustag((reg)), \ 98 rman_get_bushandle((reg)), 0)) 99 #define CPU_SET_REG(reg, width, val) \ 100 (bus_space_write_ ## width(rman_get_bustag((reg)), \ 101 rman_get_bushandle((reg)), 0, (val))) 102 103 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */ 104 105 #define ACPI_NOTIFY_CX_STATES 0x81 /* _CST changed. */ 106 107 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */ 108 #define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */ 109 110 #define PCI_VENDOR_INTEL 0x8086 111 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */ 112 #define PCI_REVISION_A_STEP 0 113 #define PCI_REVISION_B_STEP 1 114 #define PCI_REVISION_4E 2 115 #define PCI_REVISION_4M 3 116 117 /* Platform hardware resource information. */ 118 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */ 119 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */ 120 static int cpu_quirks; /* Indicate any hardware bugs. */ 121 122 /* Runtime state. */ 123 static int cpu_disable_idle; /* Disable entry to idle function */ 124 static int cpu_cx_count; /* Number of valid Cx states */ 125 126 /* Values for sysctl. */ 127 static struct sysctl_ctx_list cpu_sysctl_ctx; 128 static struct sysctl_oid *cpu_sysctl_tree; 129 static int cpu_cx_generic; 130 static int cpu_cx_lowest; 131 132 static device_t *cpu_devices; 133 static int cpu_ndevices; 134 static struct acpi_cpu_softc **cpu_softc; 135 ACPI_SERIAL_DECL(cpu, "ACPI CPU"); 136 137 static int acpi_cpu_probe(device_t dev); 138 static int acpi_cpu_attach(device_t dev); 139 static int acpi_cpu_suspend(device_t dev); 140 static int acpi_cpu_resume(device_t dev); 141 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, 142 uint32_t *cpu_id); 143 static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child); 144 static device_t acpi_cpu_add_child(device_t dev, int order, const char *name, 145 int unit); 146 static int acpi_cpu_read_ivar(device_t dev, device_t child, int index, 147 uintptr_t *result); 148 static int acpi_cpu_shutdown(device_t dev); 149 static void acpi_cpu_cx_probe(struct acpi_cpu_softc *sc); 150 static void acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc); 151 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc); 152 static void acpi_cpu_startup(void *arg); 153 static void acpi_cpu_startup_cx(struct acpi_cpu_softc *sc); 154 static void acpi_cpu_idle(void); 155 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context); 156 static int acpi_cpu_quirks(void); 157 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS); 158 static int acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val); 159 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 160 static int acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 161 162 static device_method_t acpi_cpu_methods[] = { 163 /* Device interface */ 164 DEVMETHOD(device_probe, acpi_cpu_probe), 165 DEVMETHOD(device_attach, acpi_cpu_attach), 166 DEVMETHOD(device_detach, bus_generic_detach), 167 DEVMETHOD(device_shutdown, acpi_cpu_shutdown), 168 DEVMETHOD(device_suspend, acpi_cpu_suspend), 169 DEVMETHOD(device_resume, acpi_cpu_resume), 170 171 /* Bus interface */ 172 DEVMETHOD(bus_add_child, acpi_cpu_add_child), 173 DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar), 174 DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist), 175 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 176 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 177 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), 178 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), 179 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 180 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 181 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 182 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 183 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 184 185 {0, 0} 186 }; 187 188 static driver_t acpi_cpu_driver = { 189 "cpu", 190 acpi_cpu_methods, 191 sizeof(struct acpi_cpu_softc), 192 }; 193 194 static devclass_t acpi_cpu_devclass; 195 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0); 196 MODULE_DEPEND(cpu, acpi, 1, 1, 1); 197 198 static int 199 acpi_cpu_probe(device_t dev) 200 { 201 int acpi_id, cpu_id; 202 ACPI_BUFFER buf; 203 ACPI_HANDLE handle; 204 ACPI_OBJECT *obj; 205 ACPI_STATUS status; 206 207 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR) 208 return (ENXIO); 209 210 handle = acpi_get_handle(dev); 211 if (cpu_softc == NULL) 212 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) * 213 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO); 214 215 /* Get our Processor object. */ 216 buf.Pointer = NULL; 217 buf.Length = ACPI_ALLOCATE_BUFFER; 218 status = AcpiEvaluateObject(handle, NULL, NULL, &buf); 219 if (ACPI_FAILURE(status)) { 220 device_printf(dev, "probe failed to get Processor obj - %s\n", 221 AcpiFormatException(status)); 222 return (ENXIO); 223 } 224 obj = (ACPI_OBJECT *)buf.Pointer; 225 if (obj->Type != ACPI_TYPE_PROCESSOR) { 226 device_printf(dev, "Processor object has bad type %d\n", obj->Type); 227 AcpiOsFree(obj); 228 return (ENXIO); 229 } 230 231 /* 232 * Find the processor associated with our unit. We could use the 233 * ProcId as a key, however, some boxes do not have the same values 234 * in their Processor object as the ProcId values in the MADT. 235 */ 236 acpi_id = obj->Processor.ProcId; 237 AcpiOsFree(obj); 238 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0) 239 return (ENXIO); 240 241 /* 242 * Check if we already probed this processor. We scan the bus twice 243 * so it's possible we've already seen this one. 244 */ 245 if (cpu_softc[cpu_id] != NULL) 246 return (ENXIO); 247 248 /* Mark this processor as in-use and save our derived id for attach. */ 249 cpu_softc[cpu_id] = (void *)1; 250 acpi_set_magic(dev, cpu_id); 251 device_set_desc(dev, "ACPI CPU"); 252 253 return (0); 254 } 255 256 static int 257 acpi_cpu_attach(device_t dev) 258 { 259 ACPI_BUFFER buf; 260 ACPI_OBJECT arg[4], *obj; 261 ACPI_OBJECT_LIST arglist; 262 struct pcpu *pcpu_data; 263 struct acpi_cpu_softc *sc; 264 struct acpi_softc *acpi_sc; 265 ACPI_STATUS status; 266 u_int features; 267 int cpu_id, drv_count, i; 268 driver_t **drivers; 269 uint32_t cap_set[3]; 270 271 /* UUID needed by _OSC evaluation */ 272 static uint8_t cpu_oscuuid[16] = { 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 273 0xBE, 0x47, 0x9E, 0xBD, 0xD8, 0x70, 274 0x58, 0x71, 0x39, 0x53 }; 275 276 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 277 278 sc = device_get_softc(dev); 279 sc->cpu_dev = dev; 280 sc->cpu_handle = acpi_get_handle(dev); 281 cpu_id = acpi_get_magic(dev); 282 cpu_softc[cpu_id] = sc; 283 pcpu_data = pcpu_find(cpu_id); 284 pcpu_data->pc_device = dev; 285 sc->cpu_pcpu = pcpu_data; 286 cpu_smi_cmd = AcpiGbl_FADT.SmiCommand; 287 cpu_cst_cnt = AcpiGbl_FADT.CstControl; 288 289 buf.Pointer = NULL; 290 buf.Length = ACPI_ALLOCATE_BUFFER; 291 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf); 292 if (ACPI_FAILURE(status)) { 293 device_printf(dev, "attach failed to get Processor obj - %s\n", 294 AcpiFormatException(status)); 295 return (ENXIO); 296 } 297 obj = (ACPI_OBJECT *)buf.Pointer; 298 sc->cpu_p_blk = obj->Processor.PblkAddress; 299 sc->cpu_p_blk_len = obj->Processor.PblkLength; 300 sc->cpu_acpi_id = obj->Processor.ProcId; 301 AcpiOsFree(obj); 302 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n", 303 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len)); 304 305 /* 306 * If this is the first cpu we attach, create and initialize the generic 307 * resources that will be used by all acpi cpu devices. 308 */ 309 if (device_get_unit(dev) == 0) { 310 /* Assume we won't be using generic Cx mode by default */ 311 cpu_cx_generic = FALSE; 312 313 /* Install hw.acpi.cpu sysctl tree */ 314 acpi_sc = acpi_device_get_parent_softc(dev); 315 sysctl_ctx_init(&cpu_sysctl_ctx); 316 cpu_sysctl_tree = SYSCTL_ADD_NODE(&cpu_sysctl_ctx, 317 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu", 318 CTLFLAG_RD, 0, "node for CPU children"); 319 320 /* Queue post cpu-probing task handler */ 321 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cpu_startup, NULL); 322 } 323 324 /* 325 * Before calling any CPU methods, collect child driver feature hints 326 * and notify ACPI of them. We support unified SMP power control 327 * so advertise this ourselves. Note this is not the same as independent 328 * SMP control where each CPU can have different settings. 329 */ 330 sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3; 331 if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) { 332 for (i = 0; i < drv_count; i++) { 333 if (ACPI_GET_FEATURES(drivers[i], &features) == 0) 334 sc->cpu_features |= features; 335 } 336 free(drivers, M_TEMP); 337 } 338 339 /* 340 * CPU capabilities are specified as a buffer of 32-bit integers: 341 * revision, count, and one or more capabilities. The revision of 342 * "1" is not specified anywhere but seems to match Linux. 343 */ 344 if (sc->cpu_features) { 345 arglist.Pointer = arg; 346 arglist.Count = 1; 347 arg[0].Type = ACPI_TYPE_BUFFER; 348 arg[0].Buffer.Length = sizeof(cap_set); 349 arg[0].Buffer.Pointer = (uint8_t *)cap_set; 350 cap_set[0] = 1; /* revision */ 351 cap_set[1] = 1; /* number of capabilities integers */ 352 cap_set[2] = sc->cpu_features; 353 AcpiEvaluateObject(sc->cpu_handle, "_PDC", &arglist, NULL); 354 355 /* 356 * On some systems we need to evaluate _OSC so that the ASL 357 * loads the _PSS and/or _PDC methods at runtime. 358 * 359 * TODO: evaluate failure of _OSC. 360 */ 361 arglist.Pointer = arg; 362 arglist.Count = 4; 363 arg[0].Type = ACPI_TYPE_BUFFER; 364 arg[0].Buffer.Length = sizeof(cpu_oscuuid); 365 arg[0].Buffer.Pointer = cpu_oscuuid; /* UUID */ 366 arg[1].Type = ACPI_TYPE_INTEGER; 367 arg[1].Integer.Value = 1; /* revision */ 368 arg[2].Type = ACPI_TYPE_INTEGER; 369 arg[2].Integer.Value = 1; /* count */ 370 arg[3].Type = ACPI_TYPE_BUFFER; 371 arg[3].Buffer.Length = sizeof(cap_set); /* Capabilities buffer */ 372 arg[3].Buffer.Pointer = (uint8_t *)cap_set; 373 cap_set[0] = 0; 374 AcpiEvaluateObject(sc->cpu_handle, "_OSC", &arglist, NULL); 375 } 376 377 /* Probe for Cx state support. */ 378 acpi_cpu_cx_probe(sc); 379 380 /* Finally, call identify and probe/attach for child devices. */ 381 bus_generic_probe(dev); 382 bus_generic_attach(dev); 383 384 return (0); 385 } 386 387 /* 388 * Disable any entry to the idle function during suspend and re-enable it 389 * during resume. 390 */ 391 static int 392 acpi_cpu_suspend(device_t dev) 393 { 394 int error; 395 396 error = bus_generic_suspend(dev); 397 if (error) 398 return (error); 399 cpu_disable_idle = TRUE; 400 return (0); 401 } 402 403 static int 404 acpi_cpu_resume(device_t dev) 405 { 406 407 cpu_disable_idle = FALSE; 408 return (bus_generic_resume(dev)); 409 } 410 411 /* 412 * Find the nth present CPU and return its pc_cpuid as well as set the 413 * pc_acpi_id from the most reliable source. 414 */ 415 static int 416 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id) 417 { 418 struct pcpu *pcpu_data; 419 uint32_t i; 420 421 KASSERT(acpi_id != NULL, ("Null acpi_id")); 422 KASSERT(cpu_id != NULL, ("Null cpu_id")); 423 for (i = 0; i <= mp_maxid; i++) { 424 if (CPU_ABSENT(i)) 425 continue; 426 pcpu_data = pcpu_find(i); 427 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i)); 428 if (idx-- == 0) { 429 /* 430 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box) 431 * override it with the value from the ASL. Otherwise, if the 432 * two don't match, prefer the MADT-derived value. Finally, 433 * return the pc_cpuid to reference this processor. 434 */ 435 if (pcpu_data->pc_acpi_id == 0xffffffff) 436 pcpu_data->pc_acpi_id = *acpi_id; 437 else if (pcpu_data->pc_acpi_id != *acpi_id) 438 *acpi_id = pcpu_data->pc_acpi_id; 439 *cpu_id = pcpu_data->pc_cpuid; 440 return (0); 441 } 442 } 443 444 return (ESRCH); 445 } 446 447 static struct resource_list * 448 acpi_cpu_get_rlist(device_t dev, device_t child) 449 { 450 struct acpi_cpu_device *ad; 451 452 ad = device_get_ivars(child); 453 if (ad == NULL) 454 return (NULL); 455 return (&ad->ad_rl); 456 } 457 458 static device_t 459 acpi_cpu_add_child(device_t dev, int order, const char *name, int unit) 460 { 461 struct acpi_cpu_device *ad; 462 device_t child; 463 464 if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL) 465 return (NULL); 466 467 resource_list_init(&ad->ad_rl); 468 469 child = device_add_child_ordered(dev, order, name, unit); 470 if (child != NULL) 471 device_set_ivars(child, ad); 472 else 473 free(ad, M_TEMP); 474 return (child); 475 } 476 477 static int 478 acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) 479 { 480 struct acpi_cpu_softc *sc; 481 482 sc = device_get_softc(dev); 483 switch (index) { 484 case ACPI_IVAR_HANDLE: 485 *result = (uintptr_t)sc->cpu_handle; 486 break; 487 case CPU_IVAR_PCPU: 488 *result = (uintptr_t)sc->cpu_pcpu; 489 break; 490 default: 491 return (ENOENT); 492 } 493 return (0); 494 } 495 496 static int 497 acpi_cpu_shutdown(device_t dev) 498 { 499 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 500 501 /* Allow children to shutdown first. */ 502 bus_generic_shutdown(dev); 503 504 /* Disable any entry to the idle function. */ 505 cpu_disable_idle = TRUE; 506 507 /* Signal and wait for all processors to exit acpi_cpu_idle(). */ 508 smp_rendezvous(NULL, NULL, NULL, NULL); 509 510 return_VALUE (0); 511 } 512 513 static void 514 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc) 515 { 516 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 517 518 /* Use initial sleep value of 1 sec. to start with lowest idle state. */ 519 sc->cpu_prev_sleep = 1000000; 520 sc->cpu_cx_lowest = 0; 521 522 /* 523 * Check for the ACPI 2.0 _CST sleep states object. If we can't find 524 * any, we'll revert to generic FADT/P_BLK Cx control method which will 525 * be handled by acpi_cpu_startup. We need to defer to after having 526 * probed all the cpus in the system before probing for generic Cx 527 * states as we may already have found cpus with valid _CST packages 528 */ 529 if (!cpu_cx_generic && acpi_cpu_cx_cst(sc) != 0) { 530 /* 531 * We were unable to find a _CST package for this cpu or there 532 * was an error parsing it. Switch back to generic mode. 533 */ 534 cpu_cx_generic = TRUE; 535 if (bootverbose) 536 device_printf(sc->cpu_dev, "switching to generic Cx mode\n"); 537 } 538 539 /* 540 * TODO: _CSD Package should be checked here. 541 */ 542 } 543 544 static void 545 acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc) 546 { 547 ACPI_GENERIC_ADDRESS gas; 548 struct acpi_cx *cx_ptr; 549 550 sc->cpu_cx_count = 0; 551 cx_ptr = sc->cpu_cx_states; 552 553 /* Use initial sleep value of 1 sec. to start with lowest idle state. */ 554 sc->cpu_prev_sleep = 1000000; 555 556 /* C1 has been required since just after ACPI 1.0 */ 557 cx_ptr->type = ACPI_STATE_C1; 558 cx_ptr->trans_lat = 0; 559 cx_ptr++; 560 sc->cpu_cx_count++; 561 562 /* 563 * The spec says P_BLK must be 6 bytes long. However, some systems 564 * use it to indicate a fractional set of features present so we 565 * take 5 as C2. Some may also have a value of 7 to indicate 566 * another C3 but most use _CST for this (as required) and having 567 * "only" C1-C3 is not a hardship. 568 */ 569 if (sc->cpu_p_blk_len < 5) 570 return; 571 572 /* Validate and allocate resources for C2 (P_LVL2). */ 573 gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 574 gas.BitWidth = 8; 575 if (AcpiGbl_FADT.C2Latency <= 100) { 576 gas.Address = sc->cpu_p_blk + 4; 577 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, 578 &gas, &cx_ptr->p_lvlx, RF_SHAREABLE); 579 if (cx_ptr->p_lvlx != NULL) { 580 sc->cpu_rid++; 581 cx_ptr->type = ACPI_STATE_C2; 582 cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency; 583 cx_ptr++; 584 sc->cpu_cx_count++; 585 } 586 } 587 if (sc->cpu_p_blk_len < 6) 588 return; 589 590 /* Validate and allocate resources for C3 (P_LVL3). */ 591 if (AcpiGbl_FADT.C3Latency <= 1000) { 592 gas.Address = sc->cpu_p_blk + 5; 593 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, &gas, 594 &cx_ptr->p_lvlx, RF_SHAREABLE); 595 if (cx_ptr->p_lvlx != NULL) { 596 sc->cpu_rid++; 597 cx_ptr->type = ACPI_STATE_C3; 598 cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency; 599 cx_ptr++; 600 sc->cpu_cx_count++; 601 } 602 } 603 604 /* Update the largest cx_count seen so far */ 605 if (sc->cpu_cx_count > cpu_cx_count) 606 cpu_cx_count = sc->cpu_cx_count; 607 } 608 609 /* 610 * Parse a _CST package and set up its Cx states. Since the _CST object 611 * can change dynamically, our notify handler may call this function 612 * to clean up and probe the new _CST package. 613 */ 614 static int 615 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc) 616 { 617 struct acpi_cx *cx_ptr; 618 ACPI_STATUS status; 619 ACPI_BUFFER buf; 620 ACPI_OBJECT *top; 621 ACPI_OBJECT *pkg; 622 uint32_t count; 623 int i; 624 625 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 626 627 buf.Pointer = NULL; 628 buf.Length = ACPI_ALLOCATE_BUFFER; 629 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf); 630 if (ACPI_FAILURE(status)) 631 return (ENXIO); 632 633 /* _CST is a package with a count and at least one Cx package. */ 634 top = (ACPI_OBJECT *)buf.Pointer; 635 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) { 636 device_printf(sc->cpu_dev, "invalid _CST package\n"); 637 AcpiOsFree(buf.Pointer); 638 return (ENXIO); 639 } 640 if (count != top->Package.Count - 1) { 641 device_printf(sc->cpu_dev, "invalid _CST state count (%d != %d)\n", 642 count, top->Package.Count - 1); 643 count = top->Package.Count - 1; 644 } 645 if (count > MAX_CX_STATES) { 646 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count); 647 count = MAX_CX_STATES; 648 } 649 650 /* Set up all valid states. */ 651 sc->cpu_cx_count = 0; 652 cx_ptr = sc->cpu_cx_states; 653 for (i = 0; i < count; i++) { 654 pkg = &top->Package.Elements[i + 1]; 655 if (!ACPI_PKG_VALID(pkg, 4) || 656 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 || 657 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 || 658 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) { 659 660 device_printf(sc->cpu_dev, "skipping invalid Cx state package\n"); 661 continue; 662 } 663 664 /* Validate the state to see if we should use it. */ 665 switch (cx_ptr->type) { 666 case ACPI_STATE_C1: 667 sc->cpu_non_c3 = i; 668 cx_ptr++; 669 sc->cpu_cx_count++; 670 continue; 671 case ACPI_STATE_C2: 672 if (cx_ptr->trans_lat > 100) { 673 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 674 "acpi_cpu%d: C2[%d] not available.\n", 675 device_get_unit(sc->cpu_dev), i)); 676 continue; 677 } 678 sc->cpu_non_c3 = i; 679 break; 680 case ACPI_STATE_C3: 681 default: 682 if (cx_ptr->trans_lat > 1000 || 683 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) { 684 685 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 686 "acpi_cpu%d: C3[%d] not available.\n", 687 device_get_unit(sc->cpu_dev), i)); 688 continue; 689 } 690 break; 691 } 692 693 #ifdef notyet 694 /* Free up any previous register. */ 695 if (cx_ptr->p_lvlx != NULL) { 696 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx); 697 cx_ptr->p_lvlx = NULL; 698 } 699 #endif 700 701 /* Allocate the control register for C2 or C3. */ 702 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &sc->cpu_rid, 703 &cx_ptr->p_lvlx, RF_SHAREABLE); 704 if (cx_ptr->p_lvlx) { 705 sc->cpu_rid++; 706 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 707 "acpi_cpu%d: Got C%d - %d latency\n", 708 device_get_unit(sc->cpu_dev), cx_ptr->type, 709 cx_ptr->trans_lat)); 710 cx_ptr++; 711 sc->cpu_cx_count++; 712 } 713 } 714 AcpiOsFree(buf.Pointer); 715 716 return (0); 717 } 718 719 /* 720 * Call this *after* all CPUs have been attached. 721 */ 722 static void 723 acpi_cpu_startup(void *arg) 724 { 725 struct acpi_cpu_softc *sc; 726 int i; 727 728 /* Get set of CPU devices */ 729 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices); 730 731 /* 732 * Setup any quirks that might necessary now that we have probed 733 * all the CPUs 734 */ 735 acpi_cpu_quirks(); 736 737 cpu_cx_count = 0; 738 if (cpu_cx_generic) { 739 /* 740 * We are using generic Cx mode, probe for available Cx states 741 * for all processors. 742 */ 743 for (i = 0; i < cpu_ndevices; i++) { 744 sc = device_get_softc(cpu_devices[i]); 745 acpi_cpu_generic_cx_probe(sc); 746 } 747 748 /* 749 * Find the highest Cx state common to all CPUs 750 * in the system, taking quirks into account. 751 */ 752 for (i = 0; i < cpu_ndevices; i++) { 753 sc = device_get_softc(cpu_devices[i]); 754 if (sc->cpu_cx_count < cpu_cx_count) 755 cpu_cx_count = sc->cpu_cx_count; 756 } 757 } else { 758 /* 759 * We are using _CST mode, remove C3 state if necessary. 760 * Update the largest Cx state supported in the global cpu_cx_count. 761 * It will be used in the global Cx sysctl handler. 762 * As we now know for sure that we will be using _CST mode 763 * install our notify handler. 764 */ 765 for (i = 0; i < cpu_ndevices; i++) { 766 sc = device_get_softc(cpu_devices[i]); 767 if (cpu_quirks && CPU_QUIRK_NO_C3) { 768 sc->cpu_cx_count = sc->cpu_non_c3 + 1; 769 } 770 if (sc->cpu_cx_count > cpu_cx_count) 771 cpu_cx_count = sc->cpu_cx_count; 772 AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY, 773 acpi_cpu_notify, sc); 774 } 775 } 776 777 /* Perform Cx final initialization. */ 778 for (i = 0; i < cpu_ndevices; i++) { 779 sc = device_get_softc(cpu_devices[i]); 780 acpi_cpu_startup_cx(sc); 781 } 782 783 /* Add a sysctl handler to handle global Cx lowest setting */ 784 SYSCTL_ADD_PROC(&cpu_sysctl_ctx, SYSCTL_CHILDREN(cpu_sysctl_tree), 785 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 786 NULL, 0, acpi_cpu_global_cx_lowest_sysctl, "A", 787 "Global lowest Cx sleep state to use"); 788 789 /* Take over idling from cpu_idle_default(). */ 790 cpu_cx_lowest = 0; 791 cpu_disable_idle = FALSE; 792 cpu_idle_hook = acpi_cpu_idle; 793 } 794 795 static void 796 acpi_cpu_startup_cx(struct acpi_cpu_softc *sc) 797 { 798 struct sbuf sb; 799 int i; 800 801 /* 802 * Set up the list of Cx states 803 */ 804 sc->cpu_non_c3 = 0; 805 sbuf_new(&sb, sc->cpu_cx_supported, sizeof(sc->cpu_cx_supported), 806 SBUF_FIXEDLEN); 807 for (i = 0; i < sc->cpu_cx_count; i++) { 808 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat); 809 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) 810 sc->cpu_non_c3 = i; 811 } 812 sbuf_trim(&sb); 813 sbuf_finish(&sb); 814 815 SYSCTL_ADD_STRING(&sc->cpu_sysctl_ctx, 816 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), 817 OID_AUTO, "cx_supported", CTLFLAG_RD, 818 sc->cpu_cx_supported, 0, 819 "Cx/microsecond values for supported Cx states"); 820 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx, 821 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), 822 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 823 (void *)sc, 0, acpi_cpu_cx_lowest_sysctl, "A", 824 "lowest Cx sleep state to use"); 825 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx, 826 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), 827 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD, 828 (void *)sc, 0, acpi_cpu_usage_sysctl, "A", 829 "percent usage for each Cx state"); 830 831 #ifdef notyet 832 /* Signal platform that we can handle _CST notification. */ 833 if (!cpu_cx_generic && cpu_cst_cnt != 0) { 834 ACPI_LOCK(acpi); 835 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8); 836 ACPI_UNLOCK(acpi); 837 } 838 #endif 839 } 840 841 /* 842 * Idle the CPU in the lowest state possible. This function is called with 843 * interrupts disabled. Note that once it re-enables interrupts, a task 844 * switch can occur so do not access shared data (i.e. the softc) after 845 * interrupts are re-enabled. 846 */ 847 static void 848 acpi_cpu_idle() 849 { 850 struct acpi_cpu_softc *sc; 851 struct acpi_cx *cx_next; 852 uint32_t start_time, end_time; 853 int bm_active, cx_next_idx, i; 854 855 /* If disabled, return immediately. */ 856 if (cpu_disable_idle) { 857 ACPI_ENABLE_IRQS(); 858 return; 859 } 860 861 /* 862 * Look up our CPU id to get our softc. If it's NULL, we'll use C1 863 * since there is no ACPI processor object for this CPU. This occurs 864 * for logical CPUs in the HTT case. 865 */ 866 sc = cpu_softc[PCPU_GET(cpuid)]; 867 if (sc == NULL) { 868 acpi_cpu_c1(); 869 return; 870 } 871 872 /* 873 * If we slept 100 us or more, use the lowest Cx state. Otherwise, 874 * find the lowest state that has a latency less than or equal to 875 * the length of our last sleep. 876 */ 877 cx_next_idx = sc->cpu_cx_lowest; 878 if (sc->cpu_prev_sleep < 100) { 879 /* 880 * If we sleep too short all the time, this system may not implement 881 * C2/3 correctly (i.e. reads return immediately). In this case, 882 * back off and use the next higher level. 883 * It seems that when you have a dual core cpu (like the Intel Core Duo) 884 * that both cores will get out of C3 state as soon as one of them 885 * requires it. This breaks the sleep detection logic as the sleep 886 * counter is local to each cpu. Disable the sleep logic for now as a 887 * workaround if there's more than one CPU. The right fix would probably 888 * be to add quirks for system that don't really support C3 state. 889 */ 890 if (mp_ncpus < 2 && sc->cpu_prev_sleep <= 1) { 891 sc->cpu_short_slp++; 892 if (sc->cpu_short_slp == 1000 && sc->cpu_cx_lowest != 0) { 893 if (sc->cpu_non_c3 == sc->cpu_cx_lowest && sc->cpu_non_c3 != 0) 894 sc->cpu_non_c3--; 895 sc->cpu_cx_lowest--; 896 sc->cpu_short_slp = 0; 897 device_printf(sc->cpu_dev, 898 "too many short sleeps, backing off to C%d\n", 899 sc->cpu_cx_lowest + 1); 900 } 901 } else 902 sc->cpu_short_slp = 0; 903 904 for (i = sc->cpu_cx_lowest; i >= 0; i--) 905 if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) { 906 cx_next_idx = i; 907 break; 908 } 909 } 910 911 /* 912 * Check for bus master activity. If there was activity, clear 913 * the bit and use the lowest non-C3 state. Note that the USB 914 * driver polling for new devices keeps this bit set all the 915 * time if USB is loaded. 916 */ 917 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 918 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active); 919 if (bm_active != 0) { 920 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1); 921 cx_next_idx = min(cx_next_idx, sc->cpu_non_c3); 922 } 923 } 924 925 /* Select the next state and update statistics. */ 926 cx_next = &sc->cpu_cx_states[cx_next_idx]; 927 sc->cpu_cx_stats[cx_next_idx]++; 928 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep")); 929 930 /* 931 * Execute HLT (or equivalent) and wait for an interrupt. We can't 932 * calculate the time spent in C1 since the place we wake up is an 933 * ISR. Assume we slept one quantum and return. 934 */ 935 if (cx_next->type == ACPI_STATE_C1) { 936 sc->cpu_prev_sleep = 1000000 / hz; 937 acpi_cpu_c1(); 938 return; 939 } 940 941 /* 942 * For C3, disable bus master arbitration and enable bus master wake 943 * if BM control is available, otherwise flush the CPU cache. 944 */ 945 if (cx_next->type == ACPI_STATE_C3) { 946 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 947 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1); 948 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1); 949 } else 950 ACPI_FLUSH_CPU_CACHE(); 951 } 952 953 /* 954 * Read from P_LVLx to enter C2(+), checking time spent asleep. 955 * Use the ACPI timer for measuring sleep time. Since we need to 956 * get the time very close to the CPU start/stop clock logic, this 957 * is the only reliable time source. 958 */ 959 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT.XPmTimerBlock); 960 CPU_GET_REG(cx_next->p_lvlx, 1); 961 962 /* 963 * Read the end time twice. Since it may take an arbitrary time 964 * to enter the idle state, the first read may be executed before 965 * the processor has stopped. Doing it again provides enough 966 * margin that we are certain to have a correct value. 967 */ 968 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT.XPmTimerBlock); 969 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT.XPmTimerBlock); 970 971 /* Enable bus master arbitration and disable bus master wakeup. */ 972 if (cx_next->type == ACPI_STATE_C3 && 973 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 974 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0); 975 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0); 976 } 977 ACPI_ENABLE_IRQS(); 978 979 /* Find the actual time asleep in microseconds, minus overhead. */ 980 end_time = acpi_TimerDelta(end_time, start_time); 981 sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat; 982 } 983 984 /* 985 * Re-evaluate the _CST object when we are notified that it changed. 986 * 987 * XXX Re-evaluation disabled until locking is done. 988 */ 989 static void 990 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context) 991 { 992 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context; 993 994 if (notify != ACPI_NOTIFY_CX_STATES) 995 return; 996 997 device_printf(sc->cpu_dev, "Cx states changed\n"); 998 /* acpi_cpu_cx_cst(sc); */ 999 } 1000 1001 static int 1002 acpi_cpu_quirks(void) 1003 { 1004 device_t acpi_dev; 1005 1006 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 1007 1008 /* 1009 * Bus mastering arbitration control is needed to keep caches coherent 1010 * while sleeping in C3. If it's not present but a working flush cache 1011 * instruction is present, flush the caches before entering C3 instead. 1012 * Otherwise, just disable C3 completely. 1013 */ 1014 if (AcpiGbl_FADT.Pm2ControlBlock == 0 || 1015 AcpiGbl_FADT.Pm2ControlLength == 0) { 1016 if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) && 1017 (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) { 1018 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 1019 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1020 "acpi_cpu: no BM control, using flush cache method\n")); 1021 } else { 1022 cpu_quirks |= CPU_QUIRK_NO_C3; 1023 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1024 "acpi_cpu: no BM control, C3 not available\n")); 1025 } 1026 } 1027 1028 /* 1029 * If we are using generic Cx mode, C3 on multiple CPUs requires using 1030 * the expensive flush cache instruction. 1031 */ 1032 if (cpu_cx_generic && mp_ncpus > 1) { 1033 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 1034 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1035 "acpi_cpu: SMP, using flush cache mode for C3\n")); 1036 } 1037 1038 /* Look for various quirks of the PIIX4 part. */ 1039 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3); 1040 if (acpi_dev != NULL) { 1041 switch (pci_get_revid(acpi_dev)) { 1042 /* 1043 * Disable C3 support for all PIIX4 chipsets. Some of these parts 1044 * do not report the BMIDE status to the BM status register and 1045 * others have a livelock bug if Type-F DMA is enabled. Linux 1046 * works around the BMIDE bug by reading the BM status directly 1047 * but we take the simpler approach of disabling C3 for these 1048 * parts. 1049 * 1050 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA 1051 * Livelock") from the January 2002 PIIX4 specification update. 1052 * Applies to all PIIX4 models. 1053 */ 1054 case PCI_REVISION_4E: 1055 case PCI_REVISION_4M: 1056 cpu_quirks |= CPU_QUIRK_NO_C3; 1057 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1058 "acpi_cpu: working around PIIX4 bug, disabling C3\n")); 1059 break; 1060 default: 1061 break; 1062 } 1063 } 1064 1065 return (0); 1066 } 1067 1068 static int 1069 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS) 1070 { 1071 struct acpi_cpu_softc *sc; 1072 struct sbuf sb; 1073 char buf[128]; 1074 int i; 1075 uintmax_t fract, sum, whole; 1076 1077 sc = (struct acpi_cpu_softc *) arg1; 1078 sum = 0; 1079 for (i = 0; i < sc->cpu_cx_count; i++) 1080 sum += sc->cpu_cx_stats[i]; 1081 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN); 1082 for (i = 0; i < sc->cpu_cx_count; i++) { 1083 if (sum > 0) { 1084 whole = (uintmax_t)sc->cpu_cx_stats[i] * 100; 1085 fract = (whole % sum) * 100; 1086 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum), 1087 (u_int)(fract / sum)); 1088 } else 1089 sbuf_printf(&sb, "0%% "); 1090 } 1091 sbuf_trim(&sb); 1092 sbuf_finish(&sb); 1093 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req); 1094 sbuf_delete(&sb); 1095 1096 return (0); 1097 } 1098 1099 static int 1100 acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val) 1101 { 1102 int i; 1103 1104 ACPI_SERIAL_ASSERT(cpu); 1105 sc->cpu_cx_lowest = val; 1106 1107 /* If not disabling, cache the new lowest non-C3 state. */ 1108 sc->cpu_non_c3 = 0; 1109 for (i = sc->cpu_cx_lowest; i >= 0; i--) { 1110 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) { 1111 sc->cpu_non_c3 = i; 1112 break; 1113 } 1114 } 1115 1116 /* Reset the statistics counters. */ 1117 bzero(sc->cpu_cx_stats, sizeof(sc->cpu_cx_stats)); 1118 return (0); 1119 } 1120 1121 static int 1122 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 1123 { 1124 struct acpi_cpu_softc *sc; 1125 char state[8]; 1126 int val, error; 1127 1128 sc = (struct acpi_cpu_softc *) arg1; 1129 snprintf(state, sizeof(state), "C%d", sc->cpu_cx_lowest + 1); 1130 error = sysctl_handle_string(oidp, state, sizeof(state), req); 1131 if (error != 0 || req->newptr == NULL) 1132 return (error); 1133 if (strlen(state) < 2 || toupper(state[0]) != 'C') 1134 return (EINVAL); 1135 val = (int) strtol(state + 1, NULL, 10) - 1; 1136 if (val < 0 || val > sc->cpu_cx_count - 1) 1137 return (EINVAL); 1138 1139 ACPI_SERIAL_BEGIN(cpu); 1140 acpi_cpu_set_cx_lowest(sc, val); 1141 ACPI_SERIAL_END(cpu); 1142 1143 return (0); 1144 } 1145 1146 static int 1147 acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 1148 { 1149 struct acpi_cpu_softc *sc; 1150 char state[8]; 1151 int val, error, i; 1152 1153 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1); 1154 error = sysctl_handle_string(oidp, state, sizeof(state), req); 1155 if (error != 0 || req->newptr == NULL) 1156 return (error); 1157 if (strlen(state) < 2 || toupper(state[0]) != 'C') 1158 return (EINVAL); 1159 val = (int) strtol(state + 1, NULL, 10) - 1; 1160 if (val < 0 || val > cpu_cx_count - 1) 1161 return (EINVAL); 1162 cpu_cx_lowest = val; 1163 1164 /* Update the new lowest useable Cx state for all CPUs. */ 1165 ACPI_SERIAL_BEGIN(cpu); 1166 for (i = 0; i < cpu_ndevices; i++) { 1167 sc = device_get_softc(cpu_devices[i]); 1168 acpi_cpu_set_cx_lowest(sc, val); 1169 } 1170 ACPI_SERIAL_END(cpu); 1171 1172 return (0); 1173 } 1174