1 /*- 2 * Copyright (c) 2003-2005 Nate Lawson (SDG) 3 * Copyright (c) 2001 Michael Smith 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include "opt_acpi.h" 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/cpu.h> 35 #include <sys/kernel.h> 36 #include <sys/malloc.h> 37 #include <sys/module.h> 38 #include <sys/pcpu.h> 39 #include <sys/power.h> 40 #include <sys/proc.h> 41 #include <sys/sbuf.h> 42 #include <sys/smp.h> 43 44 #include <dev/pci/pcivar.h> 45 #include <machine/atomic.h> 46 #include <machine/bus.h> 47 #include <sys/rman.h> 48 49 #include <contrib/dev/acpica/include/acpi.h> 50 #include <contrib/dev/acpica/include/accommon.h> 51 52 #include <dev/acpica/acpivar.h> 53 54 /* 55 * Support for ACPI Processor devices, including C[1-3] sleep states. 56 */ 57 58 /* Hooks for the ACPI CA debugging infrastructure */ 59 #define _COMPONENT ACPI_PROCESSOR 60 ACPI_MODULE_NAME("PROCESSOR") 61 62 struct acpi_cx { 63 struct resource *p_lvlx; /* Register to read to enter state. */ 64 uint32_t type; /* C1-3 (C4 and up treated as C3). */ 65 uint32_t trans_lat; /* Transition latency (usec). */ 66 uint32_t power; /* Power consumed (mW). */ 67 int res_type; /* Resource type for p_lvlx. */ 68 }; 69 #define MAX_CX_STATES 8 70 71 struct acpi_cpu_softc { 72 device_t cpu_dev; 73 ACPI_HANDLE cpu_handle; 74 struct pcpu *cpu_pcpu; 75 uint32_t cpu_acpi_id; /* ACPI processor id */ 76 uint32_t cpu_p_blk; /* ACPI P_BLK location */ 77 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */ 78 struct acpi_cx cpu_cx_states[MAX_CX_STATES]; 79 int cpu_cx_count; /* Number of valid Cx states. */ 80 int cpu_prev_sleep;/* Last idle sleep duration. */ 81 int cpu_features; /* Child driver supported features. */ 82 /* Runtime state. */ 83 int cpu_non_c3; /* Index of lowest non-C3 state. */ 84 u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */ 85 /* Values for sysctl. */ 86 struct sysctl_ctx_list cpu_sysctl_ctx; 87 struct sysctl_oid *cpu_sysctl_tree; 88 int cpu_cx_lowest; 89 char cpu_cx_supported[64]; 90 int cpu_rid; 91 }; 92 93 struct acpi_cpu_device { 94 struct resource_list ad_rl; 95 }; 96 97 #define CPU_GET_REG(reg, width) \ 98 (bus_space_read_ ## width(rman_get_bustag((reg)), \ 99 rman_get_bushandle((reg)), 0)) 100 #define CPU_SET_REG(reg, width, val) \ 101 (bus_space_write_ ## width(rman_get_bustag((reg)), \ 102 rman_get_bushandle((reg)), 0, (val))) 103 104 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */ 105 106 #define ACPI_NOTIFY_CX_STATES 0x81 /* _CST changed. */ 107 108 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */ 109 #define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */ 110 111 #define PCI_VENDOR_INTEL 0x8086 112 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */ 113 #define PCI_REVISION_A_STEP 0 114 #define PCI_REVISION_B_STEP 1 115 #define PCI_REVISION_4E 2 116 #define PCI_REVISION_4M 3 117 #define PIIX4_DEVACTB_REG 0x58 118 #define PIIX4_BRLD_EN_IRQ0 (1<<0) 119 #define PIIX4_BRLD_EN_IRQ (1<<1) 120 #define PIIX4_BRLD_EN_IRQ8 (1<<5) 121 #define PIIX4_STOP_BREAK_MASK (PIIX4_BRLD_EN_IRQ0 | PIIX4_BRLD_EN_IRQ | PIIX4_BRLD_EN_IRQ8) 122 #define PIIX4_PCNTRL_BST_EN (1<<10) 123 124 /* Platform hardware resource information. */ 125 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */ 126 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */ 127 static int cpu_quirks; /* Indicate any hardware bugs. */ 128 129 /* Runtime state. */ 130 static int cpu_disable_idle; /* Disable entry to idle function */ 131 static int cpu_cx_count; /* Number of valid Cx states */ 132 133 /* Values for sysctl. */ 134 static struct sysctl_ctx_list cpu_sysctl_ctx; 135 static struct sysctl_oid *cpu_sysctl_tree; 136 static int cpu_cx_generic; 137 static int cpu_cx_lowest; 138 139 static device_t *cpu_devices; 140 static int cpu_ndevices; 141 static struct acpi_cpu_softc **cpu_softc; 142 ACPI_SERIAL_DECL(cpu, "ACPI CPU"); 143 144 static int acpi_cpu_probe(device_t dev); 145 static int acpi_cpu_attach(device_t dev); 146 static int acpi_cpu_suspend(device_t dev); 147 static int acpi_cpu_resume(device_t dev); 148 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, 149 uint32_t *cpu_id); 150 static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child); 151 static device_t acpi_cpu_add_child(device_t dev, int order, const char *name, 152 int unit); 153 static int acpi_cpu_read_ivar(device_t dev, device_t child, int index, 154 uintptr_t *result); 155 static int acpi_cpu_shutdown(device_t dev); 156 static void acpi_cpu_cx_probe(struct acpi_cpu_softc *sc); 157 static void acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc); 158 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc); 159 static void acpi_cpu_startup(void *arg); 160 static void acpi_cpu_startup_cx(struct acpi_cpu_softc *sc); 161 static void acpi_cpu_cx_list(struct acpi_cpu_softc *sc); 162 static void acpi_cpu_idle(void); 163 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context); 164 static int acpi_cpu_quirks(void); 165 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS); 166 static int acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val); 167 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 168 static int acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 169 170 static device_method_t acpi_cpu_methods[] = { 171 /* Device interface */ 172 DEVMETHOD(device_probe, acpi_cpu_probe), 173 DEVMETHOD(device_attach, acpi_cpu_attach), 174 DEVMETHOD(device_detach, bus_generic_detach), 175 DEVMETHOD(device_shutdown, acpi_cpu_shutdown), 176 DEVMETHOD(device_suspend, acpi_cpu_suspend), 177 DEVMETHOD(device_resume, acpi_cpu_resume), 178 179 /* Bus interface */ 180 DEVMETHOD(bus_add_child, acpi_cpu_add_child), 181 DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar), 182 DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist), 183 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 184 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 185 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), 186 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), 187 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 188 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 189 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 190 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 191 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 192 193 {0, 0} 194 }; 195 196 static driver_t acpi_cpu_driver = { 197 "cpu", 198 acpi_cpu_methods, 199 sizeof(struct acpi_cpu_softc), 200 }; 201 202 static devclass_t acpi_cpu_devclass; 203 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0); 204 MODULE_DEPEND(cpu, acpi, 1, 1, 1); 205 206 static int 207 acpi_cpu_probe(device_t dev) 208 { 209 int acpi_id, cpu_id; 210 ACPI_BUFFER buf; 211 ACPI_HANDLE handle; 212 ACPI_OBJECT *obj; 213 ACPI_STATUS status; 214 215 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR) 216 return (ENXIO); 217 218 handle = acpi_get_handle(dev); 219 if (cpu_softc == NULL) 220 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) * 221 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO); 222 223 /* Get our Processor object. */ 224 buf.Pointer = NULL; 225 buf.Length = ACPI_ALLOCATE_BUFFER; 226 status = AcpiEvaluateObject(handle, NULL, NULL, &buf); 227 if (ACPI_FAILURE(status)) { 228 device_printf(dev, "probe failed to get Processor obj - %s\n", 229 AcpiFormatException(status)); 230 return (ENXIO); 231 } 232 obj = (ACPI_OBJECT *)buf.Pointer; 233 if (obj->Type != ACPI_TYPE_PROCESSOR) { 234 device_printf(dev, "Processor object has bad type %d\n", obj->Type); 235 AcpiOsFree(obj); 236 return (ENXIO); 237 } 238 239 /* 240 * Find the processor associated with our unit. We could use the 241 * ProcId as a key, however, some boxes do not have the same values 242 * in their Processor object as the ProcId values in the MADT. 243 */ 244 acpi_id = obj->Processor.ProcId; 245 AcpiOsFree(obj); 246 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0) 247 return (ENXIO); 248 249 /* 250 * Check if we already probed this processor. We scan the bus twice 251 * so it's possible we've already seen this one. 252 */ 253 if (cpu_softc[cpu_id] != NULL) 254 return (ENXIO); 255 256 /* Mark this processor as in-use and save our derived id for attach. */ 257 cpu_softc[cpu_id] = (void *)1; 258 acpi_set_private(dev, (void*)(intptr_t)cpu_id); 259 device_set_desc(dev, "ACPI CPU"); 260 261 return (0); 262 } 263 264 static int 265 acpi_cpu_attach(device_t dev) 266 { 267 ACPI_BUFFER buf; 268 ACPI_OBJECT arg[4], *obj; 269 ACPI_OBJECT_LIST arglist; 270 struct pcpu *pcpu_data; 271 struct acpi_cpu_softc *sc; 272 struct acpi_softc *acpi_sc; 273 ACPI_STATUS status; 274 u_int features; 275 int cpu_id, drv_count, i; 276 driver_t **drivers; 277 uint32_t cap_set[3]; 278 279 /* UUID needed by _OSC evaluation */ 280 static uint8_t cpu_oscuuid[16] = { 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 281 0xBE, 0x47, 0x9E, 0xBD, 0xD8, 0x70, 282 0x58, 0x71, 0x39, 0x53 }; 283 284 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 285 286 sc = device_get_softc(dev); 287 sc->cpu_dev = dev; 288 sc->cpu_handle = acpi_get_handle(dev); 289 cpu_id = (int)(intptr_t)acpi_get_private(dev); 290 cpu_softc[cpu_id] = sc; 291 pcpu_data = pcpu_find(cpu_id); 292 pcpu_data->pc_device = dev; 293 sc->cpu_pcpu = pcpu_data; 294 cpu_smi_cmd = AcpiGbl_FADT.SmiCommand; 295 cpu_cst_cnt = AcpiGbl_FADT.CstControl; 296 297 buf.Pointer = NULL; 298 buf.Length = ACPI_ALLOCATE_BUFFER; 299 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf); 300 if (ACPI_FAILURE(status)) { 301 device_printf(dev, "attach failed to get Processor obj - %s\n", 302 AcpiFormatException(status)); 303 return (ENXIO); 304 } 305 obj = (ACPI_OBJECT *)buf.Pointer; 306 sc->cpu_p_blk = obj->Processor.PblkAddress; 307 sc->cpu_p_blk_len = obj->Processor.PblkLength; 308 sc->cpu_acpi_id = obj->Processor.ProcId; 309 AcpiOsFree(obj); 310 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n", 311 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len)); 312 313 /* 314 * If this is the first cpu we attach, create and initialize the generic 315 * resources that will be used by all acpi cpu devices. 316 */ 317 if (device_get_unit(dev) == 0) { 318 /* Assume we won't be using generic Cx mode by default */ 319 cpu_cx_generic = FALSE; 320 321 /* Install hw.acpi.cpu sysctl tree */ 322 acpi_sc = acpi_device_get_parent_softc(dev); 323 sysctl_ctx_init(&cpu_sysctl_ctx); 324 cpu_sysctl_tree = SYSCTL_ADD_NODE(&cpu_sysctl_ctx, 325 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu", 326 CTLFLAG_RD, 0, "node for CPU children"); 327 328 /* Queue post cpu-probing task handler */ 329 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cpu_startup, NULL); 330 } 331 332 /* 333 * Before calling any CPU methods, collect child driver feature hints 334 * and notify ACPI of them. We support unified SMP power control 335 * so advertise this ourselves. Note this is not the same as independent 336 * SMP control where each CPU can have different settings. 337 */ 338 sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3; 339 if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) { 340 for (i = 0; i < drv_count; i++) { 341 if (ACPI_GET_FEATURES(drivers[i], &features) == 0) 342 sc->cpu_features |= features; 343 } 344 free(drivers, M_TEMP); 345 } 346 347 /* 348 * CPU capabilities are specified in 349 * Intel Processor Vendor-Specific ACPI Interface Specification. 350 */ 351 if (sc->cpu_features) { 352 arglist.Pointer = arg; 353 arglist.Count = 4; 354 arg[0].Type = ACPI_TYPE_BUFFER; 355 arg[0].Buffer.Length = sizeof(cpu_oscuuid); 356 arg[0].Buffer.Pointer = cpu_oscuuid; /* UUID */ 357 arg[1].Type = ACPI_TYPE_INTEGER; 358 arg[1].Integer.Value = 1; /* revision */ 359 arg[2].Type = ACPI_TYPE_INTEGER; 360 arg[2].Integer.Value = 1; /* count */ 361 arg[3].Type = ACPI_TYPE_BUFFER; 362 arg[3].Buffer.Length = sizeof(cap_set); /* Capabilities buffer */ 363 arg[3].Buffer.Pointer = (uint8_t *)cap_set; 364 cap_set[0] = 0; /* status */ 365 cap_set[1] = sc->cpu_features; 366 status = AcpiEvaluateObject(sc->cpu_handle, "_OSC", &arglist, NULL); 367 if (ACPI_SUCCESS(status)) { 368 if (cap_set[0] != 0) 369 device_printf(dev, "_OSC returned status %#x\n", cap_set[0]); 370 } 371 else { 372 arglist.Pointer = arg; 373 arglist.Count = 1; 374 arg[0].Type = ACPI_TYPE_BUFFER; 375 arg[0].Buffer.Length = sizeof(cap_set); 376 arg[0].Buffer.Pointer = (uint8_t *)cap_set; 377 cap_set[0] = 1; /* revision */ 378 cap_set[1] = 1; /* number of capabilities integers */ 379 cap_set[2] = sc->cpu_features; 380 AcpiEvaluateObject(sc->cpu_handle, "_PDC", &arglist, NULL); 381 } 382 } 383 384 /* Probe for Cx state support. */ 385 acpi_cpu_cx_probe(sc); 386 387 return (0); 388 } 389 390 static void 391 acpi_cpu_postattach(void *unused __unused) 392 { 393 device_t *devices; 394 int err; 395 int i, n; 396 397 err = devclass_get_devices(acpi_cpu_devclass, &devices, &n); 398 if (err != 0) { 399 printf("devclass_get_devices(acpi_cpu_devclass) failed\n"); 400 return; 401 } 402 for (i = 0; i < n; i++) 403 bus_generic_probe(devices[i]); 404 for (i = 0; i < n; i++) 405 bus_generic_attach(devices[i]); 406 free(devices, M_TEMP); 407 } 408 409 SYSINIT(acpi_cpu, SI_SUB_CONFIGURE, SI_ORDER_MIDDLE, 410 acpi_cpu_postattach, NULL); 411 412 /* 413 * Disable any entry to the idle function during suspend and re-enable it 414 * during resume. 415 */ 416 static int 417 acpi_cpu_suspend(device_t dev) 418 { 419 int error; 420 421 error = bus_generic_suspend(dev); 422 if (error) 423 return (error); 424 cpu_disable_idle = TRUE; 425 return (0); 426 } 427 428 static int 429 acpi_cpu_resume(device_t dev) 430 { 431 432 cpu_disable_idle = FALSE; 433 return (bus_generic_resume(dev)); 434 } 435 436 /* 437 * Find the nth present CPU and return its pc_cpuid as well as set the 438 * pc_acpi_id from the most reliable source. 439 */ 440 static int 441 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id) 442 { 443 struct pcpu *pcpu_data; 444 uint32_t i; 445 446 KASSERT(acpi_id != NULL, ("Null acpi_id")); 447 KASSERT(cpu_id != NULL, ("Null cpu_id")); 448 for (i = 0; i <= mp_maxid; i++) { 449 if (CPU_ABSENT(i)) 450 continue; 451 pcpu_data = pcpu_find(i); 452 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i)); 453 if (idx-- == 0) { 454 /* 455 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box) 456 * override it with the value from the ASL. Otherwise, if the 457 * two don't match, prefer the MADT-derived value. Finally, 458 * return the pc_cpuid to reference this processor. 459 */ 460 if (pcpu_data->pc_acpi_id == 0xffffffff) 461 pcpu_data->pc_acpi_id = *acpi_id; 462 else if (pcpu_data->pc_acpi_id != *acpi_id) 463 *acpi_id = pcpu_data->pc_acpi_id; 464 *cpu_id = pcpu_data->pc_cpuid; 465 return (0); 466 } 467 } 468 469 return (ESRCH); 470 } 471 472 static struct resource_list * 473 acpi_cpu_get_rlist(device_t dev, device_t child) 474 { 475 struct acpi_cpu_device *ad; 476 477 ad = device_get_ivars(child); 478 if (ad == NULL) 479 return (NULL); 480 return (&ad->ad_rl); 481 } 482 483 static device_t 484 acpi_cpu_add_child(device_t dev, int order, const char *name, int unit) 485 { 486 struct acpi_cpu_device *ad; 487 device_t child; 488 489 if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL) 490 return (NULL); 491 492 resource_list_init(&ad->ad_rl); 493 494 child = device_add_child_ordered(dev, order, name, unit); 495 if (child != NULL) 496 device_set_ivars(child, ad); 497 else 498 free(ad, M_TEMP); 499 return (child); 500 } 501 502 static int 503 acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) 504 { 505 struct acpi_cpu_softc *sc; 506 507 sc = device_get_softc(dev); 508 switch (index) { 509 case ACPI_IVAR_HANDLE: 510 *result = (uintptr_t)sc->cpu_handle; 511 break; 512 case CPU_IVAR_PCPU: 513 *result = (uintptr_t)sc->cpu_pcpu; 514 break; 515 default: 516 return (ENOENT); 517 } 518 return (0); 519 } 520 521 static int 522 acpi_cpu_shutdown(device_t dev) 523 { 524 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 525 526 /* Allow children to shutdown first. */ 527 bus_generic_shutdown(dev); 528 529 /* 530 * Disable any entry to the idle function. There is a small race where 531 * an idle thread have passed this check but not gone to sleep. This 532 * is ok since device_shutdown() does not free the softc, otherwise 533 * we'd have to be sure all threads were evicted before returning. 534 */ 535 cpu_disable_idle = TRUE; 536 537 return_VALUE (0); 538 } 539 540 static void 541 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc) 542 { 543 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 544 545 /* Use initial sleep value of 1 sec. to start with lowest idle state. */ 546 sc->cpu_prev_sleep = 1000000; 547 sc->cpu_cx_lowest = 0; 548 549 /* 550 * Check for the ACPI 2.0 _CST sleep states object. If we can't find 551 * any, we'll revert to generic FADT/P_BLK Cx control method which will 552 * be handled by acpi_cpu_startup. We need to defer to after having 553 * probed all the cpus in the system before probing for generic Cx 554 * states as we may already have found cpus with valid _CST packages 555 */ 556 if (!cpu_cx_generic && acpi_cpu_cx_cst(sc) != 0) { 557 /* 558 * We were unable to find a _CST package for this cpu or there 559 * was an error parsing it. Switch back to generic mode. 560 */ 561 cpu_cx_generic = TRUE; 562 if (bootverbose) 563 device_printf(sc->cpu_dev, "switching to generic Cx mode\n"); 564 } 565 566 /* 567 * TODO: _CSD Package should be checked here. 568 */ 569 } 570 571 static void 572 acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc) 573 { 574 ACPI_GENERIC_ADDRESS gas; 575 struct acpi_cx *cx_ptr; 576 577 sc->cpu_cx_count = 0; 578 cx_ptr = sc->cpu_cx_states; 579 580 /* Use initial sleep value of 1 sec. to start with lowest idle state. */ 581 sc->cpu_prev_sleep = 1000000; 582 583 /* C1 has been required since just after ACPI 1.0 */ 584 cx_ptr->type = ACPI_STATE_C1; 585 cx_ptr->trans_lat = 0; 586 cx_ptr++; 587 sc->cpu_cx_count++; 588 589 /* 590 * The spec says P_BLK must be 6 bytes long. However, some systems 591 * use it to indicate a fractional set of features present so we 592 * take 5 as C2. Some may also have a value of 7 to indicate 593 * another C3 but most use _CST for this (as required) and having 594 * "only" C1-C3 is not a hardship. 595 */ 596 if (sc->cpu_p_blk_len < 5) 597 return; 598 599 /* Validate and allocate resources for C2 (P_LVL2). */ 600 gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 601 gas.BitWidth = 8; 602 if (AcpiGbl_FADT.C2Latency <= 100) { 603 gas.Address = sc->cpu_p_blk + 4; 604 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, 605 &gas, &cx_ptr->p_lvlx, RF_SHAREABLE); 606 if (cx_ptr->p_lvlx != NULL) { 607 sc->cpu_rid++; 608 cx_ptr->type = ACPI_STATE_C2; 609 cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency; 610 cx_ptr++; 611 sc->cpu_cx_count++; 612 } 613 } 614 if (sc->cpu_p_blk_len < 6) 615 return; 616 617 /* Validate and allocate resources for C3 (P_LVL3). */ 618 if (AcpiGbl_FADT.C3Latency <= 1000 && !(cpu_quirks & CPU_QUIRK_NO_C3)) { 619 gas.Address = sc->cpu_p_blk + 5; 620 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, &gas, 621 &cx_ptr->p_lvlx, RF_SHAREABLE); 622 if (cx_ptr->p_lvlx != NULL) { 623 sc->cpu_rid++; 624 cx_ptr->type = ACPI_STATE_C3; 625 cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency; 626 cx_ptr++; 627 sc->cpu_cx_count++; 628 } 629 } 630 } 631 632 /* 633 * Parse a _CST package and set up its Cx states. Since the _CST object 634 * can change dynamically, our notify handler may call this function 635 * to clean up and probe the new _CST package. 636 */ 637 static int 638 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc) 639 { 640 struct acpi_cx *cx_ptr; 641 ACPI_STATUS status; 642 ACPI_BUFFER buf; 643 ACPI_OBJECT *top; 644 ACPI_OBJECT *pkg; 645 uint32_t count; 646 int i; 647 648 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 649 650 buf.Pointer = NULL; 651 buf.Length = ACPI_ALLOCATE_BUFFER; 652 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf); 653 if (ACPI_FAILURE(status)) 654 return (ENXIO); 655 656 /* _CST is a package with a count and at least one Cx package. */ 657 top = (ACPI_OBJECT *)buf.Pointer; 658 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) { 659 device_printf(sc->cpu_dev, "invalid _CST package\n"); 660 AcpiOsFree(buf.Pointer); 661 return (ENXIO); 662 } 663 if (count != top->Package.Count - 1) { 664 device_printf(sc->cpu_dev, "invalid _CST state count (%d != %d)\n", 665 count, top->Package.Count - 1); 666 count = top->Package.Count - 1; 667 } 668 if (count > MAX_CX_STATES) { 669 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count); 670 count = MAX_CX_STATES; 671 } 672 673 /* Set up all valid states. */ 674 sc->cpu_cx_count = 0; 675 cx_ptr = sc->cpu_cx_states; 676 for (i = 0; i < count; i++) { 677 pkg = &top->Package.Elements[i + 1]; 678 if (!ACPI_PKG_VALID(pkg, 4) || 679 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 || 680 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 || 681 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) { 682 683 device_printf(sc->cpu_dev, "skipping invalid Cx state package\n"); 684 continue; 685 } 686 687 /* Validate the state to see if we should use it. */ 688 switch (cx_ptr->type) { 689 case ACPI_STATE_C1: 690 sc->cpu_non_c3 = i; 691 cx_ptr++; 692 sc->cpu_cx_count++; 693 continue; 694 case ACPI_STATE_C2: 695 if (cx_ptr->trans_lat > 100) { 696 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 697 "acpi_cpu%d: C2[%d] not available.\n", 698 device_get_unit(sc->cpu_dev), i)); 699 continue; 700 } 701 sc->cpu_non_c3 = i; 702 break; 703 case ACPI_STATE_C3: 704 default: 705 if (cx_ptr->trans_lat > 1000 || 706 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) { 707 708 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 709 "acpi_cpu%d: C3[%d] not available.\n", 710 device_get_unit(sc->cpu_dev), i)); 711 continue; 712 } 713 break; 714 } 715 716 #ifdef notyet 717 /* Free up any previous register. */ 718 if (cx_ptr->p_lvlx != NULL) { 719 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx); 720 cx_ptr->p_lvlx = NULL; 721 } 722 #endif 723 724 /* Allocate the control register for C2 or C3. */ 725 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &sc->cpu_rid, 726 &cx_ptr->p_lvlx, RF_SHAREABLE); 727 if (cx_ptr->p_lvlx) { 728 sc->cpu_rid++; 729 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 730 "acpi_cpu%d: Got C%d - %d latency\n", 731 device_get_unit(sc->cpu_dev), cx_ptr->type, 732 cx_ptr->trans_lat)); 733 cx_ptr++; 734 sc->cpu_cx_count++; 735 } 736 } 737 AcpiOsFree(buf.Pointer); 738 739 return (0); 740 } 741 742 /* 743 * Call this *after* all CPUs have been attached. 744 */ 745 static void 746 acpi_cpu_startup(void *arg) 747 { 748 struct acpi_cpu_softc *sc; 749 int i; 750 751 /* Get set of CPU devices */ 752 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices); 753 754 /* 755 * Setup any quirks that might necessary now that we have probed 756 * all the CPUs 757 */ 758 acpi_cpu_quirks(); 759 760 cpu_cx_count = 0; 761 if (cpu_cx_generic) { 762 /* 763 * We are using generic Cx mode, probe for available Cx states 764 * for all processors. 765 */ 766 for (i = 0; i < cpu_ndevices; i++) { 767 sc = device_get_softc(cpu_devices[i]); 768 acpi_cpu_generic_cx_probe(sc); 769 if (sc->cpu_cx_count > cpu_cx_count) 770 cpu_cx_count = sc->cpu_cx_count; 771 } 772 773 /* 774 * Find the highest Cx state common to all CPUs 775 * in the system, taking quirks into account. 776 */ 777 for (i = 0; i < cpu_ndevices; i++) { 778 sc = device_get_softc(cpu_devices[i]); 779 if (sc->cpu_cx_count < cpu_cx_count) 780 cpu_cx_count = sc->cpu_cx_count; 781 } 782 } else { 783 /* 784 * We are using _CST mode, remove C3 state if necessary. 785 * Update the largest Cx state supported in the global cpu_cx_count. 786 * It will be used in the global Cx sysctl handler. 787 * As we now know for sure that we will be using _CST mode 788 * install our notify handler. 789 */ 790 for (i = 0; i < cpu_ndevices; i++) { 791 sc = device_get_softc(cpu_devices[i]); 792 if (cpu_quirks & CPU_QUIRK_NO_C3) { 793 sc->cpu_cx_count = sc->cpu_non_c3 + 1; 794 } 795 if (sc->cpu_cx_count > cpu_cx_count) 796 cpu_cx_count = sc->cpu_cx_count; 797 AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY, 798 acpi_cpu_notify, sc); 799 } 800 } 801 802 /* Perform Cx final initialization. */ 803 for (i = 0; i < cpu_ndevices; i++) { 804 sc = device_get_softc(cpu_devices[i]); 805 acpi_cpu_startup_cx(sc); 806 } 807 808 /* Add a sysctl handler to handle global Cx lowest setting */ 809 SYSCTL_ADD_PROC(&cpu_sysctl_ctx, SYSCTL_CHILDREN(cpu_sysctl_tree), 810 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 811 NULL, 0, acpi_cpu_global_cx_lowest_sysctl, "A", 812 "Global lowest Cx sleep state to use"); 813 814 /* Take over idling from cpu_idle_default(). */ 815 cpu_cx_lowest = 0; 816 cpu_disable_idle = FALSE; 817 cpu_idle_hook = acpi_cpu_idle; 818 } 819 820 static void 821 acpi_cpu_cx_list(struct acpi_cpu_softc *sc) 822 { 823 struct sbuf sb; 824 int i; 825 826 /* 827 * Set up the list of Cx states 828 */ 829 sc->cpu_non_c3 = 0; 830 sbuf_new(&sb, sc->cpu_cx_supported, sizeof(sc->cpu_cx_supported), 831 SBUF_FIXEDLEN); 832 for (i = 0; i < sc->cpu_cx_count; i++) { 833 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat); 834 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) 835 sc->cpu_non_c3 = i; 836 } 837 sbuf_trim(&sb); 838 sbuf_finish(&sb); 839 } 840 841 static void 842 acpi_cpu_startup_cx(struct acpi_cpu_softc *sc) 843 { 844 acpi_cpu_cx_list(sc); 845 846 SYSCTL_ADD_STRING(&sc->cpu_sysctl_ctx, 847 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), 848 OID_AUTO, "cx_supported", CTLFLAG_RD, 849 sc->cpu_cx_supported, 0, 850 "Cx/microsecond values for supported Cx states"); 851 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx, 852 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), 853 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 854 (void *)sc, 0, acpi_cpu_cx_lowest_sysctl, "A", 855 "lowest Cx sleep state to use"); 856 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx, 857 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), 858 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD, 859 (void *)sc, 0, acpi_cpu_usage_sysctl, "A", 860 "percent usage for each Cx state"); 861 862 #ifdef notyet 863 /* Signal platform that we can handle _CST notification. */ 864 if (!cpu_cx_generic && cpu_cst_cnt != 0) { 865 ACPI_LOCK(acpi); 866 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8); 867 ACPI_UNLOCK(acpi); 868 } 869 #endif 870 } 871 872 /* 873 * Idle the CPU in the lowest state possible. This function is called with 874 * interrupts disabled. Note that once it re-enables interrupts, a task 875 * switch can occur so do not access shared data (i.e. the softc) after 876 * interrupts are re-enabled. 877 */ 878 static void 879 acpi_cpu_idle() 880 { 881 struct acpi_cpu_softc *sc; 882 struct acpi_cx *cx_next; 883 uint32_t start_time, end_time; 884 int bm_active, cx_next_idx, i; 885 886 /* If disabled, return immediately. */ 887 if (cpu_disable_idle) { 888 ACPI_ENABLE_IRQS(); 889 return; 890 } 891 892 /* 893 * Look up our CPU id to get our softc. If it's NULL, we'll use C1 894 * since there is no ACPI processor object for this CPU. This occurs 895 * for logical CPUs in the HTT case. 896 */ 897 sc = cpu_softc[PCPU_GET(cpuid)]; 898 if (sc == NULL) { 899 acpi_cpu_c1(); 900 return; 901 } 902 903 /* Find the lowest state that has small enough latency. */ 904 cx_next_idx = 0; 905 for (i = sc->cpu_cx_lowest; i >= 0; i--) { 906 if (sc->cpu_cx_states[i].trans_lat * 3 <= sc->cpu_prev_sleep) { 907 cx_next_idx = i; 908 break; 909 } 910 } 911 912 /* 913 * Check for bus master activity. If there was activity, clear 914 * the bit and use the lowest non-C3 state. Note that the USB 915 * driver polling for new devices keeps this bit set all the 916 * time if USB is loaded. 917 */ 918 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 919 AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active); 920 if (bm_active != 0) { 921 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1); 922 cx_next_idx = min(cx_next_idx, sc->cpu_non_c3); 923 } 924 } 925 926 /* Select the next state and update statistics. */ 927 cx_next = &sc->cpu_cx_states[cx_next_idx]; 928 sc->cpu_cx_stats[cx_next_idx]++; 929 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep")); 930 931 /* 932 * Execute HLT (or equivalent) and wait for an interrupt. We can't 933 * calculate the time spent in C1 since the place we wake up is an 934 * ISR. Assume we slept half of quantum and return. 935 */ 936 if (cx_next->type == ACPI_STATE_C1) { 937 sc->cpu_prev_sleep = (sc->cpu_prev_sleep * 3 + 500000 / hz) / 4; 938 acpi_cpu_c1(); 939 return; 940 } 941 942 /* 943 * For C3, disable bus master arbitration and enable bus master wake 944 * if BM control is available, otherwise flush the CPU cache. 945 */ 946 if (cx_next->type == ACPI_STATE_C3) { 947 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 948 AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 1); 949 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 1); 950 } else 951 ACPI_FLUSH_CPU_CACHE(); 952 } 953 954 /* 955 * Read from P_LVLx to enter C2(+), checking time spent asleep. 956 * Use the ACPI timer for measuring sleep time. Since we need to 957 * get the time very close to the CPU start/stop clock logic, this 958 * is the only reliable time source. 959 */ 960 AcpiHwRead(&start_time, &AcpiGbl_FADT.XPmTimerBlock); 961 CPU_GET_REG(cx_next->p_lvlx, 1); 962 963 /* 964 * Read the end time twice. Since it may take an arbitrary time 965 * to enter the idle state, the first read may be executed before 966 * the processor has stopped. Doing it again provides enough 967 * margin that we are certain to have a correct value. 968 */ 969 AcpiHwRead(&end_time, &AcpiGbl_FADT.XPmTimerBlock); 970 AcpiHwRead(&end_time, &AcpiGbl_FADT.XPmTimerBlock); 971 972 /* Enable bus master arbitration and disable bus master wakeup. */ 973 if (cx_next->type == ACPI_STATE_C3 && 974 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 975 AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 0); 976 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0); 977 } 978 ACPI_ENABLE_IRQS(); 979 980 /* Find the actual time asleep in microseconds. */ 981 end_time = acpi_TimerDelta(end_time, start_time); 982 sc->cpu_prev_sleep = (sc->cpu_prev_sleep * 3 + PM_USEC(end_time)) / 4; 983 } 984 985 /* 986 * Re-evaluate the _CST object when we are notified that it changed. 987 * 988 * XXX Re-evaluation disabled until locking is done. 989 */ 990 static void 991 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context) 992 { 993 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context; 994 struct acpi_cpu_softc *isc; 995 int i; 996 997 if (notify != ACPI_NOTIFY_CX_STATES) 998 return; 999 1000 /* Update the list of Cx states. */ 1001 acpi_cpu_cx_cst(sc); 1002 acpi_cpu_cx_list(sc); 1003 1004 /* Update the new lowest useable Cx state for all CPUs. */ 1005 ACPI_SERIAL_BEGIN(cpu); 1006 cpu_cx_count = 0; 1007 for (i = 0; i < cpu_ndevices; i++) { 1008 isc = device_get_softc(cpu_devices[i]); 1009 if (isc->cpu_cx_count > cpu_cx_count) 1010 cpu_cx_count = isc->cpu_cx_count; 1011 } 1012 ACPI_SERIAL_END(cpu); 1013 } 1014 1015 static int 1016 acpi_cpu_quirks(void) 1017 { 1018 device_t acpi_dev; 1019 uint32_t val; 1020 1021 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 1022 1023 /* 1024 * Bus mastering arbitration control is needed to keep caches coherent 1025 * while sleeping in C3. If it's not present but a working flush cache 1026 * instruction is present, flush the caches before entering C3 instead. 1027 * Otherwise, just disable C3 completely. 1028 */ 1029 if (AcpiGbl_FADT.Pm2ControlBlock == 0 || 1030 AcpiGbl_FADT.Pm2ControlLength == 0) { 1031 if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) && 1032 (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) { 1033 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 1034 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1035 "acpi_cpu: no BM control, using flush cache method\n")); 1036 } else { 1037 cpu_quirks |= CPU_QUIRK_NO_C3; 1038 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1039 "acpi_cpu: no BM control, C3 not available\n")); 1040 } 1041 } 1042 1043 /* 1044 * If we are using generic Cx mode, C3 on multiple CPUs requires using 1045 * the expensive flush cache instruction. 1046 */ 1047 if (cpu_cx_generic && mp_ncpus > 1) { 1048 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 1049 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1050 "acpi_cpu: SMP, using flush cache mode for C3\n")); 1051 } 1052 1053 /* Look for various quirks of the PIIX4 part. */ 1054 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3); 1055 if (acpi_dev != NULL) { 1056 switch (pci_get_revid(acpi_dev)) { 1057 /* 1058 * Disable C3 support for all PIIX4 chipsets. Some of these parts 1059 * do not report the BMIDE status to the BM status register and 1060 * others have a livelock bug if Type-F DMA is enabled. Linux 1061 * works around the BMIDE bug by reading the BM status directly 1062 * but we take the simpler approach of disabling C3 for these 1063 * parts. 1064 * 1065 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA 1066 * Livelock") from the January 2002 PIIX4 specification update. 1067 * Applies to all PIIX4 models. 1068 * 1069 * Also, make sure that all interrupts cause a "Stop Break" 1070 * event to exit from C2 state. 1071 * Also, BRLD_EN_BM (ACPI_BITREG_BUS_MASTER_RLD in ACPI-speak) 1072 * should be set to zero, otherwise it causes C2 to short-sleep. 1073 * PIIX4 doesn't properly support C3 and bus master activity 1074 * need not break out of C2. 1075 */ 1076 case PCI_REVISION_A_STEP: 1077 case PCI_REVISION_B_STEP: 1078 case PCI_REVISION_4E: 1079 case PCI_REVISION_4M: 1080 cpu_quirks |= CPU_QUIRK_NO_C3; 1081 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1082 "acpi_cpu: working around PIIX4 bug, disabling C3\n")); 1083 1084 val = pci_read_config(acpi_dev, PIIX4_DEVACTB_REG, 4); 1085 if ((val & PIIX4_STOP_BREAK_MASK) != PIIX4_STOP_BREAK_MASK) { 1086 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1087 "acpi_cpu: PIIX4: enabling IRQs to generate Stop Break\n")); 1088 val |= PIIX4_STOP_BREAK_MASK; 1089 pci_write_config(acpi_dev, PIIX4_DEVACTB_REG, val, 4); 1090 } 1091 AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_RLD, &val); 1092 if (val) { 1093 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1094 "acpi_cpu: PIIX4: reset BRLD_EN_BM\n")); 1095 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0); 1096 } 1097 break; 1098 default: 1099 break; 1100 } 1101 } 1102 1103 return (0); 1104 } 1105 1106 static int 1107 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS) 1108 { 1109 struct acpi_cpu_softc *sc; 1110 struct sbuf sb; 1111 char buf[128]; 1112 int i; 1113 uintmax_t fract, sum, whole; 1114 1115 sc = (struct acpi_cpu_softc *) arg1; 1116 sum = 0; 1117 for (i = 0; i < sc->cpu_cx_count; i++) 1118 sum += sc->cpu_cx_stats[i]; 1119 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN); 1120 for (i = 0; i < sc->cpu_cx_count; i++) { 1121 if (sum > 0) { 1122 whole = (uintmax_t)sc->cpu_cx_stats[i] * 100; 1123 fract = (whole % sum) * 100; 1124 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum), 1125 (u_int)(fract / sum)); 1126 } else 1127 sbuf_printf(&sb, "0.00%% "); 1128 } 1129 sbuf_printf(&sb, "last %dus", sc->cpu_prev_sleep); 1130 sbuf_trim(&sb); 1131 sbuf_finish(&sb); 1132 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req); 1133 sbuf_delete(&sb); 1134 1135 return (0); 1136 } 1137 1138 static int 1139 acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val) 1140 { 1141 int i; 1142 1143 ACPI_SERIAL_ASSERT(cpu); 1144 sc->cpu_cx_lowest = val; 1145 1146 /* If not disabling, cache the new lowest non-C3 state. */ 1147 sc->cpu_non_c3 = 0; 1148 for (i = sc->cpu_cx_lowest; i >= 0; i--) { 1149 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) { 1150 sc->cpu_non_c3 = i; 1151 break; 1152 } 1153 } 1154 1155 /* Reset the statistics counters. */ 1156 bzero(sc->cpu_cx_stats, sizeof(sc->cpu_cx_stats)); 1157 return (0); 1158 } 1159 1160 static int 1161 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 1162 { 1163 struct acpi_cpu_softc *sc; 1164 char state[8]; 1165 int val, error; 1166 1167 sc = (struct acpi_cpu_softc *) arg1; 1168 snprintf(state, sizeof(state), "C%d", sc->cpu_cx_lowest + 1); 1169 error = sysctl_handle_string(oidp, state, sizeof(state), req); 1170 if (error != 0 || req->newptr == NULL) 1171 return (error); 1172 if (strlen(state) < 2 || toupper(state[0]) != 'C') 1173 return (EINVAL); 1174 val = (int) strtol(state + 1, NULL, 10) - 1; 1175 if (val < 0 || val > sc->cpu_cx_count - 1) 1176 return (EINVAL); 1177 1178 ACPI_SERIAL_BEGIN(cpu); 1179 acpi_cpu_set_cx_lowest(sc, val); 1180 ACPI_SERIAL_END(cpu); 1181 1182 return (0); 1183 } 1184 1185 static int 1186 acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 1187 { 1188 struct acpi_cpu_softc *sc; 1189 char state[8]; 1190 int val, error, i; 1191 1192 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1); 1193 error = sysctl_handle_string(oidp, state, sizeof(state), req); 1194 if (error != 0 || req->newptr == NULL) 1195 return (error); 1196 if (strlen(state) < 2 || toupper(state[0]) != 'C') 1197 return (EINVAL); 1198 val = (int) strtol(state + 1, NULL, 10) - 1; 1199 if (val < 0 || val > cpu_cx_count - 1) 1200 return (EINVAL); 1201 cpu_cx_lowest = val; 1202 1203 /* Update the new lowest useable Cx state for all CPUs. */ 1204 ACPI_SERIAL_BEGIN(cpu); 1205 for (i = 0; i < cpu_ndevices; i++) { 1206 sc = device_get_softc(cpu_devices[i]); 1207 acpi_cpu_set_cx_lowest(sc, val); 1208 } 1209 ACPI_SERIAL_END(cpu); 1210 1211 return (0); 1212 } 1213