1 /*- 2 * Copyright (c) 2003-2005 Nate Lawson (SDG) 3 * Copyright (c) 2001 Michael Smith 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include "opt_acpi.h" 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/cpu.h> 35 #include <sys/kernel.h> 36 #include <sys/malloc.h> 37 #include <sys/module.h> 38 #include <sys/pcpu.h> 39 #include <sys/power.h> 40 #include <sys/proc.h> 41 #include <sys/sbuf.h> 42 #include <sys/smp.h> 43 44 #include <dev/pci/pcivar.h> 45 #include <machine/atomic.h> 46 #include <machine/bus.h> 47 #include <sys/rman.h> 48 49 #include <contrib/dev/acpica/include/acpi.h> 50 #include <contrib/dev/acpica/include/accommon.h> 51 52 #include <dev/acpica/acpivar.h> 53 54 /* 55 * Support for ACPI Processor devices, including C[1-3] sleep states. 56 */ 57 58 /* Hooks for the ACPI CA debugging infrastructure */ 59 #define _COMPONENT ACPI_PROCESSOR 60 ACPI_MODULE_NAME("PROCESSOR") 61 62 struct acpi_cx { 63 struct resource *p_lvlx; /* Register to read to enter state. */ 64 uint32_t type; /* C1-3 (C4 and up treated as C3). */ 65 uint32_t trans_lat; /* Transition latency (usec). */ 66 uint32_t power; /* Power consumed (mW). */ 67 int res_type; /* Resource type for p_lvlx. */ 68 }; 69 #define MAX_CX_STATES 8 70 71 struct acpi_cpu_softc { 72 device_t cpu_dev; 73 ACPI_HANDLE cpu_handle; 74 struct pcpu *cpu_pcpu; 75 uint32_t cpu_acpi_id; /* ACPI processor id */ 76 uint32_t cpu_p_blk; /* ACPI P_BLK location */ 77 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */ 78 struct acpi_cx cpu_cx_states[MAX_CX_STATES]; 79 int cpu_cx_count; /* Number of valid Cx states. */ 80 int cpu_prev_sleep;/* Last idle sleep duration. */ 81 int cpu_features; /* Child driver supported features. */ 82 /* Runtime state. */ 83 int cpu_non_c3; /* Index of lowest non-C3 state. */ 84 u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */ 85 /* Values for sysctl. */ 86 struct sysctl_ctx_list cpu_sysctl_ctx; 87 struct sysctl_oid *cpu_sysctl_tree; 88 int cpu_cx_lowest; 89 char cpu_cx_supported[64]; 90 int cpu_rid; 91 }; 92 93 struct acpi_cpu_device { 94 struct resource_list ad_rl; 95 }; 96 97 #define CPU_GET_REG(reg, width) \ 98 (bus_space_read_ ## width(rman_get_bustag((reg)), \ 99 rman_get_bushandle((reg)), 0)) 100 #define CPU_SET_REG(reg, width, val) \ 101 (bus_space_write_ ## width(rman_get_bustag((reg)), \ 102 rman_get_bushandle((reg)), 0, (val))) 103 104 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */ 105 106 #define ACPI_NOTIFY_CX_STATES 0x81 /* _CST changed. */ 107 108 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */ 109 #define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */ 110 111 #define PCI_VENDOR_INTEL 0x8086 112 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */ 113 #define PCI_REVISION_A_STEP 0 114 #define PCI_REVISION_B_STEP 1 115 #define PCI_REVISION_4E 2 116 #define PCI_REVISION_4M 3 117 #define PIIX4_DEVACTB_REG 0x58 118 #define PIIX4_BRLD_EN_IRQ0 (1<<0) 119 #define PIIX4_BRLD_EN_IRQ (1<<1) 120 #define PIIX4_BRLD_EN_IRQ8 (1<<5) 121 #define PIIX4_STOP_BREAK_MASK (PIIX4_BRLD_EN_IRQ0 | PIIX4_BRLD_EN_IRQ | PIIX4_BRLD_EN_IRQ8) 122 #define PIIX4_PCNTRL_BST_EN (1<<10) 123 124 /* Platform hardware resource information. */ 125 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */ 126 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */ 127 static int cpu_quirks; /* Indicate any hardware bugs. */ 128 129 /* Runtime state. */ 130 static int cpu_disable_idle; /* Disable entry to idle function */ 131 static int cpu_cx_count; /* Number of valid Cx states */ 132 133 /* Values for sysctl. */ 134 static struct sysctl_ctx_list cpu_sysctl_ctx; 135 static struct sysctl_oid *cpu_sysctl_tree; 136 static int cpu_cx_generic; 137 static int cpu_cx_lowest; 138 139 static device_t *cpu_devices; 140 static int cpu_ndevices; 141 static struct acpi_cpu_softc **cpu_softc; 142 ACPI_SERIAL_DECL(cpu, "ACPI CPU"); 143 144 static int acpi_cpu_probe(device_t dev); 145 static int acpi_cpu_attach(device_t dev); 146 static int acpi_cpu_suspend(device_t dev); 147 static int acpi_cpu_resume(device_t dev); 148 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, 149 uint32_t *cpu_id); 150 static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child); 151 static device_t acpi_cpu_add_child(device_t dev, int order, const char *name, 152 int unit); 153 static int acpi_cpu_read_ivar(device_t dev, device_t child, int index, 154 uintptr_t *result); 155 static int acpi_cpu_shutdown(device_t dev); 156 static void acpi_cpu_cx_probe(struct acpi_cpu_softc *sc); 157 static void acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc); 158 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc); 159 static void acpi_cpu_startup(void *arg); 160 static void acpi_cpu_startup_cx(struct acpi_cpu_softc *sc); 161 static void acpi_cpu_cx_list(struct acpi_cpu_softc *sc); 162 static void acpi_cpu_idle(void); 163 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context); 164 static int acpi_cpu_quirks(void); 165 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS); 166 static int acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val); 167 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 168 static int acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 169 170 static device_method_t acpi_cpu_methods[] = { 171 /* Device interface */ 172 DEVMETHOD(device_probe, acpi_cpu_probe), 173 DEVMETHOD(device_attach, acpi_cpu_attach), 174 DEVMETHOD(device_detach, bus_generic_detach), 175 DEVMETHOD(device_shutdown, acpi_cpu_shutdown), 176 DEVMETHOD(device_suspend, acpi_cpu_suspend), 177 DEVMETHOD(device_resume, acpi_cpu_resume), 178 179 /* Bus interface */ 180 DEVMETHOD(bus_add_child, acpi_cpu_add_child), 181 DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar), 182 DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist), 183 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 184 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 185 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), 186 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), 187 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 188 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 189 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 190 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 191 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 192 193 {0, 0} 194 }; 195 196 static driver_t acpi_cpu_driver = { 197 "cpu", 198 acpi_cpu_methods, 199 sizeof(struct acpi_cpu_softc), 200 }; 201 202 static devclass_t acpi_cpu_devclass; 203 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0); 204 MODULE_DEPEND(cpu, acpi, 1, 1, 1); 205 206 static int 207 acpi_cpu_probe(device_t dev) 208 { 209 int acpi_id, cpu_id; 210 ACPI_BUFFER buf; 211 ACPI_HANDLE handle; 212 ACPI_OBJECT *obj; 213 ACPI_STATUS status; 214 215 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR) 216 return (ENXIO); 217 218 handle = acpi_get_handle(dev); 219 if (cpu_softc == NULL) 220 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) * 221 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO); 222 223 /* Get our Processor object. */ 224 buf.Pointer = NULL; 225 buf.Length = ACPI_ALLOCATE_BUFFER; 226 status = AcpiEvaluateObject(handle, NULL, NULL, &buf); 227 if (ACPI_FAILURE(status)) { 228 device_printf(dev, "probe failed to get Processor obj - %s\n", 229 AcpiFormatException(status)); 230 return (ENXIO); 231 } 232 obj = (ACPI_OBJECT *)buf.Pointer; 233 if (obj->Type != ACPI_TYPE_PROCESSOR) { 234 device_printf(dev, "Processor object has bad type %d\n", obj->Type); 235 AcpiOsFree(obj); 236 return (ENXIO); 237 } 238 239 /* 240 * Find the processor associated with our unit. We could use the 241 * ProcId as a key, however, some boxes do not have the same values 242 * in their Processor object as the ProcId values in the MADT. 243 */ 244 acpi_id = obj->Processor.ProcId; 245 AcpiOsFree(obj); 246 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0) 247 return (ENXIO); 248 249 /* 250 * Check if we already probed this processor. We scan the bus twice 251 * so it's possible we've already seen this one. 252 */ 253 if (cpu_softc[cpu_id] != NULL) 254 return (ENXIO); 255 256 /* Mark this processor as in-use and save our derived id for attach. */ 257 cpu_softc[cpu_id] = (void *)1; 258 acpi_set_magic(dev, cpu_id); 259 device_set_desc(dev, "ACPI CPU"); 260 261 return (0); 262 } 263 264 static int 265 acpi_cpu_attach(device_t dev) 266 { 267 ACPI_BUFFER buf; 268 ACPI_OBJECT arg[4], *obj; 269 ACPI_OBJECT_LIST arglist; 270 struct pcpu *pcpu_data; 271 struct acpi_cpu_softc *sc; 272 struct acpi_softc *acpi_sc; 273 ACPI_STATUS status; 274 u_int features; 275 int cpu_id, drv_count, i; 276 driver_t **drivers; 277 uint32_t cap_set[3]; 278 279 /* UUID needed by _OSC evaluation */ 280 static uint8_t cpu_oscuuid[16] = { 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 281 0xBE, 0x47, 0x9E, 0xBD, 0xD8, 0x70, 282 0x58, 0x71, 0x39, 0x53 }; 283 284 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 285 286 sc = device_get_softc(dev); 287 sc->cpu_dev = dev; 288 sc->cpu_handle = acpi_get_handle(dev); 289 cpu_id = acpi_get_magic(dev); 290 cpu_softc[cpu_id] = sc; 291 pcpu_data = pcpu_find(cpu_id); 292 pcpu_data->pc_device = dev; 293 sc->cpu_pcpu = pcpu_data; 294 cpu_smi_cmd = AcpiGbl_FADT.SmiCommand; 295 cpu_cst_cnt = AcpiGbl_FADT.CstControl; 296 297 buf.Pointer = NULL; 298 buf.Length = ACPI_ALLOCATE_BUFFER; 299 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf); 300 if (ACPI_FAILURE(status)) { 301 device_printf(dev, "attach failed to get Processor obj - %s\n", 302 AcpiFormatException(status)); 303 return (ENXIO); 304 } 305 obj = (ACPI_OBJECT *)buf.Pointer; 306 sc->cpu_p_blk = obj->Processor.PblkAddress; 307 sc->cpu_p_blk_len = obj->Processor.PblkLength; 308 sc->cpu_acpi_id = obj->Processor.ProcId; 309 AcpiOsFree(obj); 310 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n", 311 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len)); 312 313 /* 314 * If this is the first cpu we attach, create and initialize the generic 315 * resources that will be used by all acpi cpu devices. 316 */ 317 if (device_get_unit(dev) == 0) { 318 /* Assume we won't be using generic Cx mode by default */ 319 cpu_cx_generic = FALSE; 320 321 /* Install hw.acpi.cpu sysctl tree */ 322 acpi_sc = acpi_device_get_parent_softc(dev); 323 sysctl_ctx_init(&cpu_sysctl_ctx); 324 cpu_sysctl_tree = SYSCTL_ADD_NODE(&cpu_sysctl_ctx, 325 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu", 326 CTLFLAG_RD, 0, "node for CPU children"); 327 328 /* Queue post cpu-probing task handler */ 329 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cpu_startup, NULL); 330 } 331 332 /* 333 * Before calling any CPU methods, collect child driver feature hints 334 * and notify ACPI of them. We support unified SMP power control 335 * so advertise this ourselves. Note this is not the same as independent 336 * SMP control where each CPU can have different settings. 337 */ 338 sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3; 339 if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) { 340 for (i = 0; i < drv_count; i++) { 341 if (ACPI_GET_FEATURES(drivers[i], &features) == 0) 342 sc->cpu_features |= features; 343 } 344 free(drivers, M_TEMP); 345 } 346 347 /* 348 * CPU capabilities are specified as a buffer of 32-bit integers: 349 * revision, count, and one or more capabilities. The revision of 350 * "1" is not specified anywhere but seems to match Linux. 351 */ 352 if (sc->cpu_features) { 353 arglist.Pointer = arg; 354 arglist.Count = 1; 355 arg[0].Type = ACPI_TYPE_BUFFER; 356 arg[0].Buffer.Length = sizeof(cap_set); 357 arg[0].Buffer.Pointer = (uint8_t *)cap_set; 358 cap_set[0] = 1; /* revision */ 359 cap_set[1] = 1; /* number of capabilities integers */ 360 cap_set[2] = sc->cpu_features; 361 AcpiEvaluateObject(sc->cpu_handle, "_PDC", &arglist, NULL); 362 363 /* 364 * On some systems we need to evaluate _OSC so that the ASL 365 * loads the _PSS and/or _PDC methods at runtime. 366 * 367 * TODO: evaluate failure of _OSC. 368 */ 369 arglist.Pointer = arg; 370 arglist.Count = 4; 371 arg[0].Type = ACPI_TYPE_BUFFER; 372 arg[0].Buffer.Length = sizeof(cpu_oscuuid); 373 arg[0].Buffer.Pointer = cpu_oscuuid; /* UUID */ 374 arg[1].Type = ACPI_TYPE_INTEGER; 375 arg[1].Integer.Value = 1; /* revision */ 376 arg[2].Type = ACPI_TYPE_INTEGER; 377 arg[2].Integer.Value = 1; /* count */ 378 arg[3].Type = ACPI_TYPE_BUFFER; 379 arg[3].Buffer.Length = sizeof(cap_set); /* Capabilities buffer */ 380 arg[3].Buffer.Pointer = (uint8_t *)cap_set; 381 cap_set[0] = 0; 382 AcpiEvaluateObject(sc->cpu_handle, "_OSC", &arglist, NULL); 383 } 384 385 /* Probe for Cx state support. */ 386 acpi_cpu_cx_probe(sc); 387 388 /* Finally, call identify and probe/attach for child devices. */ 389 bus_generic_probe(dev); 390 bus_generic_attach(dev); 391 392 return (0); 393 } 394 395 /* 396 * Disable any entry to the idle function during suspend and re-enable it 397 * during resume. 398 */ 399 static int 400 acpi_cpu_suspend(device_t dev) 401 { 402 int error; 403 404 error = bus_generic_suspend(dev); 405 if (error) 406 return (error); 407 cpu_disable_idle = TRUE; 408 return (0); 409 } 410 411 static int 412 acpi_cpu_resume(device_t dev) 413 { 414 415 cpu_disable_idle = FALSE; 416 return (bus_generic_resume(dev)); 417 } 418 419 /* 420 * Find the nth present CPU and return its pc_cpuid as well as set the 421 * pc_acpi_id from the most reliable source. 422 */ 423 static int 424 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id) 425 { 426 struct pcpu *pcpu_data; 427 uint32_t i; 428 429 KASSERT(acpi_id != NULL, ("Null acpi_id")); 430 KASSERT(cpu_id != NULL, ("Null cpu_id")); 431 for (i = 0; i <= mp_maxid; i++) { 432 if (CPU_ABSENT(i)) 433 continue; 434 pcpu_data = pcpu_find(i); 435 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i)); 436 if (idx-- == 0) { 437 /* 438 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box) 439 * override it with the value from the ASL. Otherwise, if the 440 * two don't match, prefer the MADT-derived value. Finally, 441 * return the pc_cpuid to reference this processor. 442 */ 443 if (pcpu_data->pc_acpi_id == 0xffffffff) 444 pcpu_data->pc_acpi_id = *acpi_id; 445 else if (pcpu_data->pc_acpi_id != *acpi_id) 446 *acpi_id = pcpu_data->pc_acpi_id; 447 *cpu_id = pcpu_data->pc_cpuid; 448 return (0); 449 } 450 } 451 452 return (ESRCH); 453 } 454 455 static struct resource_list * 456 acpi_cpu_get_rlist(device_t dev, device_t child) 457 { 458 struct acpi_cpu_device *ad; 459 460 ad = device_get_ivars(child); 461 if (ad == NULL) 462 return (NULL); 463 return (&ad->ad_rl); 464 } 465 466 static device_t 467 acpi_cpu_add_child(device_t dev, int order, const char *name, int unit) 468 { 469 struct acpi_cpu_device *ad; 470 device_t child; 471 472 if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL) 473 return (NULL); 474 475 resource_list_init(&ad->ad_rl); 476 477 child = device_add_child_ordered(dev, order, name, unit); 478 if (child != NULL) 479 device_set_ivars(child, ad); 480 else 481 free(ad, M_TEMP); 482 return (child); 483 } 484 485 static int 486 acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) 487 { 488 struct acpi_cpu_softc *sc; 489 490 sc = device_get_softc(dev); 491 switch (index) { 492 case ACPI_IVAR_HANDLE: 493 *result = (uintptr_t)sc->cpu_handle; 494 break; 495 case CPU_IVAR_PCPU: 496 *result = (uintptr_t)sc->cpu_pcpu; 497 break; 498 default: 499 return (ENOENT); 500 } 501 return (0); 502 } 503 504 static int 505 acpi_cpu_shutdown(device_t dev) 506 { 507 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 508 509 /* Allow children to shutdown first. */ 510 bus_generic_shutdown(dev); 511 512 /* 513 * Disable any entry to the idle function. There is a small race where 514 * an idle thread have passed this check but not gone to sleep. This 515 * is ok since device_shutdown() does not free the softc, otherwise 516 * we'd have to be sure all threads were evicted before returning. 517 */ 518 cpu_disable_idle = TRUE; 519 520 return_VALUE (0); 521 } 522 523 static void 524 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc) 525 { 526 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 527 528 /* Use initial sleep value of 1 sec. to start with lowest idle state. */ 529 sc->cpu_prev_sleep = 1000000; 530 sc->cpu_cx_lowest = 0; 531 532 /* 533 * Check for the ACPI 2.0 _CST sleep states object. If we can't find 534 * any, we'll revert to generic FADT/P_BLK Cx control method which will 535 * be handled by acpi_cpu_startup. We need to defer to after having 536 * probed all the cpus in the system before probing for generic Cx 537 * states as we may already have found cpus with valid _CST packages 538 */ 539 if (!cpu_cx_generic && acpi_cpu_cx_cst(sc) != 0) { 540 /* 541 * We were unable to find a _CST package for this cpu or there 542 * was an error parsing it. Switch back to generic mode. 543 */ 544 cpu_cx_generic = TRUE; 545 if (bootverbose) 546 device_printf(sc->cpu_dev, "switching to generic Cx mode\n"); 547 } 548 549 /* 550 * TODO: _CSD Package should be checked here. 551 */ 552 } 553 554 static void 555 acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc) 556 { 557 ACPI_GENERIC_ADDRESS gas; 558 struct acpi_cx *cx_ptr; 559 560 sc->cpu_cx_count = 0; 561 cx_ptr = sc->cpu_cx_states; 562 563 /* Use initial sleep value of 1 sec. to start with lowest idle state. */ 564 sc->cpu_prev_sleep = 1000000; 565 566 /* C1 has been required since just after ACPI 1.0 */ 567 cx_ptr->type = ACPI_STATE_C1; 568 cx_ptr->trans_lat = 0; 569 cx_ptr++; 570 sc->cpu_cx_count++; 571 572 /* 573 * The spec says P_BLK must be 6 bytes long. However, some systems 574 * use it to indicate a fractional set of features present so we 575 * take 5 as C2. Some may also have a value of 7 to indicate 576 * another C3 but most use _CST for this (as required) and having 577 * "only" C1-C3 is not a hardship. 578 */ 579 if (sc->cpu_p_blk_len < 5) 580 return; 581 582 /* Validate and allocate resources for C2 (P_LVL2). */ 583 gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 584 gas.BitWidth = 8; 585 if (AcpiGbl_FADT.C2Latency <= 100) { 586 gas.Address = sc->cpu_p_blk + 4; 587 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, 588 &gas, &cx_ptr->p_lvlx, RF_SHAREABLE); 589 if (cx_ptr->p_lvlx != NULL) { 590 sc->cpu_rid++; 591 cx_ptr->type = ACPI_STATE_C2; 592 cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency; 593 cx_ptr++; 594 sc->cpu_cx_count++; 595 } 596 } 597 if (sc->cpu_p_blk_len < 6) 598 return; 599 600 /* Validate and allocate resources for C3 (P_LVL3). */ 601 if (AcpiGbl_FADT.C3Latency <= 1000 && !(cpu_quirks & CPU_QUIRK_NO_C3)) { 602 gas.Address = sc->cpu_p_blk + 5; 603 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, &gas, 604 &cx_ptr->p_lvlx, RF_SHAREABLE); 605 if (cx_ptr->p_lvlx != NULL) { 606 sc->cpu_rid++; 607 cx_ptr->type = ACPI_STATE_C3; 608 cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency; 609 cx_ptr++; 610 sc->cpu_cx_count++; 611 } 612 } 613 } 614 615 /* 616 * Parse a _CST package and set up its Cx states. Since the _CST object 617 * can change dynamically, our notify handler may call this function 618 * to clean up and probe the new _CST package. 619 */ 620 static int 621 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc) 622 { 623 struct acpi_cx *cx_ptr; 624 ACPI_STATUS status; 625 ACPI_BUFFER buf; 626 ACPI_OBJECT *top; 627 ACPI_OBJECT *pkg; 628 uint32_t count; 629 int i; 630 631 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 632 633 buf.Pointer = NULL; 634 buf.Length = ACPI_ALLOCATE_BUFFER; 635 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf); 636 if (ACPI_FAILURE(status)) 637 return (ENXIO); 638 639 /* _CST is a package with a count and at least one Cx package. */ 640 top = (ACPI_OBJECT *)buf.Pointer; 641 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) { 642 device_printf(sc->cpu_dev, "invalid _CST package\n"); 643 AcpiOsFree(buf.Pointer); 644 return (ENXIO); 645 } 646 if (count != top->Package.Count - 1) { 647 device_printf(sc->cpu_dev, "invalid _CST state count (%d != %d)\n", 648 count, top->Package.Count - 1); 649 count = top->Package.Count - 1; 650 } 651 if (count > MAX_CX_STATES) { 652 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count); 653 count = MAX_CX_STATES; 654 } 655 656 /* Set up all valid states. */ 657 sc->cpu_cx_count = 0; 658 cx_ptr = sc->cpu_cx_states; 659 for (i = 0; i < count; i++) { 660 pkg = &top->Package.Elements[i + 1]; 661 if (!ACPI_PKG_VALID(pkg, 4) || 662 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 || 663 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 || 664 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) { 665 666 device_printf(sc->cpu_dev, "skipping invalid Cx state package\n"); 667 continue; 668 } 669 670 /* Validate the state to see if we should use it. */ 671 switch (cx_ptr->type) { 672 case ACPI_STATE_C1: 673 sc->cpu_non_c3 = i; 674 cx_ptr++; 675 sc->cpu_cx_count++; 676 continue; 677 case ACPI_STATE_C2: 678 if (cx_ptr->trans_lat > 100) { 679 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 680 "acpi_cpu%d: C2[%d] not available.\n", 681 device_get_unit(sc->cpu_dev), i)); 682 continue; 683 } 684 sc->cpu_non_c3 = i; 685 break; 686 case ACPI_STATE_C3: 687 default: 688 if (cx_ptr->trans_lat > 1000 || 689 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) { 690 691 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 692 "acpi_cpu%d: C3[%d] not available.\n", 693 device_get_unit(sc->cpu_dev), i)); 694 continue; 695 } 696 break; 697 } 698 699 #ifdef notyet 700 /* Free up any previous register. */ 701 if (cx_ptr->p_lvlx != NULL) { 702 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx); 703 cx_ptr->p_lvlx = NULL; 704 } 705 #endif 706 707 /* Allocate the control register for C2 or C3. */ 708 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &sc->cpu_rid, 709 &cx_ptr->p_lvlx, RF_SHAREABLE); 710 if (cx_ptr->p_lvlx) { 711 sc->cpu_rid++; 712 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 713 "acpi_cpu%d: Got C%d - %d latency\n", 714 device_get_unit(sc->cpu_dev), cx_ptr->type, 715 cx_ptr->trans_lat)); 716 cx_ptr++; 717 sc->cpu_cx_count++; 718 } 719 } 720 AcpiOsFree(buf.Pointer); 721 722 return (0); 723 } 724 725 /* 726 * Call this *after* all CPUs have been attached. 727 */ 728 static void 729 acpi_cpu_startup(void *arg) 730 { 731 struct acpi_cpu_softc *sc; 732 int i; 733 734 /* Get set of CPU devices */ 735 newbus_slock(); 736 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices); 737 newbus_sunlock(); 738 739 /* 740 * Setup any quirks that might necessary now that we have probed 741 * all the CPUs 742 */ 743 acpi_cpu_quirks(); 744 745 cpu_cx_count = 0; 746 if (cpu_cx_generic) { 747 /* 748 * We are using generic Cx mode, probe for available Cx states 749 * for all processors. 750 */ 751 for (i = 0; i < cpu_ndevices; i++) { 752 sc = device_get_softc(cpu_devices[i]); 753 acpi_cpu_generic_cx_probe(sc); 754 if (sc->cpu_cx_count > cpu_cx_count) 755 cpu_cx_count = sc->cpu_cx_count; 756 } 757 758 /* 759 * Find the highest Cx state common to all CPUs 760 * in the system, taking quirks into account. 761 */ 762 for (i = 0; i < cpu_ndevices; i++) { 763 sc = device_get_softc(cpu_devices[i]); 764 if (sc->cpu_cx_count < cpu_cx_count) 765 cpu_cx_count = sc->cpu_cx_count; 766 } 767 } else { 768 /* 769 * We are using _CST mode, remove C3 state if necessary. 770 * Update the largest Cx state supported in the global cpu_cx_count. 771 * It will be used in the global Cx sysctl handler. 772 * As we now know for sure that we will be using _CST mode 773 * install our notify handler. 774 */ 775 for (i = 0; i < cpu_ndevices; i++) { 776 sc = device_get_softc(cpu_devices[i]); 777 if (cpu_quirks & CPU_QUIRK_NO_C3) { 778 sc->cpu_cx_count = sc->cpu_non_c3 + 1; 779 } 780 if (sc->cpu_cx_count > cpu_cx_count) 781 cpu_cx_count = sc->cpu_cx_count; 782 AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY, 783 acpi_cpu_notify, sc); 784 } 785 } 786 787 /* Perform Cx final initialization. */ 788 for (i = 0; i < cpu_ndevices; i++) { 789 sc = device_get_softc(cpu_devices[i]); 790 acpi_cpu_startup_cx(sc); 791 } 792 793 /* Add a sysctl handler to handle global Cx lowest setting */ 794 SYSCTL_ADD_PROC(&cpu_sysctl_ctx, SYSCTL_CHILDREN(cpu_sysctl_tree), 795 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 796 NULL, 0, acpi_cpu_global_cx_lowest_sysctl, "A", 797 "Global lowest Cx sleep state to use"); 798 799 /* Take over idling from cpu_idle_default(). */ 800 cpu_cx_lowest = 0; 801 cpu_disable_idle = FALSE; 802 cpu_idle_hook = acpi_cpu_idle; 803 } 804 805 static void 806 acpi_cpu_cx_list(struct acpi_cpu_softc *sc) 807 { 808 struct sbuf sb; 809 int i; 810 811 /* 812 * Set up the list of Cx states 813 */ 814 sc->cpu_non_c3 = 0; 815 sbuf_new(&sb, sc->cpu_cx_supported, sizeof(sc->cpu_cx_supported), 816 SBUF_FIXEDLEN); 817 for (i = 0; i < sc->cpu_cx_count; i++) { 818 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat); 819 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) 820 sc->cpu_non_c3 = i; 821 } 822 sbuf_trim(&sb); 823 sbuf_finish(&sb); 824 } 825 826 static void 827 acpi_cpu_startup_cx(struct acpi_cpu_softc *sc) 828 { 829 acpi_cpu_cx_list(sc); 830 831 SYSCTL_ADD_STRING(&sc->cpu_sysctl_ctx, 832 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), 833 OID_AUTO, "cx_supported", CTLFLAG_RD, 834 sc->cpu_cx_supported, 0, 835 "Cx/microsecond values for supported Cx states"); 836 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx, 837 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), 838 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 839 (void *)sc, 0, acpi_cpu_cx_lowest_sysctl, "A", 840 "lowest Cx sleep state to use"); 841 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx, 842 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), 843 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD, 844 (void *)sc, 0, acpi_cpu_usage_sysctl, "A", 845 "percent usage for each Cx state"); 846 847 #ifdef notyet 848 /* Signal platform that we can handle _CST notification. */ 849 if (!cpu_cx_generic && cpu_cst_cnt != 0) { 850 ACPI_LOCK(acpi); 851 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8); 852 ACPI_UNLOCK(acpi); 853 } 854 #endif 855 } 856 857 /* 858 * Idle the CPU in the lowest state possible. This function is called with 859 * interrupts disabled. Note that once it re-enables interrupts, a task 860 * switch can occur so do not access shared data (i.e. the softc) after 861 * interrupts are re-enabled. 862 */ 863 static void 864 acpi_cpu_idle() 865 { 866 struct acpi_cpu_softc *sc; 867 struct acpi_cx *cx_next; 868 uint32_t start_time, end_time; 869 int bm_active, cx_next_idx, i; 870 871 /* If disabled, return immediately. */ 872 if (cpu_disable_idle) { 873 ACPI_ENABLE_IRQS(); 874 return; 875 } 876 877 /* 878 * Look up our CPU id to get our softc. If it's NULL, we'll use C1 879 * since there is no ACPI processor object for this CPU. This occurs 880 * for logical CPUs in the HTT case. 881 */ 882 sc = cpu_softc[PCPU_GET(cpuid)]; 883 if (sc == NULL) { 884 acpi_cpu_c1(); 885 return; 886 } 887 888 /* Find the lowest state that has small enough latency. */ 889 cx_next_idx = 0; 890 for (i = sc->cpu_cx_lowest; i >= 0; i--) { 891 if (sc->cpu_cx_states[i].trans_lat * 3 <= sc->cpu_prev_sleep) { 892 cx_next_idx = i; 893 break; 894 } 895 } 896 897 /* 898 * Check for bus master activity. If there was activity, clear 899 * the bit and use the lowest non-C3 state. Note that the USB 900 * driver polling for new devices keeps this bit set all the 901 * time if USB is loaded. 902 */ 903 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 904 AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active); 905 if (bm_active != 0) { 906 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1); 907 cx_next_idx = min(cx_next_idx, sc->cpu_non_c3); 908 } 909 } 910 911 /* Select the next state and update statistics. */ 912 cx_next = &sc->cpu_cx_states[cx_next_idx]; 913 sc->cpu_cx_stats[cx_next_idx]++; 914 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep")); 915 916 /* 917 * Execute HLT (or equivalent) and wait for an interrupt. We can't 918 * calculate the time spent in C1 since the place we wake up is an 919 * ISR. Assume we slept half of quantum and return. 920 */ 921 if (cx_next->type == ACPI_STATE_C1) { 922 sc->cpu_prev_sleep = (sc->cpu_prev_sleep * 3 + 500000 / hz) / 4; 923 acpi_cpu_c1(); 924 return; 925 } 926 927 /* 928 * For C3, disable bus master arbitration and enable bus master wake 929 * if BM control is available, otherwise flush the CPU cache. 930 */ 931 if (cx_next->type == ACPI_STATE_C3) { 932 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 933 AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 1); 934 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 1); 935 } else 936 ACPI_FLUSH_CPU_CACHE(); 937 } 938 939 /* 940 * Read from P_LVLx to enter C2(+), checking time spent asleep. 941 * Use the ACPI timer for measuring sleep time. Since we need to 942 * get the time very close to the CPU start/stop clock logic, this 943 * is the only reliable time source. 944 */ 945 AcpiRead(&start_time, &AcpiGbl_FADT.XPmTimerBlock); 946 CPU_GET_REG(cx_next->p_lvlx, 1); 947 948 /* 949 * Read the end time twice. Since it may take an arbitrary time 950 * to enter the idle state, the first read may be executed before 951 * the processor has stopped. Doing it again provides enough 952 * margin that we are certain to have a correct value. 953 */ 954 AcpiRead(&end_time, &AcpiGbl_FADT.XPmTimerBlock); 955 AcpiRead(&end_time, &AcpiGbl_FADT.XPmTimerBlock); 956 957 /* Enable bus master arbitration and disable bus master wakeup. */ 958 if (cx_next->type == ACPI_STATE_C3 && 959 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 960 AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 0); 961 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0); 962 } 963 ACPI_ENABLE_IRQS(); 964 965 /* Find the actual time asleep in microseconds. */ 966 end_time = acpi_TimerDelta(end_time, start_time); 967 sc->cpu_prev_sleep = (sc->cpu_prev_sleep * 3 + PM_USEC(end_time)) / 4; 968 } 969 970 /* 971 * Re-evaluate the _CST object when we are notified that it changed. 972 * 973 * XXX Re-evaluation disabled until locking is done. 974 */ 975 static void 976 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context) 977 { 978 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context; 979 struct acpi_cpu_softc *isc; 980 int i; 981 982 if (notify != ACPI_NOTIFY_CX_STATES) 983 return; 984 985 /* Update the list of Cx states. */ 986 acpi_cpu_cx_cst(sc); 987 acpi_cpu_cx_list(sc); 988 989 /* Update the new lowest useable Cx state for all CPUs. */ 990 ACPI_SERIAL_BEGIN(cpu); 991 cpu_cx_count = 0; 992 for (i = 0; i < cpu_ndevices; i++) { 993 isc = device_get_softc(cpu_devices[i]); 994 if (isc->cpu_cx_count > cpu_cx_count) 995 cpu_cx_count = isc->cpu_cx_count; 996 } 997 ACPI_SERIAL_END(cpu); 998 } 999 1000 static int 1001 acpi_cpu_quirks(void) 1002 { 1003 device_t acpi_dev; 1004 uint32_t val; 1005 1006 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 1007 1008 /* 1009 * Bus mastering arbitration control is needed to keep caches coherent 1010 * while sleeping in C3. If it's not present but a working flush cache 1011 * instruction is present, flush the caches before entering C3 instead. 1012 * Otherwise, just disable C3 completely. 1013 */ 1014 if (AcpiGbl_FADT.Pm2ControlBlock == 0 || 1015 AcpiGbl_FADT.Pm2ControlLength == 0) { 1016 if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) && 1017 (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) { 1018 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 1019 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1020 "acpi_cpu: no BM control, using flush cache method\n")); 1021 } else { 1022 cpu_quirks |= CPU_QUIRK_NO_C3; 1023 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1024 "acpi_cpu: no BM control, C3 not available\n")); 1025 } 1026 } 1027 1028 /* 1029 * If we are using generic Cx mode, C3 on multiple CPUs requires using 1030 * the expensive flush cache instruction. 1031 */ 1032 if (cpu_cx_generic && mp_ncpus > 1) { 1033 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 1034 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1035 "acpi_cpu: SMP, using flush cache mode for C3\n")); 1036 } 1037 1038 /* Look for various quirks of the PIIX4 part. */ 1039 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3); 1040 if (acpi_dev != NULL) { 1041 switch (pci_get_revid(acpi_dev)) { 1042 /* 1043 * Disable C3 support for all PIIX4 chipsets. Some of these parts 1044 * do not report the BMIDE status to the BM status register and 1045 * others have a livelock bug if Type-F DMA is enabled. Linux 1046 * works around the BMIDE bug by reading the BM status directly 1047 * but we take the simpler approach of disabling C3 for these 1048 * parts. 1049 * 1050 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA 1051 * Livelock") from the January 2002 PIIX4 specification update. 1052 * Applies to all PIIX4 models. 1053 * 1054 * Also, make sure that all interrupts cause a "Stop Break" 1055 * event to exit from C2 state. 1056 * Also, BRLD_EN_BM (ACPI_BITREG_BUS_MASTER_RLD in ACPI-speak) 1057 * should be set to zero, otherwise it causes C2 to short-sleep. 1058 * PIIX4 doesn't properly support C3 and bus master activity 1059 * need not break out of C2. 1060 */ 1061 case PCI_REVISION_A_STEP: 1062 case PCI_REVISION_B_STEP: 1063 case PCI_REVISION_4E: 1064 case PCI_REVISION_4M: 1065 cpu_quirks |= CPU_QUIRK_NO_C3; 1066 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1067 "acpi_cpu: working around PIIX4 bug, disabling C3\n")); 1068 1069 val = pci_read_config(acpi_dev, PIIX4_DEVACTB_REG, 4); 1070 if ((val & PIIX4_STOP_BREAK_MASK) != PIIX4_STOP_BREAK_MASK) { 1071 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1072 "acpi_cpu: PIIX4: enabling IRQs to generate Stop Break\n")); 1073 val |= PIIX4_STOP_BREAK_MASK; 1074 pci_write_config(acpi_dev, PIIX4_DEVACTB_REG, val, 4); 1075 } 1076 AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_RLD, &val); 1077 if (val) { 1078 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1079 "acpi_cpu: PIIX4: reset BRLD_EN_BM\n")); 1080 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0); 1081 } 1082 break; 1083 default: 1084 break; 1085 } 1086 } 1087 1088 return (0); 1089 } 1090 1091 static int 1092 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS) 1093 { 1094 struct acpi_cpu_softc *sc; 1095 struct sbuf sb; 1096 char buf[128]; 1097 int i; 1098 uintmax_t fract, sum, whole; 1099 1100 sc = (struct acpi_cpu_softc *) arg1; 1101 sum = 0; 1102 for (i = 0; i < sc->cpu_cx_count; i++) 1103 sum += sc->cpu_cx_stats[i]; 1104 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN); 1105 for (i = 0; i < sc->cpu_cx_count; i++) { 1106 if (sum > 0) { 1107 whole = (uintmax_t)sc->cpu_cx_stats[i] * 100; 1108 fract = (whole % sum) * 100; 1109 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum), 1110 (u_int)(fract / sum)); 1111 } else 1112 sbuf_printf(&sb, "0.00%% "); 1113 } 1114 sbuf_printf(&sb, "last %dus", sc->cpu_prev_sleep); 1115 sbuf_trim(&sb); 1116 sbuf_finish(&sb); 1117 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req); 1118 sbuf_delete(&sb); 1119 1120 return (0); 1121 } 1122 1123 static int 1124 acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val) 1125 { 1126 int i; 1127 1128 ACPI_SERIAL_ASSERT(cpu); 1129 sc->cpu_cx_lowest = val; 1130 1131 /* If not disabling, cache the new lowest non-C3 state. */ 1132 sc->cpu_non_c3 = 0; 1133 for (i = sc->cpu_cx_lowest; i >= 0; i--) { 1134 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) { 1135 sc->cpu_non_c3 = i; 1136 break; 1137 } 1138 } 1139 1140 /* Reset the statistics counters. */ 1141 bzero(sc->cpu_cx_stats, sizeof(sc->cpu_cx_stats)); 1142 return (0); 1143 } 1144 1145 static int 1146 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 1147 { 1148 struct acpi_cpu_softc *sc; 1149 char state[8]; 1150 int val, error; 1151 1152 sc = (struct acpi_cpu_softc *) arg1; 1153 snprintf(state, sizeof(state), "C%d", sc->cpu_cx_lowest + 1); 1154 error = sysctl_handle_string(oidp, state, sizeof(state), req); 1155 if (error != 0 || req->newptr == NULL) 1156 return (error); 1157 if (strlen(state) < 2 || toupper(state[0]) != 'C') 1158 return (EINVAL); 1159 val = (int) strtol(state + 1, NULL, 10) - 1; 1160 if (val < 0 || val > sc->cpu_cx_count - 1) 1161 return (EINVAL); 1162 1163 ACPI_SERIAL_BEGIN(cpu); 1164 acpi_cpu_set_cx_lowest(sc, val); 1165 ACPI_SERIAL_END(cpu); 1166 1167 return (0); 1168 } 1169 1170 static int 1171 acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 1172 { 1173 struct acpi_cpu_softc *sc; 1174 char state[8]; 1175 int val, error, i; 1176 1177 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1); 1178 error = sysctl_handle_string(oidp, state, sizeof(state), req); 1179 if (error != 0 || req->newptr == NULL) 1180 return (error); 1181 if (strlen(state) < 2 || toupper(state[0]) != 'C') 1182 return (EINVAL); 1183 val = (int) strtol(state + 1, NULL, 10) - 1; 1184 if (val < 0 || val > cpu_cx_count - 1) 1185 return (EINVAL); 1186 cpu_cx_lowest = val; 1187 1188 /* Update the new lowest useable Cx state for all CPUs. */ 1189 ACPI_SERIAL_BEGIN(cpu); 1190 for (i = 0; i < cpu_ndevices; i++) { 1191 sc = device_get_softc(cpu_devices[i]); 1192 acpi_cpu_set_cx_lowest(sc, val); 1193 } 1194 ACPI_SERIAL_END(cpu); 1195 1196 return (0); 1197 } 1198