1 /*- 2 * Copyright (c) 2003-2005 Nate Lawson (SDG) 3 * Copyright (c) 2001 Michael Smith 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include "opt_acpi.h" 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/cpu.h> 35 #include <sys/kernel.h> 36 #include <sys/malloc.h> 37 #include <sys/module.h> 38 #include <sys/pcpu.h> 39 #include <sys/power.h> 40 #include <sys/proc.h> 41 #include <sys/sbuf.h> 42 #include <sys/smp.h> 43 44 #include <dev/pci/pcivar.h> 45 #include <machine/atomic.h> 46 #include <machine/bus.h> 47 #include <sys/rman.h> 48 49 #include <contrib/dev/acpica/acpi.h> 50 #include <dev/acpica/acpivar.h> 51 52 /* 53 * Support for ACPI Processor devices, including C[1-3] sleep states. 54 */ 55 56 /* Hooks for the ACPI CA debugging infrastructure */ 57 #define _COMPONENT ACPI_PROCESSOR 58 ACPI_MODULE_NAME("PROCESSOR") 59 60 struct acpi_cx { 61 struct resource *p_lvlx; /* Register to read to enter state. */ 62 uint32_t type; /* C1-3 (C4 and up treated as C3). */ 63 uint32_t trans_lat; /* Transition latency (usec). */ 64 uint32_t power; /* Power consumed (mW). */ 65 int res_type; /* Resource type for p_lvlx. */ 66 }; 67 #define MAX_CX_STATES 8 68 69 struct acpi_cpu_softc { 70 device_t cpu_dev; 71 ACPI_HANDLE cpu_handle; 72 struct pcpu *cpu_pcpu; 73 uint32_t cpu_acpi_id; /* ACPI processor id */ 74 uint32_t cpu_p_blk; /* ACPI P_BLK location */ 75 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */ 76 struct acpi_cx cpu_cx_states[MAX_CX_STATES]; 77 int cpu_cx_count; /* Number of valid Cx states. */ 78 int cpu_prev_sleep;/* Last idle sleep duration. */ 79 int cpu_features; /* Child driver supported features. */ 80 /* Runtime state. */ 81 int cpu_non_c3; /* Index of lowest non-C3 state. */ 82 int cpu_short_slp; /* Count of < 1us sleeps. */ 83 u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */ 84 /* Values for sysctl. */ 85 struct sysctl_ctx_list cpu_sysctl_ctx; 86 struct sysctl_oid *cpu_sysctl_tree; 87 int cpu_cx_lowest; 88 char cpu_cx_supported[64]; 89 int cpu_rid; 90 }; 91 92 struct acpi_cpu_device { 93 struct resource_list ad_rl; 94 }; 95 96 #define CPU_GET_REG(reg, width) \ 97 (bus_space_read_ ## width(rman_get_bustag((reg)), \ 98 rman_get_bushandle((reg)), 0)) 99 #define CPU_SET_REG(reg, width, val) \ 100 (bus_space_write_ ## width(rman_get_bustag((reg)), \ 101 rman_get_bushandle((reg)), 0, (val))) 102 103 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */ 104 105 #define ACPI_NOTIFY_CX_STATES 0x81 /* _CST changed. */ 106 107 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */ 108 #define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */ 109 110 #define PCI_VENDOR_INTEL 0x8086 111 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */ 112 #define PCI_REVISION_A_STEP 0 113 #define PCI_REVISION_B_STEP 1 114 #define PCI_REVISION_4E 2 115 #define PCI_REVISION_4M 3 116 117 /* Platform hardware resource information. */ 118 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */ 119 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */ 120 static int cpu_quirks; /* Indicate any hardware bugs. */ 121 122 /* Runtime state. */ 123 static int cpu_disable_idle; /* Disable entry to idle function */ 124 static int cpu_cx_count; /* Number of valid Cx states */ 125 126 /* Values for sysctl. */ 127 static struct sysctl_ctx_list cpu_sysctl_ctx; 128 static struct sysctl_oid *cpu_sysctl_tree; 129 static int cpu_cx_generic; 130 static int cpu_cx_lowest; 131 132 static device_t *cpu_devices; 133 static int cpu_ndevices; 134 static struct acpi_cpu_softc **cpu_softc; 135 ACPI_SERIAL_DECL(cpu, "ACPI CPU"); 136 137 static int acpi_cpu_probe(device_t dev); 138 static int acpi_cpu_attach(device_t dev); 139 static int acpi_cpu_suspend(device_t dev); 140 static int acpi_cpu_resume(device_t dev); 141 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, 142 uint32_t *cpu_id); 143 static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child); 144 static device_t acpi_cpu_add_child(device_t dev, int order, const char *name, 145 int unit); 146 static int acpi_cpu_read_ivar(device_t dev, device_t child, int index, 147 uintptr_t *result); 148 static int acpi_cpu_shutdown(device_t dev); 149 static void acpi_cpu_cx_probe(struct acpi_cpu_softc *sc); 150 static void acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc); 151 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc); 152 static void acpi_cpu_startup(void *arg); 153 static void acpi_cpu_startup_cx(struct acpi_cpu_softc *sc); 154 static void acpi_cpu_idle(void); 155 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context); 156 static int acpi_cpu_quirks(void); 157 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS); 158 static int acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val); 159 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 160 static int acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 161 162 static device_method_t acpi_cpu_methods[] = { 163 /* Device interface */ 164 DEVMETHOD(device_probe, acpi_cpu_probe), 165 DEVMETHOD(device_attach, acpi_cpu_attach), 166 DEVMETHOD(device_detach, bus_generic_detach), 167 DEVMETHOD(device_shutdown, acpi_cpu_shutdown), 168 DEVMETHOD(device_suspend, acpi_cpu_suspend), 169 DEVMETHOD(device_resume, acpi_cpu_resume), 170 171 /* Bus interface */ 172 DEVMETHOD(bus_add_child, acpi_cpu_add_child), 173 DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar), 174 DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist), 175 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 176 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 177 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), 178 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), 179 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 180 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 181 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 182 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 183 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 184 185 {0, 0} 186 }; 187 188 static driver_t acpi_cpu_driver = { 189 "cpu", 190 acpi_cpu_methods, 191 sizeof(struct acpi_cpu_softc), 192 }; 193 194 static devclass_t acpi_cpu_devclass; 195 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0); 196 MODULE_DEPEND(cpu, acpi, 1, 1, 1); 197 198 static int 199 acpi_cpu_probe(device_t dev) 200 { 201 int acpi_id, cpu_id; 202 ACPI_BUFFER buf; 203 ACPI_HANDLE handle; 204 ACPI_OBJECT *obj; 205 ACPI_STATUS status; 206 207 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR) 208 return (ENXIO); 209 210 handle = acpi_get_handle(dev); 211 if (cpu_softc == NULL) 212 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) * 213 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO); 214 215 /* Get our Processor object. */ 216 buf.Pointer = NULL; 217 buf.Length = ACPI_ALLOCATE_BUFFER; 218 status = AcpiEvaluateObject(handle, NULL, NULL, &buf); 219 if (ACPI_FAILURE(status)) { 220 device_printf(dev, "probe failed to get Processor obj - %s\n", 221 AcpiFormatException(status)); 222 return (ENXIO); 223 } 224 obj = (ACPI_OBJECT *)buf.Pointer; 225 if (obj->Type != ACPI_TYPE_PROCESSOR) { 226 device_printf(dev, "Processor object has bad type %d\n", obj->Type); 227 AcpiOsFree(obj); 228 return (ENXIO); 229 } 230 231 /* 232 * Find the processor associated with our unit. We could use the 233 * ProcId as a key, however, some boxes do not have the same values 234 * in their Processor object as the ProcId values in the MADT. 235 */ 236 acpi_id = obj->Processor.ProcId; 237 AcpiOsFree(obj); 238 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0) 239 return (ENXIO); 240 241 /* 242 * Check if we already probed this processor. We scan the bus twice 243 * so it's possible we've already seen this one. 244 */ 245 if (cpu_softc[cpu_id] != NULL) 246 return (ENXIO); 247 248 /* Mark this processor as in-use and save our derived id for attach. */ 249 cpu_softc[cpu_id] = (void *)1; 250 acpi_set_magic(dev, cpu_id); 251 device_set_desc(dev, "ACPI CPU"); 252 253 return (0); 254 } 255 256 static int 257 acpi_cpu_attach(device_t dev) 258 { 259 ACPI_BUFFER buf; 260 ACPI_OBJECT arg, *obj; 261 ACPI_OBJECT_LIST arglist; 262 struct pcpu *pcpu_data; 263 struct acpi_cpu_softc *sc; 264 struct acpi_softc *acpi_sc; 265 ACPI_STATUS status; 266 u_int features; 267 int cpu_id, drv_count, i; 268 driver_t **drivers; 269 uint32_t cap_set[3]; 270 271 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 272 273 sc = device_get_softc(dev); 274 sc->cpu_dev = dev; 275 sc->cpu_handle = acpi_get_handle(dev); 276 cpu_id = acpi_get_magic(dev); 277 cpu_softc[cpu_id] = sc; 278 pcpu_data = pcpu_find(cpu_id); 279 pcpu_data->pc_device = dev; 280 sc->cpu_pcpu = pcpu_data; 281 cpu_smi_cmd = AcpiGbl_FADT.SmiCommand; 282 cpu_cst_cnt = AcpiGbl_FADT.CstControl; 283 284 buf.Pointer = NULL; 285 buf.Length = ACPI_ALLOCATE_BUFFER; 286 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf); 287 if (ACPI_FAILURE(status)) { 288 device_printf(dev, "attach failed to get Processor obj - %s\n", 289 AcpiFormatException(status)); 290 return (ENXIO); 291 } 292 obj = (ACPI_OBJECT *)buf.Pointer; 293 sc->cpu_p_blk = obj->Processor.PblkAddress; 294 sc->cpu_p_blk_len = obj->Processor.PblkLength; 295 sc->cpu_acpi_id = obj->Processor.ProcId; 296 AcpiOsFree(obj); 297 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n", 298 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len)); 299 300 /* 301 * If this is the first cpu we attach, create and initialize the generic 302 * resources that will be used by all acpi cpu devices. 303 */ 304 if (device_get_unit(dev) == 0) { 305 /* Assume we won't be using generic Cx mode by default */ 306 cpu_cx_generic = FALSE; 307 308 /* Install hw.acpi.cpu sysctl tree */ 309 acpi_sc = acpi_device_get_parent_softc(dev); 310 sysctl_ctx_init(&cpu_sysctl_ctx); 311 cpu_sysctl_tree = SYSCTL_ADD_NODE(&cpu_sysctl_ctx, 312 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu", 313 CTLFLAG_RD, 0, "node for CPU children"); 314 315 /* Queue post cpu-probing task handler */ 316 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cpu_startup, NULL); 317 } 318 319 /* 320 * Before calling any CPU methods, collect child driver feature hints 321 * and notify ACPI of them. We support unified SMP power control 322 * so advertise this ourselves. Note this is not the same as independent 323 * SMP control where each CPU can have different settings. 324 */ 325 sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3; 326 if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) { 327 for (i = 0; i < drv_count; i++) { 328 if (ACPI_GET_FEATURES(drivers[i], &features) == 0) 329 sc->cpu_features |= features; 330 } 331 free(drivers, M_TEMP); 332 } 333 334 /* 335 * CPU capabilities are specified as a buffer of 32-bit integers: 336 * revision, count, and one or more capabilities. The revision of 337 * "1" is not specified anywhere but seems to match Linux. We should 338 * also support _OSC here. 339 */ 340 if (sc->cpu_features) { 341 arglist.Pointer = &arg; 342 arglist.Count = 1; 343 arg.Type = ACPI_TYPE_BUFFER; 344 arg.Buffer.Length = sizeof(cap_set); 345 arg.Buffer.Pointer = (uint8_t *)cap_set; 346 cap_set[0] = 1; /* revision */ 347 cap_set[1] = 1; /* number of capabilities integers */ 348 cap_set[2] = sc->cpu_features; 349 AcpiEvaluateObject(sc->cpu_handle, "_PDC", &arglist, NULL); 350 } 351 352 /* Probe for Cx state support. */ 353 acpi_cpu_cx_probe(sc); 354 355 /* Finally, call identify and probe/attach for child devices. */ 356 bus_generic_probe(dev); 357 bus_generic_attach(dev); 358 359 return (0); 360 } 361 362 /* 363 * Disable any entry to the idle function during suspend and re-enable it 364 * during resume. 365 */ 366 static int 367 acpi_cpu_suspend(device_t dev) 368 { 369 int error; 370 371 error = bus_generic_suspend(dev); 372 if (error) 373 return (error); 374 cpu_disable_idle = TRUE; 375 return (0); 376 } 377 378 static int 379 acpi_cpu_resume(device_t dev) 380 { 381 382 cpu_disable_idle = FALSE; 383 return (bus_generic_resume(dev)); 384 } 385 386 /* 387 * Find the nth present CPU and return its pc_cpuid as well as set the 388 * pc_acpi_id from the most reliable source. 389 */ 390 static int 391 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id) 392 { 393 struct pcpu *pcpu_data; 394 uint32_t i; 395 396 KASSERT(acpi_id != NULL, ("Null acpi_id")); 397 KASSERT(cpu_id != NULL, ("Null cpu_id")); 398 for (i = 0; i <= mp_maxid; i++) { 399 if (CPU_ABSENT(i)) 400 continue; 401 pcpu_data = pcpu_find(i); 402 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i)); 403 if (idx-- == 0) { 404 /* 405 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box) 406 * override it with the value from the ASL. Otherwise, if the 407 * two don't match, prefer the MADT-derived value. Finally, 408 * return the pc_cpuid to reference this processor. 409 */ 410 if (pcpu_data->pc_acpi_id == 0xffffffff) 411 pcpu_data->pc_acpi_id = *acpi_id; 412 else if (pcpu_data->pc_acpi_id != *acpi_id) 413 *acpi_id = pcpu_data->pc_acpi_id; 414 *cpu_id = pcpu_data->pc_cpuid; 415 return (0); 416 } 417 } 418 419 return (ESRCH); 420 } 421 422 static struct resource_list * 423 acpi_cpu_get_rlist(device_t dev, device_t child) 424 { 425 struct acpi_cpu_device *ad; 426 427 ad = device_get_ivars(child); 428 if (ad == NULL) 429 return (NULL); 430 return (&ad->ad_rl); 431 } 432 433 static device_t 434 acpi_cpu_add_child(device_t dev, int order, const char *name, int unit) 435 { 436 struct acpi_cpu_device *ad; 437 device_t child; 438 439 if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL) 440 return (NULL); 441 442 resource_list_init(&ad->ad_rl); 443 444 child = device_add_child_ordered(dev, order, name, unit); 445 if (child != NULL) 446 device_set_ivars(child, ad); 447 else 448 free(ad, M_TEMP); 449 return (child); 450 } 451 452 static int 453 acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) 454 { 455 struct acpi_cpu_softc *sc; 456 457 sc = device_get_softc(dev); 458 switch (index) { 459 case ACPI_IVAR_HANDLE: 460 *result = (uintptr_t)sc->cpu_handle; 461 break; 462 case CPU_IVAR_PCPU: 463 *result = (uintptr_t)sc->cpu_pcpu; 464 break; 465 default: 466 return (ENOENT); 467 } 468 return (0); 469 } 470 471 static int 472 acpi_cpu_shutdown(device_t dev) 473 { 474 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 475 476 /* Allow children to shutdown first. */ 477 bus_generic_shutdown(dev); 478 479 /* Disable any entry to the idle function. */ 480 cpu_disable_idle = TRUE; 481 482 /* Signal and wait for all processors to exit acpi_cpu_idle(). */ 483 smp_rendezvous(NULL, NULL, NULL, NULL); 484 485 return_VALUE (0); 486 } 487 488 static void 489 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc) 490 { 491 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 492 493 /* Use initial sleep value of 1 sec. to start with lowest idle state. */ 494 sc->cpu_prev_sleep = 1000000; 495 sc->cpu_cx_lowest = 0; 496 497 /* 498 * Check for the ACPI 2.0 _CST sleep states object. If we can't find 499 * any, we'll revert to generic FADT/P_BLK Cx control method which will 500 * be handled by acpi_cpu_startup. We need to defer to after having 501 * probed all the cpus in the system before probing for generic Cx 502 * states as we may already have found cpus with valid _CST packages 503 */ 504 if (!cpu_cx_generic && acpi_cpu_cx_cst(sc) != 0) { 505 /* 506 * We were unable to find a _CST package for this cpu or there 507 * was an error parsing it. Switch back to generic mode. 508 */ 509 cpu_cx_generic = TRUE; 510 if (bootverbose) 511 device_printf(sc->cpu_dev, "switching to generic Cx mode\n"); 512 } 513 514 /* 515 * TODO: _CSD Package should be checked here. 516 */ 517 } 518 519 static void 520 acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc) 521 { 522 ACPI_GENERIC_ADDRESS gas; 523 struct acpi_cx *cx_ptr; 524 525 sc->cpu_cx_count = 0; 526 cx_ptr = sc->cpu_cx_states; 527 528 /* Use initial sleep value of 1 sec. to start with lowest idle state. */ 529 sc->cpu_prev_sleep = 1000000; 530 531 /* C1 has been required since just after ACPI 1.0 */ 532 cx_ptr->type = ACPI_STATE_C1; 533 cx_ptr->trans_lat = 0; 534 cx_ptr++; 535 sc->cpu_cx_count++; 536 537 /* 538 * The spec says P_BLK must be 6 bytes long. However, some systems 539 * use it to indicate a fractional set of features present so we 540 * take 5 as C2. Some may also have a value of 7 to indicate 541 * another C3 but most use _CST for this (as required) and having 542 * "only" C1-C3 is not a hardship. 543 */ 544 if (sc->cpu_p_blk_len < 5) 545 return; 546 547 /* Validate and allocate resources for C2 (P_LVL2). */ 548 gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 549 gas.BitWidth = 8; 550 if (AcpiGbl_FADT.C2Latency <= 100) { 551 gas.Address = sc->cpu_p_blk + 4; 552 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, 553 &gas, &cx_ptr->p_lvlx, RF_SHAREABLE); 554 if (cx_ptr->p_lvlx != NULL) { 555 sc->cpu_rid++; 556 cx_ptr->type = ACPI_STATE_C2; 557 cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency; 558 cx_ptr++; 559 sc->cpu_cx_count++; 560 } 561 } 562 if (sc->cpu_p_blk_len < 6) 563 return; 564 565 /* Validate and allocate resources for C3 (P_LVL3). */ 566 if (AcpiGbl_FADT.C3Latency <= 1000) { 567 gas.Address = sc->cpu_p_blk + 5; 568 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, &gas, 569 &cx_ptr->p_lvlx, RF_SHAREABLE); 570 if (cx_ptr->p_lvlx != NULL) { 571 sc->cpu_rid++; 572 cx_ptr->type = ACPI_STATE_C3; 573 cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency; 574 cx_ptr++; 575 sc->cpu_cx_count++; 576 } 577 } 578 579 /* Update the largest cx_count seen so far */ 580 if (sc->cpu_cx_count > cpu_cx_count) 581 cpu_cx_count = sc->cpu_cx_count; 582 } 583 584 /* 585 * Parse a _CST package and set up its Cx states. Since the _CST object 586 * can change dynamically, our notify handler may call this function 587 * to clean up and probe the new _CST package. 588 */ 589 static int 590 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc) 591 { 592 struct acpi_cx *cx_ptr; 593 ACPI_STATUS status; 594 ACPI_BUFFER buf; 595 ACPI_OBJECT *top; 596 ACPI_OBJECT *pkg; 597 uint32_t count; 598 int i; 599 600 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 601 602 buf.Pointer = NULL; 603 buf.Length = ACPI_ALLOCATE_BUFFER; 604 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf); 605 if (ACPI_FAILURE(status)) 606 return (ENXIO); 607 608 /* _CST is a package with a count and at least one Cx package. */ 609 top = (ACPI_OBJECT *)buf.Pointer; 610 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) { 611 device_printf(sc->cpu_dev, "invalid _CST package\n"); 612 AcpiOsFree(buf.Pointer); 613 return (ENXIO); 614 } 615 if (count != top->Package.Count - 1) { 616 device_printf(sc->cpu_dev, "invalid _CST state count (%d != %d)\n", 617 count, top->Package.Count - 1); 618 count = top->Package.Count - 1; 619 } 620 if (count > MAX_CX_STATES) { 621 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count); 622 count = MAX_CX_STATES; 623 } 624 625 /* Set up all valid states. */ 626 sc->cpu_cx_count = 0; 627 cx_ptr = sc->cpu_cx_states; 628 for (i = 0; i < count; i++) { 629 pkg = &top->Package.Elements[i + 1]; 630 if (!ACPI_PKG_VALID(pkg, 4) || 631 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 || 632 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 || 633 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) { 634 635 device_printf(sc->cpu_dev, "skipping invalid Cx state package\n"); 636 continue; 637 } 638 639 /* Validate the state to see if we should use it. */ 640 switch (cx_ptr->type) { 641 case ACPI_STATE_C1: 642 sc->cpu_non_c3 = i; 643 cx_ptr++; 644 sc->cpu_cx_count++; 645 continue; 646 case ACPI_STATE_C2: 647 if (cx_ptr->trans_lat > 100) { 648 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 649 "acpi_cpu%d: C2[%d] not available.\n", 650 device_get_unit(sc->cpu_dev), i)); 651 continue; 652 } 653 sc->cpu_non_c3 = i; 654 break; 655 case ACPI_STATE_C3: 656 default: 657 if (cx_ptr->trans_lat > 1000 || 658 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) { 659 660 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 661 "acpi_cpu%d: C3[%d] not available.\n", 662 device_get_unit(sc->cpu_dev), i)); 663 continue; 664 } 665 break; 666 } 667 668 #ifdef notyet 669 /* Free up any previous register. */ 670 if (cx_ptr->p_lvlx != NULL) { 671 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx); 672 cx_ptr->p_lvlx = NULL; 673 } 674 #endif 675 676 /* Allocate the control register for C2 or C3. */ 677 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &sc->cpu_rid, 678 &cx_ptr->p_lvlx, RF_SHAREABLE); 679 if (cx_ptr->p_lvlx) { 680 sc->cpu_rid++; 681 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 682 "acpi_cpu%d: Got C%d - %d latency\n", 683 device_get_unit(sc->cpu_dev), cx_ptr->type, 684 cx_ptr->trans_lat)); 685 cx_ptr++; 686 sc->cpu_cx_count++; 687 } 688 } 689 AcpiOsFree(buf.Pointer); 690 691 return (0); 692 } 693 694 /* 695 * Call this *after* all CPUs have been attached. 696 */ 697 static void 698 acpi_cpu_startup(void *arg) 699 { 700 struct acpi_cpu_softc *sc; 701 int i; 702 703 /* Get set of CPU devices */ 704 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices); 705 706 /* 707 * Setup any quirks that might necessary now that we have probed 708 * all the CPUs 709 */ 710 acpi_cpu_quirks(); 711 712 cpu_cx_count = 0; 713 if (cpu_cx_generic) { 714 /* 715 * We are using generic Cx mode, probe for available Cx states 716 * for all processors. 717 */ 718 for (i = 0; i < cpu_ndevices; i++) { 719 sc = device_get_softc(cpu_devices[i]); 720 acpi_cpu_generic_cx_probe(sc); 721 } 722 723 /* 724 * Find the highest Cx state common to all CPUs 725 * in the system, taking quirks into account. 726 */ 727 for (i = 0; i < cpu_ndevices; i++) { 728 sc = device_get_softc(cpu_devices[i]); 729 if (sc->cpu_cx_count < cpu_cx_count) 730 cpu_cx_count = sc->cpu_cx_count; 731 } 732 } else { 733 /* 734 * We are using _CST mode, remove C3 state if necessary. 735 * Update the largest Cx state supported in the global cpu_cx_count. 736 * It will be used in the global Cx sysctl handler. 737 * As we now know for sure that we will be using _CST mode 738 * install our notify handler. 739 */ 740 for (i = 0; i < cpu_ndevices; i++) { 741 sc = device_get_softc(cpu_devices[i]); 742 if (cpu_quirks && CPU_QUIRK_NO_C3) { 743 sc->cpu_cx_count = sc->cpu_non_c3 + 1; 744 } 745 if (sc->cpu_cx_count > cpu_cx_count) 746 cpu_cx_count = sc->cpu_cx_count; 747 AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY, 748 acpi_cpu_notify, sc); 749 } 750 } 751 752 /* Perform Cx final initialization. */ 753 for (i = 0; i < cpu_ndevices; i++) { 754 sc = device_get_softc(cpu_devices[i]); 755 acpi_cpu_startup_cx(sc); 756 } 757 758 /* Add a sysctl handler to handle global Cx lowest setting */ 759 SYSCTL_ADD_PROC(&cpu_sysctl_ctx, SYSCTL_CHILDREN(cpu_sysctl_tree), 760 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 761 NULL, 0, acpi_cpu_global_cx_lowest_sysctl, "A", 762 "Global lowest Cx sleep state to use"); 763 764 /* Take over idling from cpu_idle_default(). */ 765 cpu_cx_lowest = 0; 766 cpu_disable_idle = FALSE; 767 cpu_idle_hook = acpi_cpu_idle; 768 } 769 770 static void 771 acpi_cpu_startup_cx(struct acpi_cpu_softc *sc) 772 { 773 struct sbuf sb; 774 int i; 775 776 /* 777 * Set up the list of Cx states 778 */ 779 sc->cpu_non_c3 = 0; 780 sbuf_new(&sb, sc->cpu_cx_supported, sizeof(sc->cpu_cx_supported), 781 SBUF_FIXEDLEN); 782 for (i = 0; i < sc->cpu_cx_count; i++) { 783 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat); 784 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) 785 sc->cpu_non_c3 = i; 786 } 787 sbuf_trim(&sb); 788 sbuf_finish(&sb); 789 790 SYSCTL_ADD_STRING(&sc->cpu_sysctl_ctx, 791 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), 792 OID_AUTO, "cx_supported", CTLFLAG_RD, 793 sc->cpu_cx_supported, 0, 794 "Cx/microsecond values for supported Cx states"); 795 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx, 796 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), 797 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 798 (void *)sc, 0, acpi_cpu_cx_lowest_sysctl, "A", 799 "lowest Cx sleep state to use"); 800 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx, 801 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), 802 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD, 803 (void *)sc, 0, acpi_cpu_usage_sysctl, "A", 804 "percent usage for each Cx state"); 805 806 #ifdef notyet 807 /* Signal platform that we can handle _CST notification. */ 808 if (!cpu_cx_generic && cpu_cst_cnt != 0) { 809 ACPI_LOCK(acpi); 810 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8); 811 ACPI_UNLOCK(acpi); 812 } 813 #endif 814 } 815 816 /* 817 * Idle the CPU in the lowest state possible. This function is called with 818 * interrupts disabled. Note that once it re-enables interrupts, a task 819 * switch can occur so do not access shared data (i.e. the softc) after 820 * interrupts are re-enabled. 821 */ 822 static void 823 acpi_cpu_idle() 824 { 825 struct acpi_cpu_softc *sc; 826 struct acpi_cx *cx_next; 827 uint32_t start_time, end_time; 828 int bm_active, cx_next_idx, i; 829 830 /* If disabled, return immediately. */ 831 if (cpu_disable_idle) { 832 ACPI_ENABLE_IRQS(); 833 return; 834 } 835 836 /* 837 * Look up our CPU id to get our softc. If it's NULL, we'll use C1 838 * since there is no ACPI processor object for this CPU. This occurs 839 * for logical CPUs in the HTT case. 840 */ 841 sc = cpu_softc[PCPU_GET(cpuid)]; 842 if (sc == NULL) { 843 acpi_cpu_c1(); 844 return; 845 } 846 847 /* 848 * If we slept 100 us or more, use the lowest Cx state. Otherwise, 849 * find the lowest state that has a latency less than or equal to 850 * the length of our last sleep. 851 */ 852 cx_next_idx = sc->cpu_cx_lowest; 853 if (sc->cpu_prev_sleep < 100) { 854 /* 855 * If we sleep too short all the time, this system may not implement 856 * C2/3 correctly (i.e. reads return immediately). In this case, 857 * back off and use the next higher level. 858 * It seems that when you have a dual core cpu (like the Intel Core Duo) 859 * that both cores will get out of C3 state as soon as one of them 860 * requires it. This breaks the sleep detection logic as the sleep 861 * counter is local to each cpu. Disable the sleep logic for now as a 862 * workaround if there's more than one CPU. The right fix would probably 863 * be to add quirks for system that don't really support C3 state. 864 */ 865 if (mp_ncpus < 2 && sc->cpu_prev_sleep <= 1) { 866 sc->cpu_short_slp++; 867 if (sc->cpu_short_slp == 1000 && sc->cpu_cx_lowest != 0) { 868 if (sc->cpu_non_c3 == sc->cpu_cx_lowest && sc->cpu_non_c3 != 0) 869 sc->cpu_non_c3--; 870 sc->cpu_cx_lowest--; 871 sc->cpu_short_slp = 0; 872 device_printf(sc->cpu_dev, 873 "too many short sleeps, backing off to C%d\n", 874 sc->cpu_cx_lowest + 1); 875 } 876 } else 877 sc->cpu_short_slp = 0; 878 879 for (i = sc->cpu_cx_lowest; i >= 0; i--) 880 if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) { 881 cx_next_idx = i; 882 break; 883 } 884 } 885 886 /* 887 * Check for bus master activity. If there was activity, clear 888 * the bit and use the lowest non-C3 state. Note that the USB 889 * driver polling for new devices keeps this bit set all the 890 * time if USB is loaded. 891 */ 892 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 893 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active); 894 if (bm_active != 0) { 895 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1); 896 cx_next_idx = min(cx_next_idx, sc->cpu_non_c3); 897 } 898 } 899 900 /* Select the next state and update statistics. */ 901 cx_next = &sc->cpu_cx_states[cx_next_idx]; 902 sc->cpu_cx_stats[cx_next_idx]++; 903 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep")); 904 905 /* 906 * Execute HLT (or equivalent) and wait for an interrupt. We can't 907 * calculate the time spent in C1 since the place we wake up is an 908 * ISR. Assume we slept one quantum and return. 909 */ 910 if (cx_next->type == ACPI_STATE_C1) { 911 sc->cpu_prev_sleep = 1000000 / hz; 912 acpi_cpu_c1(); 913 return; 914 } 915 916 /* 917 * For C3, disable bus master arbitration and enable bus master wake 918 * if BM control is available, otherwise flush the CPU cache. 919 */ 920 if (cx_next->type == ACPI_STATE_C3) { 921 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 922 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1); 923 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1); 924 } else 925 ACPI_FLUSH_CPU_CACHE(); 926 } 927 928 /* 929 * Read from P_LVLx to enter C2(+), checking time spent asleep. 930 * Use the ACPI timer for measuring sleep time. Since we need to 931 * get the time very close to the CPU start/stop clock logic, this 932 * is the only reliable time source. 933 */ 934 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT.XPmTimerBlock); 935 CPU_GET_REG(cx_next->p_lvlx, 1); 936 937 /* 938 * Read the end time twice. Since it may take an arbitrary time 939 * to enter the idle state, the first read may be executed before 940 * the processor has stopped. Doing it again provides enough 941 * margin that we are certain to have a correct value. 942 */ 943 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT.XPmTimerBlock); 944 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT.XPmTimerBlock); 945 946 /* Enable bus master arbitration and disable bus master wakeup. */ 947 if (cx_next->type == ACPI_STATE_C3 && 948 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 949 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0); 950 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0); 951 } 952 ACPI_ENABLE_IRQS(); 953 954 /* Find the actual time asleep in microseconds, minus overhead. */ 955 end_time = acpi_TimerDelta(end_time, start_time); 956 sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat; 957 } 958 959 /* 960 * Re-evaluate the _CST object when we are notified that it changed. 961 * 962 * XXX Re-evaluation disabled until locking is done. 963 */ 964 static void 965 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context) 966 { 967 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context; 968 969 if (notify != ACPI_NOTIFY_CX_STATES) 970 return; 971 972 device_printf(sc->cpu_dev, "Cx states changed\n"); 973 /* acpi_cpu_cx_cst(sc); */ 974 } 975 976 static int 977 acpi_cpu_quirks(void) 978 { 979 device_t acpi_dev; 980 981 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 982 983 /* 984 * Bus mastering arbitration control is needed to keep caches coherent 985 * while sleeping in C3. If it's not present but a working flush cache 986 * instruction is present, flush the caches before entering C3 instead. 987 * Otherwise, just disable C3 completely. 988 */ 989 if (AcpiGbl_FADT.Pm2ControlBlock == 0 || 990 AcpiGbl_FADT.Pm2ControlLength == 0) { 991 if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) && 992 (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) { 993 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 994 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 995 "acpi_cpu: no BM control, using flush cache method\n")); 996 } else { 997 cpu_quirks |= CPU_QUIRK_NO_C3; 998 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 999 "acpi_cpu: no BM control, C3 not available\n")); 1000 } 1001 } 1002 1003 /* 1004 * If we are using generic Cx mode, C3 on multiple CPUs requires using 1005 * the expensive flush cache instruction. 1006 */ 1007 if (cpu_cx_generic && mp_ncpus > 1) { 1008 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 1009 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1010 "acpi_cpu: SMP, using flush cache mode for C3\n")); 1011 } 1012 1013 /* Look for various quirks of the PIIX4 part. */ 1014 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3); 1015 if (acpi_dev != NULL) { 1016 switch (pci_get_revid(acpi_dev)) { 1017 /* 1018 * Disable C3 support for all PIIX4 chipsets. Some of these parts 1019 * do not report the BMIDE status to the BM status register and 1020 * others have a livelock bug if Type-F DMA is enabled. Linux 1021 * works around the BMIDE bug by reading the BM status directly 1022 * but we take the simpler approach of disabling C3 for these 1023 * parts. 1024 * 1025 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA 1026 * Livelock") from the January 2002 PIIX4 specification update. 1027 * Applies to all PIIX4 models. 1028 */ 1029 case PCI_REVISION_4E: 1030 case PCI_REVISION_4M: 1031 cpu_quirks |= CPU_QUIRK_NO_C3; 1032 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1033 "acpi_cpu: working around PIIX4 bug, disabling C3\n")); 1034 break; 1035 default: 1036 break; 1037 } 1038 } 1039 1040 return (0); 1041 } 1042 1043 static int 1044 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS) 1045 { 1046 struct acpi_cpu_softc *sc; 1047 struct sbuf sb; 1048 char buf[128]; 1049 int i; 1050 uintmax_t fract, sum, whole; 1051 1052 sc = (struct acpi_cpu_softc *) arg1; 1053 sum = 0; 1054 for (i = 0; i < sc->cpu_cx_count; i++) 1055 sum += sc->cpu_cx_stats[i]; 1056 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN); 1057 for (i = 0; i < sc->cpu_cx_count; i++) { 1058 if (sum > 0) { 1059 whole = (uintmax_t)sc->cpu_cx_stats[i] * 100; 1060 fract = (whole % sum) * 100; 1061 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum), 1062 (u_int)(fract / sum)); 1063 } else 1064 sbuf_printf(&sb, "0%% "); 1065 } 1066 sbuf_trim(&sb); 1067 sbuf_finish(&sb); 1068 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req); 1069 sbuf_delete(&sb); 1070 1071 return (0); 1072 } 1073 1074 static int 1075 acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val) 1076 { 1077 int i; 1078 1079 ACPI_SERIAL_ASSERT(cpu); 1080 sc->cpu_cx_lowest = val; 1081 1082 /* If not disabling, cache the new lowest non-C3 state. */ 1083 sc->cpu_non_c3 = 0; 1084 for (i = sc->cpu_cx_lowest; i >= 0; i--) { 1085 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) { 1086 sc->cpu_non_c3 = i; 1087 break; 1088 } 1089 } 1090 1091 /* Reset the statistics counters. */ 1092 bzero(sc->cpu_cx_stats, sizeof(sc->cpu_cx_stats)); 1093 return (0); 1094 } 1095 1096 static int 1097 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 1098 { 1099 struct acpi_cpu_softc *sc; 1100 char state[8]; 1101 int val, error; 1102 1103 sc = (struct acpi_cpu_softc *) arg1; 1104 snprintf(state, sizeof(state), "C%d", sc->cpu_cx_lowest + 1); 1105 error = sysctl_handle_string(oidp, state, sizeof(state), req); 1106 if (error != 0 || req->newptr == NULL) 1107 return (error); 1108 if (strlen(state) < 2 || toupper(state[0]) != 'C') 1109 return (EINVAL); 1110 val = (int) strtol(state + 1, NULL, 10) - 1; 1111 if (val < 0 || val > sc->cpu_cx_count - 1) 1112 return (EINVAL); 1113 1114 ACPI_SERIAL_BEGIN(cpu); 1115 acpi_cpu_set_cx_lowest(sc, val); 1116 ACPI_SERIAL_END(cpu); 1117 1118 return (0); 1119 } 1120 1121 static int 1122 acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 1123 { 1124 struct acpi_cpu_softc *sc; 1125 char state[8]; 1126 int val, error, i; 1127 1128 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1); 1129 error = sysctl_handle_string(oidp, state, sizeof(state), req); 1130 if (error != 0 || req->newptr == NULL) 1131 return (error); 1132 if (strlen(state) < 2 || toupper(state[0]) != 'C') 1133 return (EINVAL); 1134 val = (int) strtol(state + 1, NULL, 10) - 1; 1135 if (val < 0 || val > cpu_cx_count - 1) 1136 return (EINVAL); 1137 cpu_cx_lowest = val; 1138 1139 /* Update the new lowest useable Cx state for all CPUs. */ 1140 ACPI_SERIAL_BEGIN(cpu); 1141 for (i = 0; i < cpu_ndevices; i++) { 1142 sc = device_get_softc(cpu_devices[i]); 1143 acpi_cpu_set_cx_lowest(sc, val); 1144 } 1145 ACPI_SERIAL_END(cpu); 1146 1147 return (0); 1148 } 1149